Patents by Inventor Yi Chou

Yi Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120231508
    Abstract: A method of generating a barcoded Paired-End Ditag (bPED) nucleic acid fragment is disclosed. The method comprises: a) performing a first ligation by ligating a half-adaptor with one or two 3?-overhanging ends to a target nucleic acid to obtain a nucleic acid fragment with two ends each attached to one of the half-adaptor, the half adaptor comprising a half-barcode and a restriction enzyme (RE) recognition site; b) performing a second ligation by ligating two of the half-adaptor at the two ends of the nucleic acid fragment to form a circularized nucleic acid construct, wherein the circularized nucleic acid construct comprises a full-size barcoded adaptor; and c) digesting the circularized nucleic acid construct with a RE that cleaves at a defined distance from the RE recognition site, and thereby generating the bPED nucleic acid fragment.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 13, 2012
    Applicant: Academia Sinica
    Inventors: Kuo Ping CHIU, Yi Chou, Sheng-Chung Chen
  • Patent number: 8264878
    Abstract: A method of efficiently programming charge-trapping memory cells includes sense amplifiers being dynamically connected to cells to be programmed, by switching bit lines. The method increases a number of cells that can be programmed simultaneously, such that an optimal use of sense amplifier resources is obtained.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: September 11, 2012
    Assignee: Macronix International Co., Ltd.
    Inventor: Tsung Yi Chou
  • Patent number: 8238166
    Abstract: Methods are disclosed to compensate for a second-bit effect during programming and reading of charge-trapping memory cells having left and right data regions. When only one of the left and right data regions is to be programmed, a two-step programming procedure is performed on the data region to be programmed. When the memory cell is to be read, threshold voltages for the left and right data regions are sensed with a joint decision regarding left and right data bit values being reached depending upon both sensed threshold voltage values.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: August 7, 2012
    Assignee: Macronix International Co., Ltd.
    Inventor: Tsung Yi Chou
  • Patent number: 8232772
    Abstract: An integrated circuit is disclosed including a primary input for receiving an input voltage, a battery voltage input for receiving a battery voltage signal and an output for providing an output voltage higher than the battery voltage. First circuitry responsive to the input voltage is provided for turning off the output voltage responsive to an input over voltage condition. Second circuitry responsive to the battery voltage signal is provided for turning off the output voltage responsive to a battery over voltage condition. Third circuitry provides for over current protection.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: July 31, 2012
    Assignee: Intersil Americas Inc.
    Inventors: Zheren Lai, Hsien Yi Chou, Zengjing Wu
  • Publication number: 20120181499
    Abstract: A phase change material comprising a quaternary GaTeSb material consisting essentially of MA(GaxTeySbz)B, and where M comprises a group IVA element C, Si, Ge, Sn, Pb, a group VA element N, P, As, Sb, Bi, or a group VIA element O, S, Se, Te, Po, having a value A such that the transition temperature is increased relative to the transition temperature in GaxTeySbz, without M, and the difference between the melting temperature and the transition temperature is reduced relative to the difference in GaxTeySbz, without M.
    Type: Application
    Filed: March 14, 2011
    Publication date: July 19, 2012
    Applicant: Macronix International Co., Ltd.
    Inventors: Tung-Hua Chuang, Yi-Chou Chen, Tsung-Shune Chin, Kin-Fu Kao, Po-Chin Chang, Yung-Ching Chu
  • Publication number: 20120182261
    Abstract: A touch-sensitive device includes a first and a second substrate and a first and a second touch-sensing electrode structure. The first touch-sensing electrode structure is disposed on the first substrate, and at least one touch position of a conductor is detected by sensing the capacitance variation of the first touch-sensing electrode structure. The second touch-sensing electrode structure is disposed on one side of the second substrate back to the first touch-sensing electrode structure. At least one touch position of an insulator is detected by sensing a variation of the interval between the first touch-sensing electrode structure and the second touch-sensing electrode structure.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 19, 2012
    Inventors: Wen-Chun WANG, Ting-Yu Chang, Wen-Tui Liao, Ching-Fu Hsu, Tsung-Yu Wang, Chih-Yuan Wang, Yu-Hua Wu, Cheng-Yi Chou, Xuan-Chang Shiu, Fa-Chen Wu
  • Patent number: 8207451
    Abstract: A ground-plane slotted type signal transmission circuit board is proposed, which is designed for use with a high-speed digital signal processing system for providing a low-loss signal transmission function. The proposed circuit board structure is characterized by the formation of a slotted structure (i.e., elongated cutaway portion) in the ground plane at the beneath of each signal line. Since the slotted structure is a void portion, the electric field of a gigahertz signal being transmitting through the overlaying signal line would be unable to induce electric currents in the void portion of the ground plane. This feature allows the prevention of a leakage current that would otherwise flow from the signal line to the ground plane, and therefore can help prevent unnecessary power loss of the transmitted signal.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: June 26, 2012
    Assignee: National Taiwan University
    Inventors: Hsin-Chia Lu, Tsung-Yi Chou
  • Publication number: 20120141937
    Abstract: A photosensitive composition and a photoresist are provided. The photoresist is formed by compounding a photosensitive composition. The photosensitive composition comprises a binder agent, a photomonomer and a photoinitiator. The binder agent is formed by polymerizing a binder composition. The binder composition comprises a lactic oligomer. The photomonomer has an amount of about 25-95 parts by weight relative to 100 parts by weight of a solid content of the binder agent. The photo initiator has an amount of about 0.5-15 parts by weight relative to 100 parts by weight of the solid content of the binder agent.
    Type: Application
    Filed: June 9, 2011
    Publication date: June 7, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsien-Kuang Lin, Jau-Der Jeng, Sue-May Chen, Te-Yi Chang, Tsung-Yi Chou
  • Patent number: 8180942
    Abstract: An arbitration device receives a plurality of requests from a plurality of circuits, and grants access to one of the plurality of circuits. The arbitration device includes a sorter and an arbitrator. The sorter receives position information of an image signal including a plurality of image layers, and determines an access priority including a first group and a second group according to the position information. The arbitrator receives the access priority and at least one of the plurality of requests, and grants the access to one of the plurality of circuits according to the access priority and the at least one of the plurality of requests. In addition, each of the plurality of circuits generates data for each of the image layers correspondingly.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: May 15, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventor: Yi-Chou Chen
  • Patent number: 8164958
    Abstract: The invention provides a method for reading a first data storage of a memory cell. The method comprises sensing a first current of the memory cell by applying a first bit line voltage on the memory cell. When the first current is larger than a first reference current with respect to the first bit line voltage, the first data storage is determined to be at an un-programmed state. Otherwise, a second current of the memory cell is sensed by applying a second bit line voltage on the memory cell. When the difference between the first current and the second current is larger than the difference between the first reference current and the second reference current, the first data storage is determined to be at the un-programmed state. Otherwise, the first data storage is determined to be at a programmed state.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: April 24, 2012
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Tsung-Yi Chou, Loen-Shien Tsai
  • Publication number: 20120080657
    Abstract: Memory cells described herein have an increased current density at lateral edges of the active region compared to that of conventional mushroom-type memory cells, resulting in improved operational current efficiency. As a result, the amount of heat generated within the lateral edges per unit value of current is increased relative to that of conventional mushroom-type memory cells. Therefore, the amount of current needed to induce phase change is reduced.
    Type: Application
    Filed: December 13, 2011
    Publication date: April 5, 2012
    Applicant: Macronix International Co., Ltd.
    Inventors: Shih-Hung Chen, Yi-Chou Chen
  • Patent number: 8149610
    Abstract: A memory device comprises an array of memory cells each capable of storing multiple bits of data. Each memory cell includes a programmable transistor in series with a resistance switching device. The transistor is switchable between a plurality of different threshold voltages associated with respective memory states. The resistance switching device is configured to be switchable between a plurality of different resistances associated with respective memory states.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: April 3, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Yi-Chou Chen, Wei-Chih Chien, Feng-Ming Lee
  • Patent number: 8138028
    Abstract: A method for manufacturing a mushroom-cell type phase change memory is based upon manufacturing a pillar of bottom electrode material upon a substrate including an array of conductive contacts in electrical communication with access circuitry. A layer of electrode material is deposited making reliable electrical contact with the array of conductive contacts. Electrode material is etched to form a pattern of electrode pillars on corresponding conductive contacts. Next, a dielectric material is deposited over the pattern and planarized to provide an electrode surface exposing top surfaces of the electrode pillars. Next, a layer of programmable resistive material, such as a chalcogenide or other phase change material, is deposited, followed by deposition of a layer of a top electrode material. A device including bottom electrode pillars with larger bottom surfaces than top surfaces is described.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: March 20, 2012
    Assignees: Macronix International Co., Ltd, International Business Machines Corporation, Qimonda North America Corp.
    Inventors: Hsiang Lan Lung, Chieh Fang Chen, Yi Chou Chen, Shih Hung Chen, Chung Hon Lam, Eric Andrew Joseph, Alejandro Gabriel Schrott, Matthew J. Breitwisch, Geoffrey William Burr, Thomas D. Happ, Jan Boris Philipp
  • Patent number: 8134857
    Abstract: Phase change based memory devices and methods for operating described herein overcome the performance limitations of slow set speeds and long recovery times commonly associated with phase change memory devices, enabling high speed operation and extending their usefulness into high speed applications typically filled by DRAM and SRAM memory.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: March 13, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Yuyu Lin, Yi-Chou Chen
  • Patent number: 8134139
    Abstract: A programmable metallization device, comprises a first electrode; a memory layer electrically coupled to the first electrode and adapted for electrolytic formation and destruction of a conducting bridge therethrough; an ion-supplying layer containing a source of ions of a first metal element capable of diffusion into and out of the memory layer; a conductive ion buffer layer between the ion-supplying layer and the memory layer, and which allows diffusion therethrough of said ions; and a second electrode electrically coupled to the ion-supplying layer. Circuitry is coupled to the device to apply bias voltages to the first and second electrodes to induce creation and destruction of conducting bridges including the first metal element in the memory layer. The ion buffer layer can improve retention of the conducting bridge by reducing the likelihood that the first metallic element will be absorbed into the ion supplying layer.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: March 13, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Yu-Yu Lin, Feng-Ming Lee, Yi-Chou Chen
  • Patent number: 8134865
    Abstract: Metal-oxide based memory devices and methods for operating and manufacturing such devices are described herein. A method for manufacturing a memory device as described herein comprises forming a metal-oxide memory element, and applying an activating energy to the metal-oxide memory element. In embodiments the activating energy can be applied by applying electrical and/or thermal energy to the metal-oxide material.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: March 13, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Kuo-Pin Chang, Yi-Chou Chen, Wei-Chih Chien, Erh-Kun Lai
  • Patent number: 8130543
    Abstract: A method and apparatus are described that efficiently program charge-trapping memory cells by dynamically switching sense amplifiers and corresponding drivers depending upon data to be programmed. When a number of sense amplifier/drivers can be operated simultaneously, cells to be programmed to a same level are selected and programmed simultaneously employing up to the number of simultaneously operable sense amplifier/drivers.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: March 6, 2012
    Assignee: Macronix International Co., Ltd.
    Inventor: Tsung Yi Chou
  • Publication number: 20120049277
    Abstract: A lateral-diffusion metal-oxide-semiconductor device includes a semiconductor substrate having at least a field oxide layer, a gate having a layout pattern of a racetrack shape formed on the substrate, a common source formed in the semiconductor substrate and enclosed by the gate, and a drain surrounding the gate and formed in the semiconductor substrate. The gate covers a portion of the field oxide layer. The common source includes a first doped region having a first conductive type and a plurality of islanding second doped regions having a second conductive type. The drain includes a third doped region having the first conductive type. The third doped region overlaps a portion of the field oxide layer and having an overlapping area between the third doped region and the field oxide layer.
    Type: Application
    Filed: August 27, 2010
    Publication date: March 1, 2012
    Inventors: Hong-Ze Lin, Bo-Jui Huang, Chin-Lung Chen, Ting-Zhou Yan, Wei-Shan Liao, Han-Min Huang, Chun-Yao Lee, Kun-Yi Chou
  • Patent number: 8107283
    Abstract: Memory devices and methods for operating such devices are described herein. A method as described herein includes applying a bias arrangement to a memory cell to change the resistance state from a higher resistance state to a lower resistance state. The bias arrangement comprises a first voltage pulse and a second voltage pulse across the phase change memory element, the second voltage pulse having a voltage polarity different from that of the first voltage pulse.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: January 31, 2012
    Assignee: Macronix International Co., Ltd.
    Inventor: Yi-Chou Chen
  • Patent number: D665872
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: August 21, 2012
    Assignee: Lan Shan Enterprise Co., Ltd.
    Inventor: Yi-Chou Lin