Patents by Inventor Yi Chu
Yi Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8143112Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.Type: GrantFiled: January 29, 2010Date of Patent: March 27, 2012Assignee: Semileds Optoelectronics Co., Ltd.Inventors: Trung Tri Doan, Chuong Anh Tran, Chen-Fu Chu, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Feng-Hsu Fan, Jui-Kang Yen
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Patent number: 8124454Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.Type: GrantFiled: October 11, 2006Date of Patent: February 28, 2012Assignee: SemiLEDS Optoelectronics Co., Ltd.Inventors: Chen-Fu Chu, Trung Tri Doan, Chuong Anh Tran, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Feng-Hsu Fan, Jui-Kang Yen
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Publication number: 20110316039Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.Type: ApplicationFiled: June 15, 2011Publication date: December 29, 2011Inventors: WEN-HUANG LIU, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
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Publication number: 20110308961Abstract: A pattern processing method of a workpiece surface includes at least the following steps. A first anodized process is performed to a workpiece, wherein a surface of the workpiece includes at least one flat portion and at least one curved portion. A patterned film including a releasable substrate and an acid-base resistant ink layer disposed thereon is provided, wherein a surface of the releasable substrate on which the acid-base resistant ink layer is disposed faces the workpiece. A force is applied to an edge of the patterned film to adhere the patterned film the workpiece smoothly, so as to transfer a pattern of the acid-base resistant ink layer to the workpiece. The releasable substrate is removed. The workpiece is etched and the acid-base resistant ink layer is removed; and a second anodized process is performed to form a dichromatic anode three-dimensional texture.Type: ApplicationFiled: September 20, 2010Publication date: December 22, 2011Applicant: COMPAL ELECTRONICS, INC.Inventors: Pei-Yi Chu, Chang-Kai Liu, Chun-Huang Yu
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Publication number: 20110302429Abstract: A rack system for a server includes a number of server units, which includes first to the third sets of server units, voltage converter, first to third power supply circuits. The voltage converter receives and converters a three-phase alternating current (AC) power signal to provide first to third single-phase power signals. The first to the third sets of power supply circuits respectively provides first to third direct current (DC) power signals according to the first to the third single-phase power signals. The first set to the third set of server units is respectively powered by first to the third DC power signals or respectively powered by first part, second part, and third part of the first to the third DC power signals.Type: ApplicationFiled: December 17, 2010Publication date: December 8, 2011Applicant: Quanta Computer Inc.Inventors: Tzu-Hung Wang, Chao-Jung Chen, Chih-Ming Chen, Wei-Yi Chu
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Patent number: 8056381Abstract: A device for producing a pattern onto a work piece includes a die, an electromagnetic actuator and a base. The die includes a patterned surface, and the patterned surface includes a pattern. The electromagnetic actuator includes an plate body, a convex part and a strip unit connected to the plate body. The electromagnetic actuator is disposed in the base. When the electromagnetic actuator is activated while a work piece is being positioned between the patterned surface and the electromagnetic actuator, an inductive current is generated on the work piece by the electromagnetic actuator, and then a repulsive force is generated between the electromagnetic actuator and the work piece. The repulsive force causes the work piece to adhere to the patterned surface, forcing the work piece to deform against the patterned surface and to take on the shape of the pattern.Type: GrantFiled: December 30, 2008Date of Patent: November 15, 2011Assignee: Metal Industries Research & Development CentreInventors: Tung-Chen Cheng, Yu-Yi Chu, Rong-Shean Lee, Tzyy-Ker Sue, Chun-Chieh Wang
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Patent number: 8035564Abstract: A surface mounted planner antenna apparatus includes an antenna and a circuit board. The antenna includes a base, a radiation metal plate arranged on a top face of the base, and a ground metal plate arranged on a bottom face of the base. A through hole is defined from the radiation metal plate and passed through the base to the ground metal plate. A signal feeder is arranged in the through hole and electrically connected to the radiation metal plate but electrically insulated with the ground metal plate. The circuit board is attached on the bottom face of the base and includes an upper face and a lower face, the upper face includes an area for binding with the ground metal plate on the bottom face of the base, and the lower face includes a first pad and a signal feeding trace electrically connected with the signal feeder.Type: GrantFiled: December 1, 2008Date of Patent: October 11, 2011Assignee: Cirocomm Technology Corp.Inventors: Tsai-Yi Yang, Ching-wen Wu, Wei-Hung Hsu, Te-Yi Chu
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Patent number: 8003994Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.Type: GrantFiled: June 25, 2010Date of Patent: August 23, 2011Assignee: SemiLEDs Optoelectronics Co., LtdInventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
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Patent number: 7902562Abstract: A light-emitting diode device (LED) device and manufacturing methods thereof are provided, wherein the LED device comprises a substrate, a first n-type semiconductor layer, an n-type three-dimensional electron cloud structure, a second n-type semiconductor layer, an active layer and a p-type semiconductor layer. The first n-type semiconductor layer, the n-type three-dimensional electron cloud structure, the second n-type semiconductor layer, the active layer and the p-type semiconductor layer are subsequently grown on the substrate.Type: GrantFiled: August 18, 2008Date of Patent: March 8, 2011Assignee: Epistar CorporationInventors: Cheng-Ta Kuo, Yu-Pin Hsu, Chun-Kai Wang, Jui-Yi Chu, Tsung-Kuang Chen
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Patent number: 7892891Abstract: Techniques for dicing wafer assemblies containing multiple metal device dies, such as vertical light-emitting diode (VLED), power device, laser diode, and vertical cavity surface emitting laser device dies, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, such techniques are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.Type: GrantFiled: October 11, 2006Date of Patent: February 22, 2011Assignee: SemiLEDS Optoelectronics Co., Ltd.Inventors: Chen-Fu Chu, Trung Tri Doan, Chuong Anh Tran, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Feng-Hsu Fan, Jui-Kang Yen
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Patent number: 7829440Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, a seed metal layer may be used to grow hard metal layers above it for handling. Metal may be plated above these metal layers everywhere except where a block of stop electroplating (EP) material exists. The stop EP material may be obliterated, and a barrier layer may be formed above the entire remaining structure. The substrate may be removed, and the individual dies may have any desired bonding pads and/or patterned circuitry added to the semiconductor surface. The remerged hard metal after laser cutting and heating should be strong enough for handling. Tape may be added to the wafer, and a breaker may be used to break the dies apart. The resulting structure may be flipped over, and the tape may be expanded to separate the individual dies.Type: GrantFiled: August 7, 2007Date of Patent: November 9, 2010Assignee: SemiLEDS Optoelectronics Co. Ltd.Inventors: Jiunn-Yi Chu, Chao-Chen Cheng, Chen-Fu Chu, Trung Tri Doan
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Publication number: 20100258834Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.Type: ApplicationFiled: June 25, 2010Publication date: October 14, 2010Inventors: WEN-HUANG LIU, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
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Patent number: 7759670Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.Type: GrantFiled: June 10, 2008Date of Patent: July 20, 2010Assignee: SemiLEDs Optoelectronics Co., Ltd.Inventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
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Publication number: 20100147043Abstract: A device for producing a pattern onto a work piece is disclosed. The device comprises a die, an electromagnetic actuator and a base; wherein the die comprises a patterned surface and the patterned surface comprises a pattern. The electromagnetic actuator comprises an plate body, a convex part and a strip unit connected to the plate body; the electromagnetic actuator is disposed in the base. When the electromagnetic actuator is activated while a work piece is being positioned between the patterned surface and the electromagnetic actuator, an inductive current is generated on the work piece by the electromagnetic actuator, and then a repulsive force is generated between the electromagnetic actuator and the work piece. The repulsive force then causes the work piece to adhere to the patterned surface, forcing the work piece to deform against the patterned surface and to take on the shape of the pattern.Type: ApplicationFiled: December 30, 2008Publication date: June 17, 2010Inventors: Tung-Chen Cheng, Yu-Yi Chu, Rong-Shean Lee, Tzyy-Ker Sue, Chun-Chieh Wang
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Publication number: 20100139070Abstract: A device for producing a patterned plate from a tubular work piece is disclosed wherein walls of the tubular work piece comprise at least one forming surface. The device comprises a die and an electromagnetic actuator, wherein the die comprises a patterned surface with a pattern formed thereon and a fracturing part. The tubular work piece is disposed between the die and the electromagnetic actuator such that the walls of the tubular work piece correspond to walls of the die, and the forming surface corresponds to the patterned surface. When the electromagnetic actuator is supplied with a current pulse, an eddy current is induced in the tubular work piece, generating a repulsive force between the electromagnetic actuator and the tubular work piece. Therefore, the tubular work piece impacts the die, and the forming surface is deformed against the patterned surface and the fracturing part, thus replicating the pattern of the patterned surface onto the forming surface.Type: ApplicationFiled: December 30, 2008Publication date: June 10, 2010Inventors: Tung-Chen Cheng, Yu-Yi Chu
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Publication number: 20100134357Abstract: A surface mounted planner antenna apparatus includes an antenna and a circuit board. The antenna includes a base, a radiation metal plate arranged on a top face of the base, and a ground metal plate arranged on a bottom face of the base. A through hole is defined from the radiation metal plate and passed through the base to the ground metal plate. A signal feeder is arranged in the through hole and electrically connected to the radiation metal plate but electrically insulated with the ground metal plate. The circuit board is attached on the bottom face of the base and includes an upper face and a lower face, the upper face includes an area for binding with the ground metal plate on the bottom face of the base, and the lower face includes a first pad and a signal feeding trace electrically connected with the signal feeder.Type: ApplicationFiled: December 1, 2008Publication date: June 3, 2010Inventors: Tsai-Yi YANG, Ching-Wen Wu, Wei- Hung Hsu, Te-Yi CHU
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Patent number: 7723718Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.Type: GrantFiled: October 11, 2006Date of Patent: May 25, 2010Assignee: SemiLEDs Optoelectronics Co., Ltd.Inventors: Trung Tri Doan, Chuong Anh Tran, Chen-Fu Chu, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Feng-Hsu Fan, Jui-Kang Yen
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Publication number: 20100102295Abstract: This invention discloses a light-emitting device comprising a semiconductor stack layer having an active layer of a multiple quantum well (MQW) structure comprising alternate stack layers of quantum well layers and barrier layers, wherein the barrier layers comprise at least one doped barrier layer and one undoped barrier layer. The doped barrier layer can improve the carrier mobility of the electron holes and increase the light-emitting area and the internal quantum efficiency of the active layer.Type: ApplicationFiled: October 22, 2009Publication date: April 29, 2010Inventors: Chun-Kai WANG, Schang-Jing Hon, Yu-Pin Hsu, Jui-Yi Chu, Hsin-Hsien Wu, Wei-Yu Yen
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Patent number: 7687322Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.Type: GrantFiled: October 11, 2006Date of Patent: March 30, 2010Assignee: SemiLEDs Optoelectronics Co., Ltd.Inventors: Trung Tri Doan, Chuong Anh Tran, Chen-Fu Chu, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Feng-Hsu Fan, Jui-Kang Yen
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Publication number: 20100046205Abstract: The present application relates to an opto-electronic device. The opto-electronic device includes an n-cladding layer, a p-cladding layer and a multi-quantum well structure. The multi-quantum well structure is located between the p-cladding layer and the n-cladding layer, and includes a plurality of barrier layers, a plurality of well layers and a barrier tuning layer. The barrier tuning layer is made by doping the barrier layer adjacent to the p-cladding layer with an impurity therein for changing an energy barrier thereof to improve the light extraction efficiency of the opto-electronic device.Type: ApplicationFiled: August 25, 2009Publication date: February 25, 2010Inventors: Jui-Yi CHU, Cheng-Ta Kuo, Yu-Pin Hsu, Chun-Kai Wang, Hsin-Hsien Wu, Yi-Chieh Lin