Patents by Inventor Yi Liu

Yi Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941065
    Abstract: Systems and methods are described for generating record clusters. The methods comprise receiving a plurality of records from data sources and providing at least a subset of the records to a scoring model that determines scores for various pairings of the records, a score for a given pair of the records representing a probability that the given pair of records contain data elements about the same entity. The method further comprises generating a graph data structure that includes a plurality of nodes, individual nodes representing a different record from the records. The method also comprises assigning a different unique identifier to individual clusters of the final clusters and responding to a request for data regarding a given entity by providing aggregated data elements from those records of the records associated with a cluster of the final clusters having an identifier that represents the given entity.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: March 26, 2024
    Assignee: Experian Information Solutions, Inc.
    Inventors: Hua Li, Sophie Liu, Yi He, Zhixuan Wang, Chi Zhang, Kevin Chen, Shanji Xiong, Christer Dichiara, Mason Carpenter, Mark Hirn, Julian Yarkony
  • Publication number: 20240096342
    Abstract: A processing apparatus and a processing method of a sound signal are provided. In the method, the sound signal is received. A respirator type is identified. The sound signal is modified according to the respirator type. The respirator type is a type of a respirator corresponding to the sound signal. Accordingly, the distortion may be corrected and the accuracy of voice identification may be improved.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 21, 2024
    Applicant: Wistron Corporation
    Inventors: Han-Yi Liu, Chang-Hsin Lai
  • Publication number: 20240092910
    Abstract: The present invention provides a B7-H3 nanobody, the preparation method and use thereof. The B7-H3 nanobody comprises framework regions 1-4 (FR 1-4) and complementarity determining regions 1-3 (CDR 1-3), can specifically bind to B7-H3, and can be used for detecting B7-H3 molecules, and be used for the treatment of various malignant tumors with abnormal expression of B7-H3 molecule.
    Type: Application
    Filed: October 9, 2020
    Publication date: March 21, 2024
    Applicants: Dartsbio Pharmaceuticals Ltd., Shanghai Mabstone Biotechnology Ltd., Shenzhen Innovastone Biopharma Ltd.
    Inventors: Chunhe WANG, Yi-li CHEN, Xinyuan LIU, Weidong LUO, Guojian LIU, Huanhuan LI, Yijun LIN
  • Publication number: 20240095899
    Abstract: The present disclosure includes edge defect detection via image analytics. A method includes identifying an image of an edge of a susceptor pocket formed by a susceptor of a substrate processing system. The method further includes predicting, based on the image, whether property values of the edge of the susceptor meet threshold values. The method further includes, responsive to the property values of the edge meeting threshold values, causing performance of a corrective action associated with the susceptor.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Inventors: Yash Chhabra, Abyaya Dhar, Joseph Liu, Yi Nung Wu, Boon Sen Chan, Sidda Reddy Kurakula, Chandrasekhar Roy
  • Publication number: 20240096812
    Abstract: A method of forming a semiconductor device includes arranging a semi-finished substrate, which has been tested and is known to be good, on a carrier substrate. Encapsulating the semi-finished substrate in a first encapsulant and arranging at least one semiconductor die over the semi-finished substrate. Electrically coupling at least one semiconductor component of the at least one semiconductor die to the semi-finished substrate and encasing the at least one semiconductor die and portions of the first encapsulant in a second encapsulant. Removing the carrier substrate from the semi-finished substrate and bonding a plurality of external contacts to the semi-finished substrate.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu, Chien-Hsun Lee
  • Publication number: 20240096121
    Abstract: Provided are a computer program product, system, and method for training and using a vector encoder to determine vectors for sub-images of text in an image to subject to optical character recognition. A vector encoder is trained to encode images representing text into vectors in a vector space. Vectors of images representing similar text have a high degree of cohesion in the vector space. Vectors of images representing dissimilar text have a low degree of cohesion in the vector space. An input image is processed to determine sub-images of the input image that bound text represented in the input image. The sub-images are inputted to the vector encoder to output sub-image vectors. The vector encoder generates a search vector for search text. Optical character recognition is applied to at least one region of the input image including the sub-images having sub-image vectors matching the search vector.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: Zhong Fang YUAN, Tong LIU, Yi Chen ZHONG, Xiang Yu YANG, Guan Chao LI
  • Publication number: 20240094343
    Abstract: A method, device, system, and storage medium for tracking a moving target are provided. The method uses three-dimensional radar observation data to construct a state vector and a motion model of the moving target, thereby to construct a state equation and an observation equation for achieving filtering and tracking within a linear Gaussian framework. The disclosure is also suitable for a moving target in a two-dimensional scene with a distance and an azimuth, and the disclosure use a two-dimensional observation vector to construct a dynamic system to achieving tracking of the moving target. The disclosure can be used in radar systems containing Doppler measurements, and tracking of moving targets can be implemented by performing dimension-expansion processing on observation equations.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 21, 2024
    Inventors: XuanZhi Zhao, Wen Zhang, ZengLi Liu, Kang Liu, HaiYan Quan, Yi Peng, JingMin Tang, YaoLian Song, Zheng Chen
  • Publication number: 20240098520
    Abstract: Methods and apparatuses for MAC CE based common beam indication are disclosed. In one embodiment, a method comprises receiving a higher layer parameter to enable MAC CE based common beam indication; receiving a common beam indication MAC CE; and determining a common beam according to the common beam indication MAC CE.
    Type: Application
    Filed: January 14, 2021
    Publication date: March 21, 2024
    Applicant: Lenovo (Beijing) Limited
    Inventors: Bingchao Liu, Chenxi Zhu, Wei Ling, Yi Zhang, Lingling Xiao
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Publication number: 20240099111
    Abstract: There is provided a display substrate, including: a base; light-emitting units on a side of the base; a flat light-shielding functional layer, including a black matrix and a first planarization layer, on a side of the light-emitting units away from the base, light outgoing openings being provided in the black matrix and being in one-to-one correspondence with the light-emitting units, and the first planarization layer at least filling the light outgoing openings; and a color filter layer, including color filter patterns in one-to-one correspondence with the light outgoing openings, on a side of the flat light-shielding functional layer away from the base, an orthographic projection of each color filter pattern on the base covering an orthographic projection of the light outgoing opening corresponding to the color filter pattern on the base. A method for manufacturing a display substrate, a display panel and a display apparatus are further provided.
    Type: Application
    Filed: July 1, 2022
    Publication date: March 21, 2024
    Inventors: Peng HOU, Yuan HE, Huaisen REN, Zhiliang SHAO, Pei LIU, Xiaoyi WANG, Chao YE, Yi PENG
  • Patent number: 11932534
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 11935804
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Patent number: 11934106
    Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Yen Liu, Hui-Fang Kuo, Chian-Ting Huang, Wei-Cyuan Lo, Yung-Feng Cheng, Chung-Yi Chiu
  • Patent number: 11934060
    Abstract: Provided is an array substrate. The array substrate includes: a base substrate, and a plurality of gate lines, a plurality of data lines, a plurality of sub-pixels and a plurality of touch signal lines disposed on the base substrate. The data lines have a plurality of first extending parts and a plurality of second extending parts which are in an alternating arrangement. When the array substrate is used to prepare a liquid crystal display panel and the liquid crystal display panel is displaying, in each column of the sub-pixels, the voltage polarities of the two adjacent sub-pixels which respectively belong to two adjacent first pixel regions are opposite.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: March 19, 2024
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bo Feng, Shijun Wang, Yang Wang, Zhan Wei, Wenkai Mu, Yi Liu, Li Tian
  • Patent number: 11935871
    Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
  • Patent number: 11935137
    Abstract: A method for distributing an equity reward for federated learning based on an equity theory includes the following steps: applying Adams' equity theory to federated learning, analyzing, by a participant, all factors invested in a federated task comprehensively, then giving an expected reward for this task, calculating, by the task publisher, the reputation of the participant; participating, by the participant, in each round of a training task using a local data to evaluate data contribution, model contribution, and a waiting-time allowance of the participant, then combining contribution results of the three factors to evaluate the contribution of the participant; after a global model converges, dynamically adjusting weights of the three factors according to an objective function of the equity reward, with a goal that an actual reward of the participant is as close as possible to the expected reward, and obtaining and distributing the actual reward of the participant.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: March 19, 2024
    Assignee: BEIJING JIAOTONG UNIVERSITY
    Inventors: Wei Wang, Guorong Chen, Pengrui Liu, Xiaoting Lyu, Xiangrui Xu, Chao Li, Li Duan, Dawei Zhang, Jiqiang Liu, Yi Jin, Yidong Li
  • Publication number: 20240088307
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240088171
    Abstract: An array substrate and display device are provided. The array substrate includes a base substrate, and gate lines, data lines, compensation blocks and sub-pixels located on the base substrate. Two gate lines are arranged between two adjacent rows of sub-pixels. The data lines are provided with multiple first extensions and second extensions arranged alternately. The extending direction of the first extensions intersects with the extending direction of the second extensions.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Wenkai MU, Shijun WANG, Yi LIU, Bo FENG, Yang WANG, Zhan WEI, Li TIAN
  • Publication number: 20240084305
    Abstract: The present disclosure provides methods of inhibiting cell proliferation signaling in a cell. The present disclosure further provides compositions for inhibiting cell proliferation signaling in a cell. The methods and compounds have a range of utilities as therapeutics, diagnostics, and research tools.
    Type: Application
    Filed: April 7, 2023
    Publication date: March 14, 2024
    Inventors: Yi Liu, Matthew R. Janes, Rasmus Hansen, Pingda Ren, Karen K. Wong, Liansheng Li
  • Publication number: 20240084168
    Abstract: The present disclosure relates to a leather coating composition comprising or consisting of a hydrosilylation curable silicone elastomer composition designed to be used as a topcoat for a synthetic leather material, particularly a silicone-based synthetic leather composite material. A silicone coating as a topcoat for a synthetic leather material which is the cured product of the composition, methods of making the topcoat, synthetic leather material utilizing same and uses of the synthetic leather material products are also disclosed. The topcoat is designed to provide a highly crosslinked silicone matrix containing silicon-free organic micro-particles to minimize or at least decrease change in gloss after abrasion.
    Type: Application
    Filed: December 28, 2021
    Publication date: March 14, 2024
    Inventors: Tingting CHEN, Yu CHEN, Hongyu CHEN, Liyun ZHOU, Kang CHEN, Yusheng CHEN, Yi GUO, Qing SHI, Zhihua LIU