Abstract: An organic light emitting element includes a first electrode a second electrode that faces the first electrode, an emission layer between the first electrode and the second electrode, the emission layer including quantum dots, and a hole transport layer between the first electrode and the emission layer. The quantum dots include at least one of a Group I-VI compound, a Group II-VI compound, and a Group III-VI compound. The hole transport layer includes at least one of a p-doped Group I-VI compound, a p-doped Group II-VI compound, and a p-doped Group III-VI compound.

Abstract: In some embodiments, a semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.

Abstract: A quantum dot includes: a core including at least one first positive ion precursor and at least one negative ion precursor; a shell including at least one second positive ion precursor and at least one negative ion precursor and wrapping the core; and a ligand formed on a surface of the shell, wherein the first positive ion precursor is an n-period element and the second positive ion precursor is an (n-1)-period element, where n is an integer of 3 to 6.

Abstract: A semiconductor device includes a first transistor and a clamping circuit. The first transistor is arranged to generate an output signal according to a control signal. The clamping circuit is arranged to generate the control signal according to an input signal, and to clamp the control signal to a predetermined signal level when the input signal exceeds the predetermined signal level.

Abstract: A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET.

Abstract: A device includes a p-well region, and a first High-Voltage N-type Well (HVNW) region and a second HVNW region contacting opposite edges of the p-well region. A P-type Buried Layer (PBL) has opposite edges in contact with the first HVNW region and the second HVNW region. An n-type buried well region is underlying the PBL. The p-well region and the n-type buried well region are in contact with a top surface and a bottom surface, respectively, of the PBL. The device further includes a n-well region in a top portion of the p-well region, an n-type source region in the n-well region, a gate stack overlapping a portion of the p-well region and a portion of the second HVNW region, and a channel region under the gate stack. The channel region interconnects the n-well region and the second HVNW region.

Abstract: A semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.

Abstract: A photolithography tool includes at least one process chamber, at least one front opening unified pod (FOUP) stage, at least one moving mechanism, and an image sensor. The moving mechanism is configured to move the wafer from the process chamber to the FOUP stage. The image sensor is configured to capture the image of the wafer on the moving mechanism.

Abstract: A method is proposed for identifying an anatomical structure within a spatial-temporal image (i.e. a series of frames captured as respective times). A current frame of spatial-temporal medical image is processed using information from one or more previous and/or subsequent temporal frames, to aid in the segmentation of an object or a region of interest (ROI) in a current frame. The invention is applicable to both two- and three-dimensional spatial-temporal images (i.e., 2D+time or 3D+time), and in particular to cardiac magnetic resonance (CMR images). An initialisation process for this method segments the left ventricle (LV) in a CMR image by a fuzzy c-means (FCM) clustering algorithm which employs a circular shape function as part of the definition of the dissimilarity measure.

Abstract: A semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.

Abstract: A semiconductor power device supported on a semiconductor substrate comprising a plurality of transistor cells each having a source and a drain with a gate to control an electric current transmitted between the source and the drain. The semiconductor further includes a gate-to-drain (GD) clamp termination connected in series between the gate and the drain further includes a plurality of back-to-back polysilicon diodes connected in series to a silicon diode includes parallel doped columns in the semiconductor substrate wherein the parallel doped columns having a predefined gap. The doped columns further include a U-shaped bend column connect together the ends of parallel doped columns with a deep doped-well that is disposed below and engulfing the U-shaped bend.

Abstract: A known flip-chip assembly manufacturing process is augmented by process steps of the invention to create a VCSEL flip-chip assembly comprising a plurality of semiconductor devices having respective arrays of a small number of VCSELs thereon, which are mounted on a substrate to form a large array of VCSELs that are precisely optically aligned with their respective optical coupling elements.

Abstract: A method of forming an integrated circuit structure includes providing a gate strip in an inter-layer dielectric (ILD) layer. The gate strip comprises a metal gate electrode over a high-k gate dielectric. An electrical transmission structure is formed over the gate strip and a conductive strip is formed over the electrical transmission structure. The conductive strip has a width greater than a width of the gate strip. A contact plug is formed above the conductive strip and surrounded by an additional ILD layer.

Abstract: A constructed photodetector, an optical receiver, and a receiver unit in an optical communication system are disclosed. One example of the disclosed constructed photodetector includes an optoelectronic element having an active area that converts light having a wavelength of interest into electrical signals and a substrate on a face that opposes the active area, where the substrate is non-transparent to light having the wavelength of interest. The constructed photodetector further includes a lens-chip that is at least partially transparent to light having the wavelength of interest, where the lens-chip includes a first side and an opposing second side, where the first side of the lens-chip includes an integrated lens, and where the second side of the lens-chip includes one or more electrical traces. The constructed photodetector further includes at least one connector that provides a physical and electrical connection between the optoelectronic element and the lens-chip.

Abstract: A floor board includes a board unit that includes a substrate and a coating unit. The substrate has a first side surface, a second side surface opposite to the first side surface, a male engaging part extending outwardly from the first side surface, and a female engaging part indented inwardly from the second side surface. The male engaging part corresponds in shape to the female engaging part. The coating unit is formed on the first and second side surfaces, and the male and female engaging parts, and includes a far-infrared radiating material.

Abstract: A vertical cavity surface emitting laser (VCSEL) includes a substrate having an aperture that allows light generated in an active layer of the VCSEL to exit the VCSEL after propagation through a first set of semiconductor layers. The VCSEL further includes an opaque bottom layer that blocks light generated in the active layer and propagated through a second set of semiconductor layers. The opaque bottom layer can be attached to a heat sink for heat dissipation thereby allowing the VCSEL to be operated at high power levels. The active layer is sandwiched between the first set of semiconductor layers and the second set of semiconductor layers. Unlike a traditional VCSEL where only certain wavelengths of light can propagate through a solid substrate that is “transparent” to these particular wavelengths, the aperture provided in the substrate of a VCSEL in accordance with the disclosure allows for propagation of many different wavelengths.

Abstract: A wafer-to-wafer bonded arrangement is provided comprising a VCSEL wafer and a highly thermally-conductive (HTC) wafer that are bonded together with the front side of the VCSEL wafer bonded to the HTC wafer. The VCSEL wafer is fabricated to include, at least initially, a native substrate. The HTC wafer includes a thermally-conductive, non-native substrate. All or a portion of the native substrate may be removed after performing wafer-to-wafer bonding. In effect, the HTC wafer becomes the substrate of the bonded pair. During operation of VCSEL dies diced from the bonded wafer, heat generated by the dies flows into the non-native substrate where the heat spreads out and is dissipated. Laser light generated by the VCSEL die is emitted through the back side of the VCSEL die.

Abstract: A computational engineering modelling tool having a point generation module arranged to read geometry data representing a domain to be modelled. The point generation module also generates point data for the domain having multiple boundary points located on a boundary of the domain and multiple further points spaced from the boundary within the domain. A point mutation module processes the point generation module output and generates automatically a plurality of alternative point data definitions for the domain in which the location of at least one point differs between each of the alternative point definitions. A blocking module discretizes the domain by creating multiple geometric blocks over the domain using a computational geometric operator wherein each point represents a vertex of at least one block. The blocking module outputs a discretized computational model of the domain and the tool scores the model according to a geometric attribute of the blocks.

Abstract: The present invention provides new amino lipids and a convenient method for synthesizing these compounds. These (cationic) amino lipids have good properties as transfection agents. The method is an economic versatile two step synthesis allowing the preparation of various amino lipids thus leading to the assembly of a combinatorial library of transfection agents. Moreover, the present invention provides lipid particles (liposomes) containing said amino lipids and their use for delivering bioactive agents into cells. The invention encompasses also the use of lipid particles containing the cationic amino lipids as medicament.

Abstract: A channel layer is grown over a substrate, and an active layer is grown over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer. A dielectric layer is deposited over the active layer, and the dielectric layer is patterned to expose a portion of the active layer. A metal diffusion barrier is formed over the exposed portion of the active layer, and a gate is deposited over the metal diffusion barrier.