Patents by Inventor Yin Chen

Yin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11109538
    Abstract: A method for producing galanthamine using a plant, includes (a) performing a thermal treatment on a living plant to induce accumulation of galanthamine therein, wherein the living plant is a plant belonging to the family Amaryllidaceae; and (b) placing the living plant in a medium and performing an electrical stimulation treatment on the living plant to release the galanthamine from the living plant to the medium.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: September 7, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Yin Chen, Tsung-Lin Yang, Yung-Chi Kuo
  • Publication number: 20210267049
    Abstract: A flexible circuit board includes a flexible light-permeable carrier, a circuit layer, a mark and a stiffener. The circuit layer and the mark are located on a top surface of the flexible light-permeable carrier. A predetermined area and a stiffener mounting area corresponding to each other are defined on the top surface and a bottom surface of the flexible light-permeable carrier, respectively. The mark is opaque to create a shadow mark having a longitudinal reference side and a lateral reference side on the bottom surface. The stiffener is adhered to the stiffener mounting area defined on the bottom surface by aligning with the longitudinal reference side and the lateral reference side of the shadow mark.
    Type: Application
    Filed: January 28, 2021
    Publication date: August 26, 2021
    Inventors: Yin-Chen Lin, Hui-Yu Huang, Chih-Ming Peng, Chun-Te Lee
  • Publication number: 20210257255
    Abstract: A method includes forming a gate stack over a first semiconductor region, removing a second portion of the first semiconductor region on a side of the gate stack to form a recess, growing a second semiconductor region starting from the recess, implanting the second semiconductor region with an impurity, and performing a melting laser anneal on the second semiconductor region. A first portion of the second semiconductor region is molten during the melting laser anneal, and a second and a third portion of the second semiconductor region on opposite sides of the first portion are un-molten.
    Type: Application
    Filed: April 12, 2021
    Publication date: August 19, 2021
    Inventors: Su-Hao Liu, Wen-Yen Chen, Tz-Shian Chen, Cheng-Jung Sung, Li-Ting Wang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang
  • Patent number: 11093681
    Abstract: A method of generating an integrated circuit includes: placing a plurality of electronic components on a layout floor plan to generate a placing layout of the integrated circuit; forming a clock tree upon the placing layout to generate a synthesis layout of the integrated circuit; routing the synthesis layout to generate a routed layout of the integrated circuit; performing a DRC process upon the routed layout to obtain a layout region with a systematic DRC violation; generating a plurality of prediction gains of the layout region according to a plurality of placement recipes respectively; and generating an adjusted routing layout of the integrated circuit by adjusting the layout region with the systematic DRC violation according to a target placement recipe in the plurality of placement recipes.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: August 17, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shih-Yao Lin, Yi-Lin Chuang, Yin-An Chen, Shih Feng Hong
  • Patent number: 11087066
    Abstract: Systems and methods are provided for predicting static voltage (SIR) drop violations in a clock-tree synthesis (CTS) layout before routing is performed on the CTS layout. A static voltage (SIR) drop violation prediction system includes SIR drop violation prediction circuitry. The SIR drop violation prediction circuitry receives CTS data associated with a CTS layout. The SIR drop violation prediction circuitry inspects the CTS layout data associated with the CTS layout, and the CTS layout data may include data associated with a plurality of regions of the CTS layout, which may be inspected on a region-by-region basis. The SIR drop violation prediction circuitry predicts whether one or more SIR drop violations would be present in the CTS layout due to a subsequent routing of the CTS layout.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: August 10, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Lin Chuang, Henry Lin, Szu-Ju Huang, Yin-An Chen, Amos Hong
  • Publication number: 20210234037
    Abstract: The present application discloses a semiconductor device with an oxidized intervention layer and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a tunneling insulating layer disposed over the substrate, a floating gate disposed over the tunnel oxide layer, a lateral oxidized intervention layer disposed over the floating gate, and a control gate disposed over the dielectric layer.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 29, 2021
    Inventor: TE-YIN CHEN
  • Publication number: 20210229691
    Abstract: A method includes receiving a service request from a vehicle within a geographic area, receiving a first set of data from the vehicle comprising a position of the vehicle within the geographic area, a direction that the vehicle is facing, and a field of view for an augmented reality display associated with the vehicle, obtaining historical traffic data associated with the geographic area, identifying one or more traffic infrastructures within the field of view of the augmented reality display based on a map associated with the geographic area, the historical traffic data, the position of the vehicle, and the direction the vehicle is facing, generating an augmented reality image for the one or more traffic infrastructures based on the historical traffic data and the field of view of the augmented reality display, and sending the augmented reality image to the vehicle.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 29, 2021
    Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Yin-Chen Liu, BaekGyu Kim
  • Publication number: 20210226008
    Abstract: The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
    Type: Application
    Filed: March 15, 2021
    Publication date: July 22, 2021
    Inventors: Su-Hao Liu, Huicheng Chang, Chia-Cheng Chen, Liang-Yin Chen, Kuo-Ju Chen, Chun-Hung Wu, Chang-Maio Liu, Huai-Tei Yang, Lun-Kuang Tan, Wei-Ming You
  • Patent number: 11064658
    Abstract: A method for inducing plants to increase their flavonoid compound content, includes performing an induction culture on a young shoot or an adult of a living plant, wherein flavonoid compound content of the young shoot or the adult of the living plant which has been subjected to the induction culture is higher than that of a young shoot or an adult of a living plant which is not subjected to the induction culture. Moreover, the induction culture includes a metal ion stimulation procedure comprising culturing the young shoot or the adult of the living plant in a culture environment with metal ion stimulation, wherein the culture environment with metal ion stimulation contains a metal ion used for stimulating the living plant, and the concentration of the metal ion used for stimulating the living plant is 5 ?M-50 mM.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: July 20, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Yin Chen, Tsung-Lin Yang
  • Publication number: 20210217906
    Abstract: A method for forming semiconductor devices includes providing a substrate with a conductive pad formed thereon; forming a transparent structure over the substrate, wherein the transparent structure includes a plurality of collimating pillars adjacent to the conductive pad; forming a light-shielding structure over the plurality of collimating pillars and the conductive pad; performing a cutting process to remove one or more materials directly above the conductive pad, while leaving remaining material to cover the conductive pad, wherein the material includes a portion of the light-shielding structure; and performing an etching process to remove the remaining material to expose the conductive pad.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 15, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Chih-Hsien CHEN
  • Publication number: 20210212931
    Abstract: A topical formulation comprising (a) a therapeutically effective amount of tofacitinib; (b) at least one solvent; and (c) optionally one or more other pharmaceutically acceptable excipients is provided. Also provided is a method for treating and/or preventing autoimmune diseases in a subject administering said topical formulation.
    Type: Application
    Filed: March 26, 2021
    Publication date: July 15, 2021
    Inventors: Chih-Ming Chen, Guang-Wei Lu, Ling-Ying Liaw, Fan-Lun Liu, Shih-Fen Liao, Chou-Hsiung Chen, Yu-Han Kao, Yu-Yin Chen
  • Patent number: 11057606
    Abstract: A method and a system for information display are proposed. The system includes a light transmissive display, at least one first information extraction device, at least one second information extraction device, and a processing device, where the processing device is connected to the display, the first information extraction device, and the second information extraction device. The first information extraction device is configured to obtain position information of a user. The second information extraction device is configured to obtain position information of a target. The processing device is configured to perform coordinate transformation on the position information of the user and the position information of the object to generate fused information between the user and the target, and to display related information of the object on the display according to the fused information.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: July 6, 2021
    Assignees: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Wei-Lin Hsu, Tzu-Yi Yu, Heng-Yin Chen
  • Patent number: 11056419
    Abstract: A semiconductor device includes a through-substrate via extending from a frontside to a backside of a semiconductor substrate. The through-substrate via includes a concave or a convex portion adjacent to the backside of the semiconductor substrate. An isolation film is formed on the backside of the semiconductor substrate. A conductive layer includes a first portion formed on the concave or convex portion of the through substrate via and a second portion formed on the isolation film. A passivation layer partially covers the conductive layer.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Chi Lin, Hsin-Yu Chen, Ming-Tsu Chung, HsiaoYun Lo, Hong-Ye Shih, Chia-Yin Chen, Ku-Feng Yang, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Publication number: 20210202493
    Abstract: The present disclosure provide a method of preparing semiconductor device involving planarization processes. The method includes introducing dopants into the exposed portions of the substrate to form doped portions of the substrate; forming a crystalline overlayer on the doped portions of the substrate, wherein the crystalline overlayer has a conductivity lower than that of the doped portions of the substrate. The crystalline overlayer is formed by an epitaxial growth process, the crystalline overlayer is formed as a saddle shape, and the crystalline overlayer has an excess portion protruding from the substrate.
    Type: Application
    Filed: March 16, 2021
    Publication date: July 1, 2021
    Inventor: Te-Yin CHEN
  • Publication number: 20210201284
    Abstract: A sale system and a controlling method thereof are provided. The sale system includes a data acquisition unit, a door, a door control unit, a first image capturing unit, a determining unit and a payment unit. The data acquisition unit is configured to obtain a consumer payment information and withdrawal rights. The door control unit is configured to unlock the door when the consumer payment information and withdrawal rights is obtained. The first image capturing unit is configured to capture an image of a product. When the door is closed, the determining unit determines whether the product has been taken according to the image or a sensing information. When the product has been taken, the payment unit charges a payment based on the consumer payment information and withdrawal rights.
    Type: Application
    Filed: April 21, 2020
    Publication date: July 1, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Hsiang TSAI, Kuan-Ting CHEN, Heng-Yin CHEN, Chin-Ming HAO, Chun-Yen HUANG
  • Publication number: 20210200832
    Abstract: A computing device can present, within a display, first network-associated content and a tab strip, the first network-associated content being associated with a first content locator, the tab strip including a first content indicator associated with the first content locator and a second content indicator associated with a second content locator, receive a directional input associated with the tab strip, in response to receiving the directional input, modify the presentation of the tab strip, the modification ending presentation of the first content indicator and initiating presentation of a third content indicator, the third content indicator being associated with a third content locator, receive a selection of the third content indicator, and in response to receiving the selection of the third content indicator, present second network-associated content at a location where the first network-associated content was previously presented, the second network-associated content being associated with the third con
    Type: Application
    Filed: December 30, 2020
    Publication date: July 1, 2021
    Inventors: Samuel L. Birch, Yusuf Ozuysal, Christopher Lee, Mei Liang, Wei-Yin Chen, Yue Zhang, Ayman Almadhoun
  • Patent number: 11049972
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an epitaxial structure over a semiconductor substrate. The method also includes generating and applying plasma on an entire exposed surface of the epitaxial structure to form a modified region in the epitaxial structure. The plasma is directly applied on the source/drain structure without being filtered out, and the plasma includes ions with different charges. The method further includes forming a metal layer on the modified region and heating the metal layer and the modified region to form a metal-semiconductor compound region.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: June 29, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Cheng Chen, Su-Hao Liu, Kuo-Ju Chen, Liang-Yin Chen
  • Publication number: 20210181739
    Abstract: A method includes receiving a request from a vehicle to perform a computing task, selecting a machine learning model from among a plurality of machine learning models based at least in part on the request, and predicting an amount of computing resources needed to perform the computing task using the selected machine learning model.
    Type: Application
    Filed: December 11, 2019
    Publication date: June 17, 2021
    Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Dawei Chen, Yin-Chen Liu, BaekGyu Kim
  • Publication number: 20210174000
    Abstract: Systems and methods are provided for predicting systematic design rule check (DRC) violations in a placement layout before routing is performed on the placement layout. A systematic DRC violation prediction system includes DRC violation prediction circuitry. The DRC violation prediction circuitry receives placement data associated with a placement layout. The DRC violation prediction circuitry inspects the placement data associated with the placement layout, and the placement data may include data associated with a plurality of regions of the placement layout, which may be inspected on a region-by-region basis. The DRC violation prediction circuitry predicts whether one or more systematic DRC violations would be present in the placement layout due to a subsequent routing of the placement layout.
    Type: Application
    Filed: February 22, 2021
    Publication date: June 10, 2021
    Inventors: Yi-Lin Chuang, Henry Lin, Szu-ju Huang, Yin-An Chen, Amos Hong
  • Publication number: 20210154781
    Abstract: An adjustable workpiece support system includes an adjustable support apparatus, an analysis support point module, a coordinate post-processing module and a control module. The adjustable support apparatus has a group of support devices for supporting a supported workpiece, the each support device being adjustable in height and angle. The analysis support point module is used to import a computer-aided design file of the supported workpiece, and analyze the computer-aided design file to obtain a group of support points of the supported workpiece. The coordinate post-processing module is configured to calculate the support coordinates of the each support device corresponding to the group of support points. The control module is configured to receive the support coordinates of the each support device, and adjust the height and angle of the each support device to support the supported workpiece, so that the amount of deformation of the supported workpiece is the minimum.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 27, 2021
    Inventors: CHUN-TING CHEN, CHIEN-CHIH LIAO, PEI-YIN CHEN, BO-JYUN JHANG, JEN-JI WANG