Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.

Abstract: A method of manufacturing a memory structure is provided. The method includes forming a first gate structure, a second gate structure, and a plurality of source/drain regions in a substrate, in which the plurality of source/drain regions are disposed on opposite sides of the first gate structure and the second gate structures; performing a dry etching process to form a trench between the first gate structure and the second gate structure; performing a wet etching process to expand the trench, in which the expanded trench has a hexagonal shaped cross section profile; and forming a bit line contact in the expanded trench.

Abstract: An integrated circuit (IC) device includes a substrate and a circuit region over the substrate. The circuit region includes at least one active region extending along a first direction, at least one gate region extending across the at least one active region and along a second direction transverse to the first direction, and at least one first input/output (IO) pattern configured to electrically couple the circuit region to external circuitry outside the circuit region. The at least one first IO pattern extends along a third direction oblique to both the first direction and the second direction.

Abstract: A scan flip-flop circuit includes a selection circuit including first and second input terminals coupled to first and second I/O nodes, a flip-flop circuit coupled to the selection circuit, a first driver coupled between the flip-flop circuit and the first I/O node, and a second driver coupled between the flip-flop circuit and the second I/O node. The selection circuit and drivers receive a scan direction signal. In response to a first logic level of the scan direction signal, the selection circuit responds to a first signal received at the first input terminal, and the second driver outputs a second signal responsive to a flip-flop circuit output signal. In response to a second logic level of the scan direction signal, the selection circuit responds to a third signal received at the second input terminal, and the first driver outputs a fourth signal responsive to the flip-flop circuit output signal.

Abstract: An axial flux motor includes a rotor assembly and a stator assembly. The rotor assembly has magnets. The stator assembly has a circuit substrate, segmented iron cores, and a coil. The circuit substrate extends radially. The segmented iron cores are supported on the circuit substrate to be opposite to the magnet in the axial direction. Segmented iron cores arranged in the circumferential direction. A coil is sleeved on a segmented iron core. Holding seats of an insulating material correspond respectively to the segmented iron cores. A holding seat abuts with and covers a segmented iron core from both axial sides and the circumferential direction, and is used for winding the coil. The circuit substrate has slot holes. A slot hole is used for embedding and positioning a portion of a holding seat that protrudes more towards one axial side than the coil.

Abstract: An electronic device includes a substrate, a spacer, a first element and a second element. The spacer is disposed on the substrate and has a first portion, a second portion, a first opening, a second opening and a third opening arranged in a first direction. In a cross-section view, the second opening is located between the first opening and the third opening, the first portion is located between the first opening and the second opening, and the second portion is located between the second opening and the third opening. A width of the first portion is less than a width of the second portion in the first direction, and an area of the second opening is different from an area of the first opening. The first element is overlapped with the first opening. The second element is overlapped with the third opening.

Abstract: A compound metal lid for semiconductor chip package is provided. The compound metal lid includes a first cover and a second cover. The first cover has a first frame body, a plurality of riveting holes, and an upper opening. The riveting holes penetrate through the first frame body and are distributed symmetrically on the first frame body. The upper opening is formed at an inner part of the first frame body, and the riveting holes surround the upper opening. The second cover has a second frame body, a plurality of riveting protrusions, and a lower opening. The riveting protrusions are formed on the upper surface of the second frame body. The lower opening penetrates through the second frame body. The first cover is disposed on an upper surface of the second cover, and the riveting protrusions are correspondingly riveted in the riveting holes.

Abstract: A display device includes a substrate, a first light emitting element, a second light emitting element, and an optical film sheet. The first light emitting element and the second light emitting element are disposed on the substrate. The first light emitting element emits a first light, and the first light has a first wavelength range. The second light emitting element emits a second light, and the second light has a second wavelength range. The optical film sheet is disposed above the first light emitting element and the second light emitting element. The optical film sheet includes a first zone and a second zone. The first zone includes a first cholesteric liquid crystal, and the first cholesteric liquid crystal reflects light in at least the first wavelength range. The second zone includes a second cholesteric liquid crystal, and the second cholesteric liquid crystal reflects light in at least the second wavelength range.

Abstract: There are provided systems and methods for pairwise graph querying, merging, and computing for account linking. A service provider may provide an account graph system to identify pairwise similarities between different accounts based on shared data that may be identified through one or more linking characteristics. When providing pairwise graph similarities, a service provider may receive a query identifying two or more accounts and/or an account with a parameter for graph exploration and querying. The service provider may utilize connection, link, or relationship graphs, queried and generated using a graph database, to determine pairwise similarities between the designated seed account and one or more selected accounts. The graph may include vertices for different queried data points and edges connecting such queries, where directionality of the edges or other vectors may be used to identify links or hops between accounts for data querying and exploration.

Abstract: A smart digital computer platform is disclosed that collects, analyzes, and/or renders appropriate information about fugitive emissions identified by a sensor network-based emissions monitoring system in a facility. More specifically to the methods used by the smart digital computer platform to analyze, filter, and transform the collected monitoring data into a visual output that is capable of being rendered on a graphical user interface (GUI) on a screen display with, in some embodiments, a restricted form factor. For example, smart analytics may be used to cull, filter, and transform the data displayed in a pop-up dialog box on a GUI. In another example, the transformed data may be translated into a visual, graphical element that conveys an abundance of appropriate, tailored information to a particular type of user viewing the GUI.

Abstract: Systems, methods, and devices are described herein for pre-setting scan flip-flops using combinational logic circuits. A system includes a plurality of flip-flop devices and a first pre-setting combinational logic circuit. The plurality of flip-flop devices are coupled together in series and configured to receive a scan input signal, capture data output from each flip-flop device of the plurality of flip-flop devices based on the scan input signal, and generate a scan output signal comprising the captured data. The first pre-setting combinational logic circuit is coupled to a first flip-flop device of the plurality of flip-flop devices. The first pre-setting combinational logic circuit includes a plurality of transistors and is configured to override and set either the scan input signal to the first flip-flop device or the scan output signal of the first flip-flop device based on selective operation of the plurality of transistors.

Abstract: A curable composition is provided comprising a urethane (meth)acrylate oligomer, a urethane (urea) phosphonate ad-hesion promoter, optionally reactive diluents, and an initiator. The use of the urethane (urea) phosphonate adhesion promotor provides better ageing stability and adhesion, as measured by T-peel adhesion test, than the use of other conventional adhesion promotors.

Abstract: A system for assessing extubation includes a respiratory assistance device, an artificial intelligence platform, and a hospital information system. The respiratory assistance device is adapted to communicate with a trachea of a patient. The artificial intelligence platform includes a prediction module. A method for assessing extubation includes the following steps. Measured values of respiratory parameters of the patient are recorded by the respiratory assistance device. The recorded times and the measured values of the respiratory parameters corresponding to each of the recording times are transmitted to the artificial intelligence platform. The prediction module analyzes the measured values of respiratory parameters within a predetermined time period according to a prediction model to generate a prediction result. The prediction result is transmitted to the hospital information system and is recorded into a medical record of the patient.

Abstract: An emulsion component includes a polyglycerol ester-base emulsifier and a polyglycerol ester-based coemulsifier. The polyglycerol ester-base emulsifier has a hydrophilic-lipophilic balance value greater than 10, and is formed by reacting a first polyglycerol having a degree of polymerization ranging from 4 to 20 with a first acid. The polyglycerol ester-based coemulsifier has a hydrophilic-lipophilic balance value not greater than 10, and is formed by reacting a polyol with a second acid. The polyol is selected from the group consisting of a glycerol and a second polyglycerol having a degree of polymerization ranging from 2 to 10. In addition, a weight ratio of the polyglycerol ester-based emulsifier and the polyglycerol ester-based coemulsifier ranges from 0.75 to 8. An oil-in-water sunscreen product including the emulsion component and an oil-in-water sunscreen lotion including the emulsion component are also provided.

Abstract: A method of manufacturing an electronic device including the following steps is provided herein. A plurality of first electronic components is provided. The plurality of first electronic components is transferred onto a plurality of pickup sites. An empty pickup site from the plurality of pickup sites may be figured out, wherein the plurality of first electronic components is absent at the empty pickup site. A second electronic component is transferred onto the empty pickup site. A target substrate is provided. The plurality of first electronic components and the second electronic component are transferred onto the target substrate.

Abstract: A semiconductor device includes a substrate, a bitline, a bitline contact and a land pad. The bitline is over the substrate. The bitline contact is in contact with a bottom of the bitline and in the substrate. The bitline contact includes a first portion and a second portion below the first portion, and the first portion is wider than the second portion from a cross-section view. A word line is adjacent to the bitline contact. A land pad is on the substrate, and the land pad is adjacent to the word line, such that the word line is between the bitline contact and the land pad.

Abstract: A semiconductor structure includes a semiconductor substrate; a spacer located in a trench of the semiconductor substrate, wherein the spacer includes two trench nitride layers and an empty gap sandwiched between the two trench nitride layers; a first nitride layer disposed to seal an exposed opening of the empty gap between the two trench nitride layers; a second nitride layer over the first nitride layer, wherein the second nitride layer has a higher density than the first nitride layer; and a third nitride layer having a first portion over the second nitride layer and a second portion disposed on sidewalls of the two trench nitride layers.

Abstract: A flip-flop includes a first, second, third and a fourth active region extending in a first direction, and being on a first level of a substrate. The first active region corresponds to a first set of transistors of a first type. The second active region corresponds to a second set of transistors of a second type different from the first type. The third active region corresponds to a third set of transistors of the second type. The fourth active region corresponds to a fourth set of transistors of the first type. The flip-flop further includes a first gate structure extending in the second direction, overlapping at least the second active region and the third active region, and being on a second level different from the first level. The first gate structure is configured to receive a first clock signal.

Abstract: A pixel array is provided. The pixel array includes a plurality of pixels, wherein each of the pixels includes a light emitting diode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to the first transistor and an anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to the second transistor. The fourth transistor is coupled to an anode of a light emitting diode of an adjacent pixel, a control terminal of the third transistor, and a cathode of the light emitting diode. The fifth transistor is coupled to the cathode of the light emitting diode, and receives a second control signal and a system low voltage.