Abstract: Lighting units and light fixtures incorporating lighting units having light-diffusing optical fiber are disclosed. Lighting units include a light source, at least one light-diffusing optical fiber optically coupled to the light source, and a support plate. The at least one light-diffusing optical fiber scatters light that is optically coupled into the at least one light-diffusing optical fiber from the light source. The support plate has a retention groove to which a portion of the at least one light-diffusing optical fiber is coupled. The support plate also includes a perimeter. A groove length of the retention groove is greater than the perimeter of the support plate.

Abstract: Embodiments described herein generally relate to methods of forming sub-10 nm node FinFETs. Various processing steps may be performed on a substrate to provide a trench over which a dielectric layer is conformally deposited. The dielectric layer is subsequently etched within the trench to expose the underlying substrate and a semiconductive material is deposited in the trench to form a fin structure. The processes of forming the trench, depositing the dielectric layer, and forming the fin structure can achieve sub-10 nm node dimensions and provide increasingly smaller FinFETs.

Abstract: Methods of distinguishing and identifying a patient with aggressive/indolent, prostatic adenocarcinoma comprising contacting a sample from the patient with a set of detectably labeled probes under hybridization conditions and determining the presence of chromosomal abnormalities in the sample; sets of probes for use in such methods; and kits comprising a set of probes and instructions for distinguishing or identifying a patient as having aggressive/indolent, prostatic adenocarcinoma.

Abstract: A method implemented in a network device of a software-defined network (SDN) system for compressing network state of the SDN system is disclosed. The method comprises combining flow tables for a set of the network elements into a combined table, wherein each row within the combined table is keyed off a common field of each flow table. The method continues with selecting a set of columns of the combined table for compression, wherein the selection is based at least partially on topology of the set of the network elements within the network, and compressing the set of columns of the combined table into a set of compressed entries and a set of classification and regression trees (CaRTs), wherein upon a request for an entity within a predicted subset, an entity within a predicting subset and a corresponding CaRT are used to restore the entity within the predicted subset.

Abstract: Transistors and their methods of formation are described. Low dielectric constant material (e.g. a void) is placed between an elongated gate and a contact to increase the attainable switching speed of the gate of the device. An elongated structural slab of silicon nitride is temporarily positioned on both sides of the gate. Silicon oxide is formed over the silicon nitride slabs and the gate. Contacts are formed through the silicon oxide. The silicon oxide is selectively etched back to expose the silicon nitride slab. A portion or all the silicon nitride slab is removed and replaced with low-K dielectric or any dielectric with an air-gap to enable higher switching speed of the transistor. The highly-selective silicon nitride etch uses remotely excited fluorine and a very low electron temperature in the substrate processing region.

Abstract: A method for anisotropically etching a feature in a Cu-containing layer includes providing a substrate having a Cu-containing layer and a patterned etch mask formed on the Cu-containing layer such that on exposed Cu-containing layer is exposed to processing through the patterned etch mask, passivating a first surface of the exposed Cu-containing layer, and inhibiting passivation of a second surface of the Cu-containing layer. A Cu compound is formed on said second surface of the Cu-containing layer, and the Cu compound is removed from the second surface of the Cu-containing layer to anisotropically etch a feature in the Cu-containing layer.

Abstract: A method implemented by a network topology design system, the network topology design system including a processing device. The method to determine placement of a controller within a network with a split architecture where control plane components of the split architecture network are executed by a controller and the control plane components are separate from data plane components of the split architecture network. The placement of the controller is selected to minimize disruption of the split architecture network caused by a link failure, a switch failure or a connectivity loss between the controller and the data plane components.

Abstract: Embodiments of the present disclosure provide methods for forming nanowire structures with desired materials for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one example, a method of forming nanowire structures on a substrate includes in a suspended nanowire structure on a substrate, the suspended nanowire includes multiple material layers having a spaced apart relationship repeatedly formed in the suspended nanowire structure, wherein the material layer includes a coating layer coated on an outer surface of a main body formed in the material layer, selectively removing a first portion of the coating layer from the material layers to expose the underlying main body of the material layers while maintaining a second portion of the coating layer remaining on the material layers, laterally etching the main body of the material layers exposed by removal of the coating layer, and selectively growing film layers on the exposed main body of the material layer.

Abstract: The present disclosure provides forming nanostructures with precision dimension control and minimum lithographic related errors for features with dimension under 14 nanometers and beyond. A self-aligned multiple spacer patterning (SAMSP) process is provided herein and the process utilizes minimum lithographic exposure process, but rather multiple deposition/etching process to incrementally reduce feature sizes formed in the mask along the manufacturing process, until a desired extreme small dimension nanostructures are formed in a mask layer.

Abstract: Embodiments of the present disclosure provide methods for forming nanowire structures with desired materials for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one example, a method of forming nanowire structures on a substrate includes performing an ion implantation process to dope dopants into a suspended nanowire structure on a substrate, the suspended nanowire includes multiple material layers having a spaced apart relationship repeatedly formed in the suspended nanowire structure, wherein the material layer predominantly comprises a first type of atoms formed therein, the dopants including a second type of atoms into the suspended nanowire structure, oxidating surfaces of the multiple material layers, and converting the first type of atoms in the material layer to the second type of atoms from the dopants doped therein.

Abstract: Embodiments of the present disclosure provide methods for forming nanowire structures with desired materials for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one embodiment, a method of forming nanowire structures on a substrate includes forming a multi-material layer on a substrate, wherein the multi-material layer includes repeating pairs of a first layer and a second layer, the substrate further comprising a patterned hardmask layer disposed on the multi-material layer, etching the multi-material layer through openings defined by the patterned hardmask layer to expose sidewalls of the first and the second layer of the multi-material layer, and laterally and selectively etching the second layer from the substrate.

Abstract: A pest biocontrol method and device for flying insects configured to be used with solar power is disclosed. The device includes a solar panel, a solar rechargeable battery pack, a solar charge controller, an insect-attracting lamp and/or a semiochemical vial, and a biopesticide-spraying device. This biocontrol device can be used with or without a trap fan to draw in insects, and an exit fan that draws out infected insects to be released. The said device accomplishes AIR (Attract-Infect-Release) method of insect biocontrol.

Abstract: Embodiments of the present invention provide a methods for forming silicon recess structures in a substrate with good process control, particularly suitable for manufacturing three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one embodiment, a method of forming recess structures in a substrate includes etching a first portion of a substrate defined by a second portion formed in the substrate until a doping layer formed in the substrate is exposed.

Abstract: The present invention provides a method for non-invasively detecting the expression levels of miRNAs in cell media and determining the types and status of the cells, and specifically provides a method for determining the type and status of the cells according to the expression level of miRNAs in a cell medium. The method comprises: culturing different types of cells, collecting the medium of the cells, extracting RNAs from the medium, performing reverse transcription on the RNAs, detecting miRNAs in the cell medium by the fluorescent quantitative PCR method, and determining the types and status of the detected cells according to the relationship between the expression levels of miRNAs in different types and status of cells and the expression level of the detected miRNAs.

Abstract: Methods and apparatus for forming FinFET structures are provided. Selective etching and deposition processes described herein may provide for FinFET manufacturing without the utilization of multiple patterning processes. Embodiments described herein also provide for fin material manufacturing methods for transitioning from silicon to III-V materials while maintaining acceptable crystal lattice orientations of the various materials utilized. Further embodiments provide etching apparatus which may be utilized to perform the methods described herein.

Abstract: A method implemented in a network for placing services in a SDN system is disclosed. The network contains a plurality of network devices managed by a SDN controller and offers a set of services to subscribers. Subsets of the set of services are included in ordered service chains for subscribers. The method starts with determining a list of bandwidth consumption entities of a service for each service, where each bandwidth consumption entity is based on one or more chains of services. Then a weight of each service is calculated based on the list of bandwidth consumption entities of the service and a service with the highest weight within a group of services that have not been placed in the SDN system is selected. The selected service is then placed at a network device based at least partially on calculating bandwidth impacts to the SDN system by the service.

Abstract: Systems and methods for extracting regions from occupancy grids are provided. One example method includes performing a plurality of assignment iterations. Each assignment iteration includes assigning each of a first plurality of cells to one of a plurality of centroids based on a cost formula such that a plurality of regions respectively associated with the plurality of centroids are formed. The region for each centroid comprises all of the cells assigned to such centroid. Each assignment iteration includes reassigning one or more of the first plurality of cells to one or more respective alternate regions. The one or more reassigned cells were included in one or more problem areas of one or more of the plurality of regions. Each assignment iteration includes relocating the plurality of centroids to be the respective means of the plurality of regions. One example system includes computing devices implementing instructions stored on non-transitory computer-readable media.

Abstract: A network element controls congestion in a link of a packet data network. A congested link is identified and a throttle rate is determined for one or more of the traffic groups traversing the congested link. The central controller determines the throttle rates using a weight of the group and the current traffic rate of the group through the link. The throttle rates are sent to switches to throttle traffic for each affected group.

Abstract: A method and apparatus for providing a data object from a Content Server to a client device over a Radio Access Network (RAN). A first property is determined that may affect the way in which the data object is to be transferred. A property of the data object is also determined. In response to the determined first property and the property of the data object, a characteristic of a transfer of the data object from the Content Server to the client device is amended. The data object is then provided from the Content Server to the client device. The method allows characteristics of the transfer of the data object to be changed to optimize transfer to the client device. Examples of the first property include properties in the RAN or client device instructions.

Abstract: The invention is a routing algorithm characteristic that minimizes the weight, meaning that the probability that a node is disconnected from the controller in case of a failure in the network is minimized. The first algorithm used in the invention is an approximation algorithm for finding the controller routing tree that provides maximum resilience in the network. The algorithm is referred to herein as the Maximum Resilience (MR) algorithm. The heuristic MR algorithm selects a shortest-path tree as a starting point and modifies the tree in order to improve resilience. The output of the MR algorithm is not necessarily a shortest-path tree, but provides more resilience compared to the initial tree. The RASP algorithm provides a shortest-path tree with improved network resilience compared to other possible shortest-path trees.