Abstract: An alignment system includes a first module having a plurality of emitters and a first receiver configuration located on the face of the first module. A second module has a second plurality of emitters and a second receiver configuration located on the face of the second module. First and second trigger signal generators fire the first and second plurality of the emitters. The generated signals are sensed by at least some of the receivers. A converter arrangement obtain and convert the received signals into digital data representative of the readings received by selected receivers. A processing system computes at least one of an absolute six degree offset or a relative six degree offset between the faces. The offset information is then used to achieve a desired alignment between the face of the first module and the face of the second module.

Abstract: A first aspect of the present invention is a method of forming an isolation structure including: (a) providing a semiconductor substrate; (b) forming a buried N-doped region in the substrate; (c) forming a vertical trench in the substrate, the trench extending into the N-doped region; (d) removing the N-doped region to form a lateral trench communicating with and extending perpendicular to the vertical trench; and (e) at least partially filling the lateral trench and filling the vertical trench with one or more insulating materials.

Abstract: Disclosed is an optical waveguide having an optical confinement layer.

Abstract: A method is presented for a time-aware strategy utilized within message-initiated constraint-based routing for digital message communication among nodes in an ad-hoc network, in which each node includes attributes. The method includes determining local attributes for each of the nodes and defining constraints on the attributes. Each node is provided access to the attributes of each neighboring node, with a neighboring node being a node that is one hop away. Each message transmitted over the network has a message type, which includes a destination specification, route specification, and objective specification. Constraint checking and cost estimation checking are performed for each message type.

Abstract: A method is presented for a learning-based strategy utilized within message-initiated constraint-based routing for digital message communication among nodes in an ad-hoc network, in which each node includes attributes. The method includes determining local attributes for each of the nodes and defining constraints on the attributes. Each node is provided access to the attributes of each neighboring node. Each message transmitted over the network has a message type, which includes a destination specification, route specification, and objective specification. Constraint checking and cost estimation checking are performed for each message type. Cost estimation is utilized to converge on an optimal message path.

Abstract: A method is presented for message-initiated constraint-based routing for digital message communication among nodes in an ad-hoc network, in which each node includes attributes having attribute values. The method includes determining local attributes for each of the nodes in the ad-hoc network and defining constraints on the attributes. Each node is provided access to the attributes of each neighboring node, with a neighboring node being a node that is one hop away. Each message transmitted over the ad-hoc network has a message type, which includes a destination specification, route specification, and objective specification. Constraint checking and cost estimation checking are performed for each message type.

Abstract: Disclosed is an optical waveguide having an optical confinement layer.

Abstract: A network element can be configured for connection to any portion of a communication network: access, transport and core. Moreover, a single network element can be configured to couple subscriber equipment directly to the core portion of the network, thereby permitting the subscriber to bypass the transport portion of the network. Specifically, such a network element can be configured to include a line unit that supports subscriber equipment (also called a “subscriber line unit”), and also to include a line unit to support a link to the core of the communication network (also called a “core line unit”). The subscriber line unit and core line unit are both installed in a single chassis, and each unit can be installed in any of a number of slots in the chassis. Moreover, when configured with appropriate line units, such a network element may support traditional circuit-switched telephony services while simultaneously delivering packet-based voice or data services.

Abstract: The present invention provides a thermosensitive and biodegradable microgel and a method of synthesizing such microgels. The thermosensitive and biodegradable microgel is synthesized from a macromer comprising a thermosensitive block polymer co-polymerized with a biodegradable moiety encapped with a cross-linkable or polymerizable moiety at either end. The microgels of the present invention are synthesized by inverse suspension polymerization of the macromers. The microgels are biodegradable into components that are non-toxic and easily removed from the body. The microgel of the present invention is temperature sensitive and is “intelligent” as well as biodegradable. The microgels are preferably used for the controlled release of a drug or in tissue engineering. Most preferably, the microgels are suitable for the control release of biologically active substances such as proteins.

Abstract: A method (and structure formed thereby) of forming a metal silicide contact on a non-planar silicon containing region having controlled consumption of the silicon containing region, includes forming a blanket metal layer over the silicon containing region, forming a silicon layer over the metal layer, etching anisotropically and selectively with respect to the metal the silicon layer, reacting the metal with silicon at a first temperature to form a metal silicon alloy, etching unreacted portions of the metal layer, annealing at a second temperature to form an alloy of metal-Si2, and selectively etching the unreacted silicon layer.

Abstract: A process for making abrupt, e.g. <20 nm/decade, PN junctions and haloes in, e.g., CMOSFETs having gate lengths of, e.g. <50 nm, uses a mask, e.g., sidewall spacers, during ion implantation of gate, source, and drain regions. The mask is removed after source-drain activation by annealing and source and drain extension regions are then implanted. Then the extension regions are activated. Thereafter halo regions are implanted and activated preferably using spike annealing to prevent their diffusion. The process can also be used to make diodes, bipolar transistors, etc. The activation annealing steps can be combined into a single step near the end of the process.

Abstract: Disclosed is an optical waveguide having an optical confinement layer.

Abstract: Media for growth enhancement and resuscitation of mycobacteria (such as Mycobacterium tuberculosis, Mycobacterium paratuberculosis, and Mycobacterium leprae) are provided. The media comprise isolated cell extract, early-stationary-phase or stationary phase supernatant, or a substantially purified component thereof such as a protein, a peptide fragment of the protein, or a phospholipid. The protein is Rv1147c and the phospholipid or a component of a phospholipid. Diagnostic methods and kits utilizing the media are also provided, as well as treatment methods utilizing spent culture supernatant and cell extracts, or components thereof.

Abstract: A method (and structure formed thereby) of forming a metal silicide contact on a non-planar silicon containing region having controlled consumption of the silicon containing region, includes forming a blanket metal layer over the silicon containing region, forming a silicon layer over the metal layer, etching anisotropically and selectively with respect to the metal the silicon layer, reacting the metal with silicon at a first temperature to form a metal silicon alloy, etching unreacted portions of the metal layer, annealing at a second temperature to form an alloy of metal-Si2, and selectively etching the unreacted silicon layer.

Abstract: A method for manufacturing an optical waveguide device in accordance with the present invention includes the steps of depositing a lower cladding layer; coating a photoresist layer directly on the lower cladding layer; patterning the photoresist layer to create channels; depositing a core layer, wherein a first portion of the core layer is deposited inside the channels and a second portion overlays the patterned photoresist layer; removing the patterned photoresist layer and the second portions of the core layer overlaying the patterned photoresist layer; and depositing an upper cladding layer.

Abstract: An alignment system includes a first module wherein a plurality of emitters are located at defined locations on the face of the first module. The emitters are positioned to emit signals of a known intensity distribution away from the face of the first module. A first receiver configuration is also located on the face of the first module, where the first receiver configuration has a known sensitivity distribution. A second module has a second plurality of emitters located at defined locations on the face of the module. The second plurality of emitters are positioned to emit signals of a known intensity distribution away from the face of the second module. A second receiver configuration is also located on the face of the second module, and has a known sensitivity distribution. First and second trigger signal generators are configured to fire the first and second plurality of emitters, respectively, in predetermined patterns.

Abstract: A method for changing the surface termination of a perovskite substrate surface, an example of which is the conversion of B-site terminations of a single-crystal STO substrate to A-site terminations. The method generally comprises the steps of etching the substrate surface by applying a reactive plasma thereto in the presence of fluorine or another halogen, and then annealing the substrate at a temperature sufficient to regenerate a long range order of the surface, i.e., the surface termination contributes to a better long range order in a film epitaxially grown on the surface. More particularly, the resulting substrate surfaces predominantly contains A-site surface terminations, i.e., SrO for STO (100) substrates. As a result, disadvantages associated with B-site terminated perovskite substrate surfaces are avoided. A suitable etching treatment is a low power oxygen ashing in the presence of low halogen levels.

Abstract: A method of forming a notched gate structure having substantially vertical sidewalls and a sub-0.05 &mgr;m electrical critical dimension is provided. The method includes forming a conductive layer on an insulating layer; forming a mask on the conductive layer so as to at least protect a portion of the conductive layer; anisotropically etching the conductive layer not protected by the mask so as to thin the conductive layer to a predetermined thickness and to form a conductive feature underlying the mask, the conductive feature having substantially vertical sidewalls; forming a passivating layer at least on the substantially vertical sidewalls; and isotropically etching remaining conductive layer not protected by the mask to remove the predetermined thickness thereby exposing a lower portion of said conductive feature not containing the passivating layer, while simultaneously removing notched regions in the lower portion of the conductive feature.

Abstract: A process for making abrupt, e.g. <20 nm/decade, PN junctions and haloes in, e.g., CMOSFETs having gate lengths of, e.g. <50 nm, uses a mask, e.g., sidewall spacers, during ion implantation of gate, source, and drain regions. The mask is removed after source-drain activation by annealing and source and drain extension regions are then implanted. Then the extension regions are activated. Thereafter halo regions are implanted and activated preferably using spike annealing to prevent their diffusion. The process can also be used to make diodes, bipolar transistors, etc. The activation annealing steps can be combined into a single step near the end of the process.

Abstract: The invention relates generally to lithographic patterning of very small features. In particular, the invention relates generally to patterning of semiconductor circuit features smaller than lithographically defined using either conventional optical lithography or next generation lithography techniques. The invention relates more particularly, but not by way of limitation, to lateral trimming of photoresist images.