Patents by Inventor Ying Zhang

Ying Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080045011
    Abstract: A trilayer resist (TLR) patterning scheme is provided to enable gate conductors, particularly polySi gate conductors, with critical dimensions (CDs) of less than 40 nm and minimal LER and LWR. In accordance with the present invention, the inventive patterning scheme utilizes an organic/inorganic/organic multilayer stack instead of an organic layer used in the prior art. The top organic layer of the inventive TLR is a photoresist material such as a 193 nm photoresist that is located atop an antireflective coating (ARC), which is also comprised of an organic material. The middle inorganic layer of the TLR comprises any oxide layer such as, for example, a low temperature (less than or equal to 250° C.) chemical vapor deposited (CVD) oxide, an oxide derived from TEOS (tetraethylorthosilicate), silicon oxide, a silane oxide, or a Si-containing ARC material.
    Type: Application
    Filed: August 18, 2006
    Publication date: February 21, 2008
    Applicant: International Business Machines Corporation
    Inventors: Nicholas C. Fuller, Timothy J. Dalton, Ying Zhang
  • Publication number: 20080029818
    Abstract: A first aspect of the present invention is a method of forming an isolation structure including: (a) providing a semiconductor substrate; (b) forming a buried N-doped region in the substrate; (c) forming a vertical trench in the substrate, the trench extending into the N-doped region; (d) removing the N-doped region to form a lateral trench communicating with and extending perpendicular to the vertical trench; and (e) at least partially filling the lateral trench and filling the vertical trench with one or more insulating materials.
    Type: Application
    Filed: October 12, 2007
    Publication date: February 7, 2008
    Inventors: An Steegen, Maheswaran Surendra, Hsing-Jen Wann, Ying Zhang, Franz Zach, Robert Wong
  • Patent number: 7326983
    Abstract: A first aspect of the present invention is a method of forming an isolation structure including: (a) providing a semiconductor substrate; (b) forming a buried N-doped region in the substrate; (c) forming a vertical trench in the substrate, the trench extending into the N-doped region; (d) removing the N-doped region to form a lateral trench communicating with and extending perpendicular to the vertical trench; and (e) at least partially filling the lateral trench and filling the vertical trench with one or more insulating materials.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: February 5, 2008
    Assignee: International Business Machines Corporation
    Inventors: An L. Steegen, Maheswaran Surendra, Hsing-Jen Wann, Ying Zhang, Franz Zach, Robert Wong
  • Publication number: 20080010286
    Abstract: A system receives, at a server, an action request from a client associated with bookmarks, where the bookmarks identify user designated documents. The system accesses bookmark records stored at the server based on the action request and acting on the bookmark records in a manner specified by the action request.
    Type: Application
    Filed: January 9, 2006
    Publication date: January 10, 2008
    Inventors: Ying Zhang, Jeffrey Korn
  • Publication number: 20080008418
    Abstract: An optical microresonator device is described including an optical waveguide and an optical microresonator positioned so as to optically couple to the waveguide. The waveguide includes a core and a metal cladding layer on at least part of one boundary of the core.
    Type: Application
    Filed: March 29, 2006
    Publication date: January 10, 2008
    Inventors: Terry Smith, Barry Koch, Michael Haase, Jun-Ying Zhang, Robert Wilson, Xudong Fan
  • Publication number: 20080003735
    Abstract: A semiconductor device includes a semiconductor substrate having at least one gap, extending under a portion of the semiconductor substrate. A gate stack is on the semiconductor substrate. A strain layer is formed in at least a portion of the at least one gap. The strain layer is formed only under at least one of a source region and a drain region of the semiconductor device.
    Type: Application
    Filed: September 13, 2007
    Publication date: January 3, 2008
    Applicant: International Business Machines Corporation
    Inventors: An STEEGEN, Haining Yang, Ying Zhang
  • Publication number: 20070278586
    Abstract: Methods for fabricating a CMOS structure use a first gate stack located over a first orientation region of a semiconductor substrate. A second gate material layer is located over the first gate stack and a laterally adjacent second orientation region of the semiconductor substrate. A planarizing layer is located upon the second gate material layer. The planarizing layer and the second gate material layer are non-selectively etched to form a second gate stack that approximates the height of the first gate stack. An etch stop layer may also be formed upon the first gate stack. The resulting CMOS structure may comprise different gate dielectrics, metal gates and silicon gates.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 6, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tze-Chiang Chen, Meikei Ieong, Rajarao Jammy, Mukesh Khare, Chun-yung Sung, Richard Wise, Hongwen Yan, Ying Zhang
  • Patent number: 7304116
    Abstract: A braided comb-shaped salt-resistant thickening agent for tertiary oil extraction from class I oil reservoir is disclosed. The agent is polymerized with monomer (A) and monomer (B), and monomer (A) is one or multiple water soluble non-saturated compound(s) with alkenyl chain, while monomer (B) is at least one compound with the following formula: Monomer (A) is preferably acrylamide, ethenyl pyrrolidone, 2-acrylamide-2 methylpropane sulfonic acid, and acrylic acid or the mixture of the above said compounds, and in the formula of monomer (B), A is COOH, OH, SO3H, R1 and R2 are H or C1-C12 alkyl, R3 and R4 represent C1-C12 alkyl, C1-C12 alkylaryl, C1-C12 alkyl ether or C1-C12 alkyl ester group. This thickening agent has fine water solubility and good property to thicken water medium. The polymer's molecules present a braided comb-shaped structure in water solution with fine salt-resistant performances.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: December 4, 2007
    Assignee: Petrochina Company Limited
    Inventors: Shiyi Yuan, Jianhui Luo, Ruoying Pu, Yuzhang Liu, Huaijiang Zhu, Pingmei Wang, Chunming Xiong, Ying Zhang, Fengluan Bai, Jingbo Yang
  • Publication number: 20070230870
    Abstract: A method of making a microresonator device includes the steps of providing at least a first substrate and providing a waveguide integrated on the substrate. The waveguide includes a core and a metal cladding layer on at least part of one boundary of the core. Another step is positioning a microresonator so that it is in an optically coupling relationship with the waveguide.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 4, 2007
    Inventors: Terry Smith, Barry Koch, Michael Haase, Jun-Ying Zhang, Robert Wilson, Xudong Fan
  • Publication number: 20070218620
    Abstract: A method and device providing a strained Si film with reduced defects is provided, where the strained Si film forms a fin vertically oriented on a surface of a non-conductive substrate. The strained Si film or fin may form a semiconductor channel having relatively small dimensions while also having few defects. The strained Si fin is formed by growing Si on the side of a relaxed SiGe block. A dielectric gate, such as, for example, an oxide, a high “k” material, or a combination of the two, may be formed on a surface of the strained Si film. Additionally, without substantially affecting the stress in the strained Si film, the relaxed SiGe block may be removed to allow a second gate oxide to be formed on the surface previously occupied by the relaxed SiGe block.
    Type: Application
    Filed: May 29, 2007
    Publication date: September 20, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huilong ZHU, Steven BEDELL, Bruce DORIS, Ying ZHANG
  • Publication number: 20070196425
    Abstract: The present invention provides a thermosensitive and biodegradable microgel and a method of synthesizing such microgels. The thermosensitive and biodegradable microgel is synthesized from a macromer comprising a thermosensitive block polymer co-polymerized with a biodegradable moiety encapped with a cross-linkable or polymerizable moiety at either end. The microgels of the present invention are synthesized by inverse suspension polymerization of the macromers. The microgels are biodegradable into components that are non-toxic and easily removed from the body. The microgel of the present invention is temperature sensitive and is “intelligent” as well as biodegradable. The microgels are preferably used for the controlled release of a drug or in tissue engineering. Most preferably, the microgels are suitable for the control release of biologically active substances such as proteins.
    Type: Application
    Filed: April 27, 2007
    Publication date: August 23, 2007
    Inventors: Jiandong DING, Wen Zhu, Biaobing Wang, Ying Zhang
  • Patent number: 7257966
    Abstract: The present invention is directed to methods for improving the efficiency of processes for the recovery of natural gas liquids from a gas feed, e.g., raw natural gas or a refinery or petrochemical plant gas stream. These methods may be employed with most, if not all, conventional separation methods using distillation towers, e.g., a demethanizer and/or deethanizer column. The methods of the present invention involve installing an internal refrigeration system consisting of an open cycle refrigerant withdrawn from a distillation column and a closed cycle refrigerant derived from the open cycle refrigeration system. A separator is installed downstream of the recycle compressor discharge cooler in the open cycle refrigeration scheme. At least a portion of liquid withdrawn from this separator is used as a closed cycle refrigerant by indirect heat exchange with the inlet gas or other process streams. Thus a closed refrigeration cycle enhances the performance of the open refrigeration cycle.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: August 21, 2007
    Assignee: IPSI, L.L.C.
    Inventors: Rong-Jwyn Lee, Ying Zhang, Jame Yao, Jong Juh Chen, Douglas G. Elliot
  • Publication number: 20070181930
    Abstract: A gated semiconductor device is provided, in which the body has a first dimension extending in a lateral direction parallel to a major surface of a substrate, and second dimension extending in a direction at least substantially vertical and at least substantially perpendicular to the major surface, the body having a first side and a second side opposite the first side. The gated semiconductor device includes a first gate overlying the first side, and having a first gate length in the lateral direction. The gated semiconductor device further includes a second gate overlying the second side, the second gate having a second gate length in the lateral direction which is different from, and preferably shorter than the first gate length. In one embodiment, the first gate and the second gate being electrically isolated from each other. In another embodiment the first gate consists essentially of polycrystalline silicon germanium and the second gate consists essentially of polysilicon.
    Type: Application
    Filed: August 31, 2004
    Publication date: August 9, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huilong Zhu, Bruce Doris, Xinlin Wang, Jochen Beintner, Ying Zhang, Philip Oldiges
  • Patent number: 7247912
    Abstract: A method and device providing a strained Si film with reduced defects is provided, where the strained Si film forms a fin vertically oriented on a surface of a non-conductive substrate. The strained Si film or fin may form a semiconductor channel having relatively small dimensions while also having few defects. The strained Si fin is formed by growing Si on the side of a relaxed SiGe block. A dielectric gate, such as, for example, an oxide, a high “k” material, or a combination of the two, may be formed on a surface of the strained Si film. Additionally, without substantially affecting the stress in the strained Si film, the relaxed SiGe block may be removed to allow a second gate oxide to be formed on the surface previously occupied by the relaxed SiGe block.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: July 24, 2007
    Assignee: International Business Machines Corporation
    Inventors: Hiulong Zhu, Steven W. Bedell, Bruce B. Doris, Ying Zhang
  • Publication number: 20070152273
    Abstract: A semiconductor structure and a method of fabricating the same wherein the structure includes at least one nFET device and a least one pFET device, where at least one of the devices is a thinned Si-containing gated device and the other device is a metal gated device are provided. That is, a semiconductor structure is provided wherein at least one of the nFET or pFET devices includes a gate electrode stack comprising a thinned Si-containing electrode, i.e., polysilicon electrode, and an overlying first metal, while the other device includes a gate electrode stack that includes at least the first metal gate, without the thinned Si-containing electrode.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Applicant: INTERNATIONAL BUNISESS MACHINES CORPORATION
    Inventors: Alessandro Callegari, Tze-Chiang Chen, Michael Chudzik, Bruce Doris, Young-Hee Kim, Vijay Narayanan, Vamsi Paruchuri, Michelle Steen, Ying Zhang
  • Publication number: 20070150176
    Abstract: A system and method for performing distributed sequential node localization in active sensor deployment is presented. An equilateral orthogonal reference frame is defined. The reference frame includes s+1 anchor nodes that is placed in s-dimensional physical space. New nodes are sequentially placed in a natural sequential ordering within the s-dimensional physical space to form a sequentially well-connected network. For each of the new nodes, location estimates are obtained for the new node from at least s+1 of the anchor nodes previously placed in the s-dimensional physical space. A location is determined for the new node based on the location estimates. The new node are placed in the s-dimensional physical space as a new anchor node proximate to at least one of the s+1 previously-placed anchor nodes upon satisfactory location determination.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 28, 2007
    Inventors: Ying Zhang, Qingfeng Huang, Juan Liu
  • Publication number: 20070140149
    Abstract: One embodiment of the present invention provides a system that optimizes packet transmissions during a convergecast operation in a convergecast network. During operation, the system receives a request to perform the convergecast operation in the convergecast network. This convergecast network includes a base-station and a plurality of nodes, wherein during the convergecast operation the plurality of nodes communicate packets to the base-station. In response to the request, the system constructs a convergecast-tree, which includes the base-station and the plurality of nodes, based on hop counts from the plurality of nodes to the base-station. Next, the system linearizes the convergecast-tree so that the convergecast-tree contains a plurality of linear branches. The system then schedules packet transmission for each of the linear branches and each node in each branch based on a set of predetermined criteria to obtain a scheduled order.
    Type: Application
    Filed: December 20, 2005
    Publication date: June 21, 2007
    Inventors: Shashidhar Gandham, Ying Zhang, Qingfeng Huang
  • Patent number: 7226617
    Abstract: The present invention provides a thermosensitive and biodegradable microgel and a method of synthesizing such microgels. The thermosensitive and biodegradable microgel is synthesized from a macromer comprising a thermosensitive block polymer co-polymerized with a biodegradable moiety encapped with a cross-linkable or polymerizable moiety at either end. The microgels of the present invention are synthesized by inverse suspension polymerization of the macromers. The microgels are biodegradable into components that are non-toxic and easily removed from the body. The microgel of the present invention is temperature sensitive and is “intelligent” as well as biodegradable. The microgels are preferably used for the controlled release of a drug or in tissue engineering. Most preferably, the microgels are suitable for the control release of biologically active substances such as proteins.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: June 5, 2007
    Assignee: Fudan University
    Inventors: Jiandong Ding, Wen Zhu, Biaobing Wang, Ying Zhang
  • Patent number: 7218808
    Abstract: An optical equalizer circuit for a light source, the optical equalizer circuit comprising M optical couplers linked by differential delay lines, wherein coupling ratios for the respective M optical couplers of the equalizer circuit are calculated based on an input signal from the light source and a designed profile the optical input is to be equalized to.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: May 15, 2007
    Assignee: Agency for Science, Technology and Research
    Inventors: Ying Zhang, Qi Jie Wang, Yeng Chai Soh
  • Patent number: 7211490
    Abstract: Described is a method for making thin channel silicon-on-insulator structures. The inventive method comprises forming a set of thin spacer abutting a gate region in a first device and a second device region; forming a raised source/drain region on either side of the gate region in the first device region and the second device region, implanting dopants of a first conductivity type into the raised source drain region in the first device region to form a first dopant impurity region, where the second device region is protected by a second device region block mask; implanting dopants of a second conductivity type into the raised source/drain region in the second device region to form a second dopant impurity region, where the first device region is protected by a first device region block mask; and activating the first dopant impurity region and the second dopant impurity region to provide a thin channel MOSFET.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: May 1, 2007
    Assignee: International Business Machines Corporation
    Inventors: Bruce B. Doris, Thomas S. Kanarsky, Ying Zhang, Huilong Zhu, Meikei Ieong, Omer Dokumaci