Patents by Inventor Yong Cao

Yong Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11600477
    Abstract: Embodiments of process shield for use in process chambers are provided herein. In some embodiments, a process shield for use in a process chamber includes: an annular body having an upper portion and a lower portion extending downward and radially inward from the upper portion, wherein the upper portion includes a plurality of annular trenches on an upper surface thereof and having a plurality of slots disposed therebetween to fluidly couple the plurality of annular trenches, wherein one or more inlets extend from an outer surface of the annular body to an outermost trench of the plurality of annular trenches.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 7, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kirankumar Neelasandra Savandaiah, Shane Lavan, Sundarapandian Ramalinga Vijayalakshmi Reddy, Randal Dean Schmieding, Yong Cao
  • Patent number: 11600761
    Abstract: A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: March 7, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
  • Patent number: 11598956
    Abstract: An eyeball tracking system is provided, which includes: an illumination light source, configured to transmit an illumination light ray to a beam scanner; the beam scanner, configured to project the illumination light ray onto an entrance pupil optical apparatus; the entrance pupil optical apparatus, configured to reflect, reproduce, or refract the illumination light ray, so that the reflected, reproduced, or refracted illumination light ray illuminates an eyeball; a photoelectric detector, configured to: collect a receive optical power value of an eyeball reflection light ray, and send the receive optical power value to a controller; and the controller, configured to: receive the receive optical power value sent by the photoelectric detector, determine, based on the receive optical power value, an optical power reference value, and determine a current gaze direction of the eyeball based on the optical power reference value.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: March 7, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zhenlin Xie, Yong Cao, Patricia Leichliter
  • Patent number: 11572618
    Abstract: A method of depositing a backside film layer on a backside of a substrate includes loading a substrate having one or more films deposited on a front side of the substrate onto a substrate support of a processing chamber, depositing, from the sputter target, a target material on the backside of the substrate to form a backside layer on the backside of the substrate, and applying an RF bias to an electrode disposed within the substrate support while depositing the target material. The front side of the substrate faces the substrate support and is spaced from a top surface of the substrate support, and a backside of the substrate faces a sputter target of the processing chamber.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: February 7, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jothilingam Ramalingam, Xiaozhou Che, Yong Cao, Shane Lavan, Chunming Zhou
  • Publication number: 20220415649
    Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 29, 2022
    Inventors: Chunming ZHOU, Jothilingam RAMALINGAM, Yong CAO, Kevin Vincent MORAES, Shane LAVAN
  • Publication number: 20220415636
    Abstract: A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Jothilingam Ramalingam, Yong Cao, Ilya Lavitsky, Keith A. Miller, Tza-Jing Gung, Xianmin Tang, Shane Lavan, Randy D. Schmieding, John C. Forster, Kirankumar Neelasandra Savandaiah
  • Publication number: 20220415637
    Abstract: A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.
    Type: Application
    Filed: July 11, 2022
    Publication date: December 29, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Jothilingam Ramalingam, Yong Cao, Ilya Lavitsky, Keith A. Miller, Tza-Jing Gung, Xianmin Tang, Shane Lavan, Randy D. Schmieding, John C. Forster, Kirankumar Neelasandra Savandaiah
  • Patent number: 11527883
    Abstract: A battery protection apparatus power protection apparatus is configured to protect an electrochemical cell connected to a load, and includes a protection IC, a switching transistor group, and a sampling resistor. The protection IC includes two power input terminals respectively connected to positive and negative electrodes of the electrochemical cell, and an operational amplifier, where the operational amplifier includes a positive input pin, a negative input pin, and an output pin. The switching transistor group is connected between the negative electrode of the electrochemical cell and the load, and is configured to control turn-on and turn-off of a charge and discharge circuit of the electrochemical cell. The sampling detection resistor Rs is serially connected between the sampling circuit detection terminal and the output pin, where the main circuit detection terminal is connected to the positive input pin, and the sampling circuit detection terminal is connected to the negative input pin.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: December 13, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xinyu Liu, Yanding Liu, Ce Liu, Pinghua Wang, Yong Cao
  • Publication number: 20220384705
    Abstract: A physical vapor deposition system includes a chamber, three target supports to targets, a movable shield positioned having an opening therethrough, a workpiece support to hold a workpiece in the chamber, a gas supply to deliver nitrogen gas and an inert gas to the chamber, a power source, and a controller. The controller is configured to move the shield to position the opening adjacent each target in turn, and at each target cause the power source to apply power sufficient to ignite a plasma in the chamber to cause deposition of a buffer layer, a device layer of a first material that is a metal nitride suitable for use as a superconductor at temperatures above 8° K on the buffer layer, and a capping layer, respectively.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Mingwei Zhu, Zihao Yang, Nag B. Patibandla, Ludovic Godet, Yong Cao, Daniel Lee Diehl, Zhebo Chen
  • Patent number: 11495461
    Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: November 8, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tejinder Singh, Suketu Arun Parikh, Daniel Lee Diehl, Michael Anthony Stolfi, Jothilingam Ramalingam, Yong Cao, Lifan Yan, Chi-I Lang, Hoyung David Hwang
  • Patent number: 11469096
    Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: October 11, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Chunming Zhou, Jothilingam Ramalingam, Yong Cao, Kevin Vincent Moraes, Shane Lavan
  • Publication number: 20220302874
    Abstract: Embodiments of this application provide a photovoltaic power conversion apparatus. The photovoltaic power conversion apparatus includes a first housing, a power component, at least one second housing, and at least one wiring terminal. The first housing forms a first accommodation cavity, and the power component is fixedly disposed in the first accommodation cavity. The at least one of the second housing forms a second accommodation cavity, and the at least one second housing is disposed outside a connection area of a first side wall of the first housing by using an installation wall. The wiring terminal sealingly penetrates through a part of the connection area of the first side wall, a first end of the wiring terminal is located in the first accommodation cavity, and a second end of the wiring terminal is located in the second accommodation cavity.
    Type: Application
    Filed: August 6, 2021
    Publication date: September 22, 2022
    Inventors: Chengchen LIANG, Zhangrui CHEN, Mingyuan ZHANG, Dong CHEN, Yanzhong ZHANG, Yong CAO
  • Publication number: 20220301828
    Abstract: Embodiments of methods and apparatus for reducing particle formation in physical vapor deposition (PVD) chambers are provided herein. In some embodiments, a method of reducing particle formation in a PVD chamber includes: performing a plurality of first deposition processes on a corresponding series of substrates disposed on a substrate support in the PVD chamber, wherein the PVD chamber includes a cover ring disposed about the substrate support and having a texturized outer surface, and wherein a silicon nitride (SiN) layer having a first thickness is deposited onto the texturized outer surface during each of the plurality of first deposition processes; and performing a second deposition process on the cover ring between subsets of the plurality of first deposition processes to deposit an amorphous silicon layer having a second thickness onto an underlying silicon nitride (SiN) layer.
    Type: Application
    Filed: March 17, 2021
    Publication date: September 22, 2022
    Inventors: Wei DOU, Yong CAO, Mingdong LI, Shane LAVAN, Jothilingam RAMALINGAM, Chengyu LIU
  • Patent number: 11450514
    Abstract: Embodiments of methods and apparatus for reducing particle formation in physical vapor deposition (PVD) chambers are provided herein. In some embodiments, a method of reducing particle formation in a PVD chamber includes: performing a plurality of first deposition processes on a corresponding series of substrates disposed on a substrate support in the PVD chamber, wherein the PVD chamber includes a cover ring disposed about the substrate support and having a texturized outer surface, and wherein a silicon nitride (SiN) layer having a first thickness is deposited onto the texturized outer surface during each of the plurality of first deposition processes; and performing a second deposition process on the cover ring between subsets of the plurality of first deposition processes to deposit an amorphous silicon layer having a second thickness onto an underlying silicon nitride (SiN) layer.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: September 20, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Wei Dou, Yong Cao, Mingdong Li, Shane Lavan, Jothilingam Ramalingam, Chengyu Liu
  • Patent number: 11437559
    Abstract: A physical vapor deposition system includes a chamber, three target supports to targets, a movable shield positioned having an opening therethrough, a workpiece support to hold a workpiece in the chamber, a gas supply to deliver nitrogen gas and an inert gas to the chamber, a power source, and a controller. The controller is configured to move the shield to position the opening adjacent each target in turn, and at each target cause the power source to apply power sufficient to ignite a plasma in the chamber to cause deposition of a buffer layer, a device layer of a first material that is a metal nitride suitable for use as a superconductor at temperatures above 8° K on the buffer layer, and a capping layer, respectively.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: September 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Mingwei Zhu, Zihao Yang, Nag B. Patibandla, Ludovic Godet, Yong Cao, Daniel Lee Diehl, Zhebo Chen
  • Publication number: 20220231360
    Abstract: The present invention relates to a case having a thermal barrier layer for a single cell. The composite case comprises a substrate and a double-layer structure coating on the substrate, wherein the double-layer structure coating includes an inner layer containing an aerogel material which has a ultra-low thermal conductivity, and an outer layer containing a barrier material which may prevent an electrolyte solvent from permeating into the inner layer. According to the present invention, the composite case can preserve cases in a prismatic or pouch cell from melting when cell goes to thermal runaway.
    Type: Application
    Filed: May 22, 2019
    Publication date: July 21, 2022
    Inventors: Ya ZHANG, Yong WANG, Yong CAO, Zhihong LIN, Qian CHENG
  • Patent number: 11393665
    Abstract: Embodiments of a process chamber are provided herein. In some embodiments, a process chamber includes a chamber body having an interior volume, a substrate support disposed in the interior volume, a target disposed within the interior volume and opposing the substrate support, a process shield disposed in the interior volume and having an upper portion surrounding the target and a lower portion surrounding the substrate support, the upper portion having an inner diameter that is greater than an outer diameter of the target to define a gap between the process shield and the target, and a gas inlet to provide a gas to the interior volume through the gap or across a front opening of the gap to substantially prevent particles from the interior volume from entering the gap during use.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 19, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chao Du, Yong Cao, Chen Gong, Mingdong Li, Fuhong Zhang, Rongjun Wang, Xianmin Tang
  • Publication number: 20220186361
    Abstract: Embodiments of process shield for use in process chambers are provided herein. In some embodiments, a process shield for use in a process chamber includes: an annular body having an upper portion and a lower portion extending downward and radially inward from the upper portion, wherein the upper portion includes a plurality of annular trenches on an upper surface thereof and having a plurality of slots disposed therebetween to fluidly couple the plurality of annular trenches, wherein one or more inlets extend from an outer surface of the annular body to an outermost trench of the plurality of annular trenches.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 16, 2022
    Inventors: Kirankumar Neelasandra SAVANDAIAH, Shane LAVAN, Sundarapandian Ramalinga Vijayalakshmi REDDY, Randal Dean SCHMIEDING, Yong CAO
  • Publication number: 20220130676
    Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises depositing an etch stop layer on a substrate by physical vapor deposition followed by in situ deposition of a metal layer on the etch stop layer. The in situ deposition comprises flowing a plasma processing gas into the chamber and exciting the plasma processing gas into a plasma to deposit the metal layer on the etch stop layer on the substrate. The substrate is continuously under vacuum and is not exposed to ambient air during the deposition processes.
    Type: Application
    Filed: January 6, 2022
    Publication date: April 28, 2022
    Applicant: Applied Materials, Inc.
    Inventors: He Ren, Hao Jiang, Mehul Naik, Wenting Hou, Jianxin Lei, Chen Gong, Yong Cao
  • Patent number: 11313034
    Abstract: In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas and a hydrogen-containing gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein adjusting the flow rate of the hydrogen containing gas tunes the optical properties of the deposited amorphous silicon layer.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: April 26, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Weimin Zeng, Yong Cao, Daniel Lee Diehl, Huixiong Dai, Khoi Phan, Christopher Ngai, Rongjun Wang, Xianmin Tang