Patents by Inventor Yong Cao

Yong Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200183155
    Abstract: An eyeball tracking system is provided, which includes: an illumination light source, configured to transmit an illumination light ray to a beam scanner; the beam scanner, configured to project the illumination light ray onto an entrance pupil optical apparatus; the entrance pupil optical apparatus, configured to reflect, reproduce, or refract the illumination light ray, so that the reflected, reproduced, or refracted illumination light ray illuminates an eyeball; a photoelectric detector, configured to: collect a receive optical power value of an eyeball reflection light ray, and send the receive optical power value to a controller; and the controller, configured to: receive the receive optical power value sent by the photoelectric detector, determine, based on the receive optical power value, an optical power reference value, and determine a current gaze direction of the eyeball based on the optical power reference value.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Inventors: Zhenlin XIE, Yong CAO, Patricia LEICHLITER
  • Patent number: 10665426
    Abstract: Methods are disclosed for depositing a thin film of compound material on a substrate. In some embodiments, a method of depositing a layer of compound material on a substrate include: flowing a reactive gas into a plasma processing chamber having a substrate to be sputter deposited disposed therein in opposition to a sputter target comprising a metal; exciting the reactive gas into a reactive gas plasma to react with the sputter target and to form a first layer of compound material thereon; flowing an inert gas into the plasma processing chamber; and exciting the inert gas into a plasma to sputter a second layer of the compound material onto the substrate directly from the first layer of compound material. The cycles of target poisoning and sputtering may be repeated until a compound material layer of appropriate thickness has been formed on the substrate.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: May 26, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yana Cheng, Zhefeng Li, Chi Hong Ching, Yong Cao, Rongjun Wang
  • Publication number: 20200127245
    Abstract: The present invention provides a flexible battery, including an electrochemical cell layer and a wrapping layer that wraps the electrochemical cell layer. The flexible battery further includes an energy absorbing layer. The energy absorbing layer is located between the wrapping layer and upper and lower surfaces, which are opposite to each other, of the electrochemical cell layer. The energy absorbing layer includes a plurality of supporting parts that protrude outward from the upper or lower surface of the electrochemical cell layer. The plurality of supporting parts are mainly made of a foam material or rubber. For the energy absorbing layer, a lower-modulus buffering layer or an empty part may be further disposed between the electrochemical cell layer and the wrapping layer, to complement a wavy surface of the supporting part to form a flat surface, so as to meet diversified requirements of a wearable device.
    Type: Application
    Filed: December 17, 2019
    Publication date: April 23, 2020
    Inventors: Liang FAN, Wei ZHOU, Yangxing LI, Pinghua WANG, Yong CAO
  • Publication number: 20200109237
    Abstract: Provided are a polymer containing S,S-dioxide-dibenzothiophene in backbone chain with content-adjustable triarylamine end groups, and a preparation method and an application thereof. Triarylamines hole-transport small molecules are introduced into the polymer end group, and a content of the triarylamine end groups can be adjusted by controlling a polymer molecular weight, so that the polymer has better electron-transport and hole-transport capabilities, and charge carrier transport can be balanced, so that more exciton recombination takes place effectively, thus improving the luminous efficiency and stability of the polymer. The polymer is prepared by a Suzuki polymerization reaction and does not require synthesis of new monomers. The polymer material is used for preparing highly effective and stable monolayer devices, and is dissolved directly in an organic solvent, then spin-coated, ink-jet printed, or printed to form a film.
    Type: Application
    Filed: November 27, 2017
    Publication date: April 9, 2020
    Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Ting GUO, Feng PENG, Lei YING, Wei YANG, Junbiao PENG, Yong CAO
  • Publication number: 20200105626
    Abstract: Methods and apparatus for simulating arcing that can occur during substrate fabrication is provided. In some embodiments, the method includes: loading a bare silicon substrate that has been pretreated with at least one of polybutylene terephthalate (PBT) or a film into a testing environment, performing a physical vapor deposition (PVD) process on the bare silicon substrate, and determining arcing occurrences on the bare silicon substrate caused during the PVD process.
    Type: Application
    Filed: February 5, 2019
    Publication date: April 2, 2020
    Inventors: MINGDONG LI, LEI ZHOU, CHAO DU, YONG CAO, CHEN GONG, BO XIE, YONGMEI CHEN, SONG-MOON SUH, RONGJUN WANG, XIANMIN TANG
  • Publication number: 20200054986
    Abstract: Disclosed herein are rapid cycle pressure swing adsorption (PSA) process for separating O2 from N2 and/or Ar. The processes use a carbon molecular sieve (CMS) adsorbent having an O2/N2 and/or O2/Ar kinetic selectivity of at least 5 and an O2 adsorption rate (1/s) of at least 0.2000 as determined by linear driving force model at 1 atma and 86° F.
    Type: Application
    Filed: August 14, 2018
    Publication date: February 20, 2020
    Applicant: Air Products and Chemicals, Inc.
    Inventors: Roger Dean Whitley, Shubhra Jyoti Bhadra, Erdem Arslan, Yong Cao, Timothy Christopher Golden
  • Publication number: 20200051795
    Abstract: Embodiments of a process chamber are provided herein. In some embodiments, a process chamber includes a chamber body having an interior volume, a substrate support disposed in the interior volume, a target disposed within the interior volume and opposing the substrate support, a process shield disposed in the interior volume and having an upper portion surrounding the target and a lower portion surrounding the substrate support, the upper portion having an inner diameter that is greater than an outer diameter of the target to define a gap between the process shield and the target, and a gas inlet to provide a gas to the interior volume through the gap or across a front opening of the gap to substantially prevent particles from the interior volume from entering the gap during use.
    Type: Application
    Filed: February 25, 2019
    Publication date: February 13, 2020
    Inventors: CHAO DU, YONG CAO, CHEN GONG, MINGDONG LI, FUHONG ZHANG, RONGJUN WANG, XIANMIN TANG
  • Patent number: 10546742
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: January 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Yana Cheng, Weifeng Ye
  • Publication number: 20190341248
    Abstract: The present disclosure generally relates to tin oxide films prepared by physical vapor deposition using a doped tin target. The semiconductor film may include tin and oxygen, and may be formed in a PVD chamber including a silicon doped tin target. Additionally, the semiconductor film may be smooth compared to similarly formed films without a doped target. The semiconductor film may be deposited by applying an electrical bias to a sputtering silicon doped tin target including the silicon in an amount of 0.5 to 5% by atomic weight of the total target. The semiconductor film has a smooth surface morphology compared to similarly formed tin oxide films formed without a doped target.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 7, 2019
    Inventors: WEIMIN ZENG, YONG CAO
  • Patent number: 10353683
    Abstract: A system for dynamically generating a timeout value based on a customer runtime environment for use with a manufacturer update package. More specifically, the system for dynamically generating a timeout value decomposes calculation of a timeout value based upon the major steps contained within the update service and dynamically calculates the timeout value based upon processor load. In certain embodiments the system uses a heuristic algorithm to perform the calculation.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: July 16, 2019
    Assignee: Dell Products L.P.
    Inventors: Jianwen Yin, Yong Cao, Xianghong Qian
  • Publication number: 20190212656
    Abstract: Methods for depositing an EUV hardmask film on a substrate by physical vapor deposition which allow for reduced EUV dose. Certain embodiments relate to metal oxide hardmasks which require smaller amounts of EUV energy for processing and allow for higher throughput. A silicon or metal target can be sputtered onto a substrate in the presence of an oxygen and or doping gas containing plasma.
    Type: Application
    Filed: January 10, 2019
    Publication date: July 11, 2019
    Inventors: Huixiong Dai, Weimin Zeng, Daniel Lee Diehl, Yong Cao, Hsiang Ning Wu, Khoi Phan, Christopher S. Ngai, Mingwei Zhu, Michael Stolfi, Nelson M. Felix, Ekmini Anuja DeSilva, Xianmin Tang
  • Publication number: 20190189407
    Abstract: A movable substrate support with a top surface for holding a substrate, when present, is used in conjunction with a cover ring that is stationary to adjust for a shadow effect to control substrate edge uniformity during deposition processes. The cover ring is held stationary by an electrically isolated spacer that engages with a grounded shield in the process volume of a semiconductor process chamber. A controller adjusts the substrate support in response to deposition material on a top surface of the cover ring to maintain the shadow effect and substrate edge uniformity.
    Type: Application
    Filed: December 11, 2018
    Publication date: June 20, 2019
    Inventors: THANH X. NGUYEN, ALEXANDER JANSEN, YANA CHENG, RANDAL SCHMIEDING, YONG CAO, XIANMIN TANG, WILLIAM JOHANSON
  • Publication number: 20190189433
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Application
    Filed: December 31, 2018
    Publication date: June 20, 2019
    Inventors: He REN, Mehul B. NAIK, Yong CAO, Yana CHENG, Weifeng YE
  • Patent number: 10255253
    Abstract: Captured data can be transformed and augmented for a particular presentation in a document, such as a note of a notebook application, based on an identified entity for the captured data. The particular presentation of captured data can be provided based on entity detection, extraction, and knowledge base resolution and retrieval. Methods, systems, and services are provided that identify a primary entity of an item input to a notebook application and create an entity object for the primary entity of the item at least from one or more structured representations for content associated with the item. A template for presenting the entity object can be determined according to the primary entity, where the template is selected from a set of templates corresponding to different primary entities such that an arrangement and presentation for one primary entity is different than that of another primary entity.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: April 9, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gregory Akselrod, Prashant Thiruvengadachari, Eun Ju Nam, Zaiqing Nie, Yong Cao, Pradeep Chilakamarri, Bernhard S. J. Kohlmeier
  • Publication number: 20190051768
    Abstract: A method for forming an anti-reflective coating (ARC) includes positioning a substrate below a target and flowing a first gas to deposit a first portion of the graded ARC onto the substrate. The method includes gradually flowing a second gas to deposit a second portion of the graded ARC, and gradually flowing a third gas while simultaneously gradually decreasing the flow of the second gas to deposit a third portion of the graded ARC. The method also includes flowing the third gas after stopping the flow of the second gas to form a fourth portion of the graded ARC. In another embodiment a film stack having a substrate having a graded ARC disposed thereon is provided. The graded ARC includes a first portion, a second portion disposed on the first portion, a third portion disposed on the second portion, and a fourth portion disposed on the third portion.
    Type: Application
    Filed: October 8, 2018
    Publication date: February 14, 2019
    Inventors: Yong CAO, Daniel Lee DIEHL, Rongjun WANG, Xianmin TANG, Tai-chou Papo CHEN, Tingjun XU
  • Publication number: 20190027403
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 24, 2019
    Inventors: Sree Rangasai V. KESAPRAGADA, Kevin MORAES, Srinivas GUGGILLA, He REN, Mehul NAIK, David THOMPSON, Weifeng YE, Yana CHENG, Yong CAO, Xianmin TANG, Paul F. MA, Deenesh PADHI
  • Patent number: 10170299
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Grant
    Filed: June 18, 2016
    Date of Patent: January 1, 2019
    Assignee: Applied Materials, Inc.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Yana Cheng, Weifeng Ye
  • Patent number: 10169290
    Abstract: The present invention provides a data processing method, including: acquiring historical data, where the historical data belongs to a first level and a second level, and data corresponding to the first level comprises data corresponding to the second level; generating, from the historical data, a first-granularity data set according to a first granularity, and generating, from the historical data, a second-granularity data set according to a second granularity, where the first granularity and the second granularity respectively correspond to the first level and the second level; performing modeling for a second-granularity forecasting model according to the first-granularity data set and the second-granularity data set; and performing forecasting by using the second-granularity forecasting model to obtain second-granularity forecast data. The present invention enables obtained forecast data of different granularities to be consistent.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: January 1, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yijun Liu, Guangjian Tian, Yong Cao
  • Patent number: 10116010
    Abstract: An insulating mother board, an insulating harness mother board assembly and a battery module including the insulating mother board are provided. The insulating mother board includes a first end insulating board, a middle insulating board and a second end insulating board moveably connected in sequence. According to the insulating mother board, an arbitrary number of middle insulating boards can be arranged by arranging the first end insulating board and the second end insulating board on two ends of the insulating mother board respectively. There may be an arbitrary number of connection holes on the first end insulating board, the middle insulating board and the second end insulating board, each connection hole corresponds to one single battery. In this way, an assembly of different numbers of single batteries can be achieved.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: October 30, 2018
    Assignee: CHINA AVIATION LITHIUM BATTERY CO., LTD.
    Inventors: Qixin Guo, Yong Cao, Qiu Xie, Wei Li
  • Patent number: 10109520
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: October 23, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sree Rangasai V. Kesapragada, Kevin Moraes, Srinivas Guggilla, He Ren, Mehul Naik, David Thompson, Weifeng Ye, Yana Cheng, Yong Cao, Xianmin Tang, Paul F. Ma, Deenesh Padhi