Patents by Inventor Yong Cao

Yong Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210311303
    Abstract: An eyeball tracking system is provided, which includes: an illumination light source, configured to transmit an illumination light ray to a beam scanner; the beam scanner, configured to project the illumination light ray onto an entrance pupil optical apparatus; the entrance pupil optical apparatus, configured to reflect, reproduce, or refract the illumination light ray, so that the reflected, reproduced, or refracted illumination light ray illuminates an eyeball; a photoelectric detector, configured to: collect a receive optical power value of an eyeball reflection light ray, and send the receive optical power value to a controller; and the controller, configured to: receive the receive optical power value sent by the photoelectric detector, determine, based on the receive optical power value, an optical power reference value, and determine a current gaze direction of the eyeball based on the optical power reference value.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Zhenlin XIE, Yong CAO, Patricia LEICHLITER
  • Publication number: 20210288224
    Abstract: A thin-film white LED chip includes a transparent substrate, a first transparent electrode, an emissive structure, a second transparent electrode, and a first phosphorescent/fluorescent layer respectively arranged in sequence. The emissive structure includes an emissive layer, an electron injection layer and a hole injection layer respectively formed at both sides of the emissive layer, and a total thickness of the electron injection layer and the second transparent electrode (in an inverted structure) or a total thickness of the hole injection layer and the second transparent electrode (in a conventional structure) is smaller than a length of one emission wavelength of the emissive layer. The evanescent wave generated by total internal reflection can penetrate into and be absorbed by the first phosphorescent/fluorescent layer to further emit light, thereby the overall external quantum efficiency of the LED chip is improved.
    Type: Application
    Filed: May 26, 2021
    Publication date: September 16, 2021
    Inventors: Ziming Chen, Xuanli Ye, Zhenchao Li, Yong Cao
  • Patent number: 11105879
    Abstract: A time-domain segmented calibration method for a characteristic impedance of a time-domain reflectometer is provided. The method first segments the measured characteristic impedance value according to the reflection coefficients ?, determines several boundary points with the reflection coefficients, and divides the range of the measured impedance according to the impedance values corresponding to the reflection coefficients of the boundary points, and then select a typical impedance value in the range as a reference impedance for calibration. The TDR instrument performs characteristic impedance calibration for each typical reference impedance value one by one, and stores them as calibration parameters of different groups. With respect to different impedance value ranges, the selection ranges of the calibration and measurement areas of TDR are different. When the measurement is performed, the 50? calibration parameter is used as the default reference for calculation.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: August 31, 2021
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Yong Cao, Hong Wen, Yang Tu
  • Publication number: 20210233770
    Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises depositing an etch stop layer on a substrate by physical vapor deposition followed by in situ deposition of a metal layer on the etch stop layer. The in situ deposition comprises flowing a plasma processing gas into the chamber and exciting the plasma processing gas into a plasma to deposit the metal layer on the etch stop layer on the substrate. The substrate is continuously under vacuum and is not exposed to ambient air during the deposition processes.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 29, 2021
    Applicant: Applied Materials, Inc.
    Inventors: He Ren, Hao Jiang, Mehul Naik, Wenting Hou, Jianxin Lei, Chen Gong, Yong Cao
  • Patent number: 11067795
    Abstract: An eyeball tracking system is provided, which includes: an illumination light source, configured to transmit an illumination light ray to a beam scanner; the beam scanner, configured to project the illumination light ray onto an entrance pupil optical apparatus; the entrance pupil optical apparatus, configured to reflect, reproduce, or refract the illumination light ray, so that the reflected, reproduced, or refracted illumination light ray illuminates an eyeball; a photoelectric detector, configured to: collect a receive optical power value of an eyeball reflection light ray, and send the receive optical power value to a controller; and the controller, configured to: receive the receive optical power value sent by the photoelectric detector, determine, based on the receive optical power value, an optical power reference value, and determine a current gaze direction of the eyeball based on the optical power reference value.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: July 20, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zhenlin Xie, Yong Cao, Patricia Leichliter
  • Patent number: 11056325
    Abstract: A movable substrate support with a top surface for holding a substrate, when present, is used in conjunction with a cover ring that is stationary to adjust for a shadow effect to control substrate edge uniformity during deposition processes. The cover ring is held stationary by an electrically isolated spacer that engages with a grounded shield in the process volume of a semiconductor process chamber. A controller adjusts the substrate support in response to deposition material on a top surface of the cover ring to maintain the shadow effect and substrate edge uniformity.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: July 6, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Thanh X. Nguyen, Alexander Jansen, Yana Cheng, Randal Schmieding, Yong Cao, Xianmin Tang, William Johanson
  • Publication number: 20210123156
    Abstract: Embodiments described herein include a method for depositing a material layer on a substrate while controlling a bow of the substrate and a surface roughness of the material layer. A bias applied to the substrate while the material layer is deposited is adjusted to control the bow of the substrate. A bombardment process is performed on the material layer to improve the surface roughness of the material layer. The bias and bombardment process improve a uniformity of the material layer and reduce an occurrence of the material layer cracking due to the bow of the substrate.
    Type: Application
    Filed: September 10, 2020
    Publication date: April 29, 2021
    Inventors: Zihao YANG, Mingwei ZHU, Nag B. PATIBANDLA, Yong CAO, Shumao ZHANG, Zhebo CHEN, Jean LU, Daniel Lee DIEHL, Xianmin TANG
  • Patent number: 10991579
    Abstract: The present disclosure generally relates to tin oxide films prepared by physical vapor deposition using a doped tin target. The semiconductor film may include tin and oxygen, and may be formed in a PVD chamber including a silicon doped tin target. Additionally, the semiconductor film may be smooth compared to similarly formed films without a doped target. The semiconductor film may be deposited by applying an electrical bias to a sputtering silicon doped tin target including the silicon in an amount of 0.5 to 5% by atomic weight of the total target. The semiconductor film has a smooth surface morphology compared to similarly formed tin oxide films formed without a doped target.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: April 27, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Weimin Zeng, Yong Cao
  • Publication number: 20210111361
    Abstract: Disclosed are a semi-transparent solar cell device and an application. The cell device comprises a cathode, a hole transport layer, a photoactivity layer, an electron transport layer and an anode, wherein the photoactivity layer absorbs near-infrared and infrared light with a wavelength range greater than 780 nm. The cell device fully utilizes light energy in different bands, thus increasing the light energy utilization rate. By combining a semi-transparent solar cell and a heat-insulating film, not only can the cell device be used for generating power as a photovoltaic cell, but the device can also be attached to glass of a car or of an exterior wall of a building to be used as the heat-insulating film because of having excellent heat insulation performance itself. The cell device solves the problems of high visible light transmittance, high photoelectric conversion efficiency, heat insulation, ultraviolet protection, etc.
    Type: Application
    Filed: November 28, 2017
    Publication date: April 15, 2021
    Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Hin Lap YIP, Chen SUN, Ruoxi XIA, Fei HUANG, Yong CAO
  • Publication number: 20210091599
    Abstract: A wireless charging apparatus includes a receive end coil, a switch selection circuit, a plurality of charging circuits, and a receive end controller. An input end of the switch selection circuit is connected to an output end of the receive end coil, and an output end of the switch selection circuit is connected to an input end of each of the charging circuits.
    Type: Application
    Filed: December 7, 2020
    Publication date: March 25, 2021
    Inventors: Qitang Liu, Ce Liu, Weiliang Shu, Yanding Liu, Pinghua Wang, Yong Cao
  • Publication number: 20210062325
    Abstract: A method of depositing a backside film layer on a backside of a substrate includes loading a substrate having one or more films deposited on a front side of the substrate onto a substrate support of a processing chamber, depositing, from the sputter target, a target material on the backside of the substrate to form a backside layer on the backside of the substrate, and applying an RF bias to an electrode disposed within the substrate support while depositing the target material. The front side of the substrate faces the substrate support and is spaced from a top surface of the substrate support, and a backside of the substrate faces a sputter target of the processing chamber.
    Type: Application
    Filed: August 26, 2020
    Publication date: March 4, 2021
    Inventors: Jothilingam RAMALINGAM, Xiaozhou CHE, Yong CAO, Shane LAVAN, Chunming ZHOU
  • Patent number: 10886113
    Abstract: Embodiments of process kits for process chambers and methods for processing a substrate are provided herein. In some embodiments, a process kit includes a non-conductive upper shield having an upper portion to surround a sputtering target and a lower portion extending downward from the upper portion; and a conductive lower shield disposed radially outward of the non-conductive upper shield and having a cylindrical body with an upper portion and a lower portion, a lower wall projecting radially inward from the lower portion, and a lip protruding upward from the lower wall. The cylindrical body is spaced apart from the non-conductive upper shield by a first gap. The lower wall is spaced apart from the lower portion of the non-conductive upper shield by a second gap to limit a direct line of sight between a volume within the non-conductive upper shield and the cylindrical body of the conductive lower shield.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: January 5, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Thanh X. Nguyen, Weimin Zeng, Yong Cao
  • Patent number: 10886155
    Abstract: A method and apparatus for forming an optical stack having uniform and accurate layers is provided. A processing tool used to form the optical stack comprises, within an enclosed environment, a first transfer chamber, an on-board metrology unit, and a second transfer chamber. A first plurality of processing chambers is coupled to the first transfer chamber or the second transfer chamber. The on-board metrology unit is disposed between the first transfer chamber and the second transfer chamber. The on-board metrology unit is configured to measure one or more optical properties of the individual layers of the optical stack without exposing the layers to an ambient environment.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: January 5, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Mingwei Zhu, Zihao Yang, Nag B. Patibandla, Daniel Lee Diehl, Yong Cao, Weimin Zeng, Renjing Zheng, Edward Budiarto, Surender Kumar Gurusamy, Todd Egan, Niranjan R. Khasgiwale
  • Patent number: 10835856
    Abstract: Disclosed herein are rapid cycle pressure swing adsorption (PSA) process for separating O2 from N2 and/or Ar. The processes use a carbon molecular sieve (CMS) adsorbent having an O2/N2 and/or O2/Ar kinetic selectivity of at least 5 and an O2 adsorption rate (1/s) of at least 0.2000 as determined by linear driving force model at 1 atma and 86° F.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: November 17, 2020
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Roger Dean Whitley, Shubhra Jyoti Bhadra, Erdem Arslan, Yong Cao, Timothy Christopher Golden
  • Publication number: 20200350160
    Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.
    Type: Application
    Filed: April 13, 2020
    Publication date: November 5, 2020
    Inventors: Chunming ZHOU, Jothilingam RAMALINGAM, Yong CAO, Kevin Vincent MORAES, Shane LAVAN
  • Publication number: 20200299830
    Abstract: A structure including a metal nitride layer is formed on a workpiece by pre-conditioning a chamber that includes a metal target by flowing nitrogen gas and an inert gas at a first flow rate ratio into the chamber and igniting a plasma in the chamber before placing the workpiece in the chamber, evacuating the chamber after the preconditioning, placing the workpiece on a workpiece support in the chamber after the preconditioning, and performing physical vapor deposition of a metal nitride layer on the workpiece in the chamber by flowing nitrogen gas and the inert gas at a second flow rate ratio into the chamber and igniting a plasma in the chamber. The second flow rate ratio is less than the first flow rate ratio.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 24, 2020
    Inventors: Mingwei Zhu, Zihao Yang, Nag B. Patibandla, Ludovic Godet, Yong Cao, Daniel Lee Diehl, Zhebo Chen
  • Publication number: 20200303616
    Abstract: A physical vapor deposition system includes a chamber, three target supports to targets, a movable shield positioned having an opening therethrough, a workpiece support to hold a workpiece in the chamber, a gas supply to deliver nitrogen gas and an inert gas to the chamber, a power source, and a controller. The controller is configured to move the shield to position the opening adjacent each target in turn, and at each target cause the power source to apply power sufficient to ignite a plasma in the chamber to cause deposition of a buffer layer, a device layer of a first material that is a metal nitride suitable for use as a superconductor at temperatures above 8° K on the buffer layer, and a capping layer, respectively.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 24, 2020
    Inventors: Mingwei Zhu, Zihao Yang, Nag B. Patibandla, Ludovic Godet, Yong Cao, Daniel Lee Diehl, Zhebo Chen
  • Publication number: 20200273705
    Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.
    Type: Application
    Filed: February 25, 2020
    Publication date: August 27, 2020
    Inventors: Tejinder SINGH, Suketu Arun PARIKH, Daniel Lee DIEHL, Michael Anthony STOLFI, Jothilingam RAMALINGAM, Yong CAO, Lifan YAN, Chi-I LANG, Hoyung David HWANG
  • Publication number: 20200227294
    Abstract: A method and apparatus for forming an optical stack having uniform and accurate layers is provided. A processing tool used to form the optical stack comprises, within an enclosed environment, a first transfer chamber, an on-board metrology unit, and a second transfer chamber. A first plurality of processing chambers is coupled to the first transfer chamber or the second transfer chamber. The on-board metrology unit is disposed between the first transfer chamber and the second transfer chamber. The on-board metrology unit is configured to measure one or more optical properties of the individual layers of the optical stack without exposing the layers to an ambient environment.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 16, 2020
    Inventors: Mingwei ZHU, Zihao YANG, Nag B. PATIBANDLA, Daniel DIEHL, Yong CAO, Weimin ZENG, Renjing ZHENG, Edward BUDIARTO, Surender Kumar GURUSAMY, Todd EGAN, Niranjan R. KHASGIWALE
  • Publication number: 20200220347
    Abstract: A power protection apparatus includes a protection integrated circuit (IC), a switch transistor group, and a sampling resistor. The protection IC is respectively connected to a positive electrode and a negative electrode of the cell and includes a mirror current input port, a mirror current output port, an operational amplifier, a voltage regulation switch transistor, and a charge-discharge protection circuit. The operational amplifier includes a positive input pin, a negative input pin, and an output pin. The switch transistor group is connected between the positive electrode of the cell and the load and is configured to turn on or turn off a charge-discharge loop of the cell, and the at least one control circuit is connected to the at least one charge-discharge protection circuit of the protection IC and is configured to receive a control signal of the protection IC to control the switch transistor group to be turned off to implement abnormity protection of the cell.
    Type: Application
    Filed: March 20, 2020
    Publication date: July 9, 2020
    Inventors: Xinyu LIU, Yanding LIU, Ce LIU, Pinghua WANG, Yong CAO