Patents by Inventor Yong Cao

Yong Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190341248
    Abstract: The present disclosure generally relates to tin oxide films prepared by physical vapor deposition using a doped tin target. The semiconductor film may include tin and oxygen, and may be formed in a PVD chamber including a silicon doped tin target. Additionally, the semiconductor film may be smooth compared to similarly formed films without a doped target. The semiconductor film may be deposited by applying an electrical bias to a sputtering silicon doped tin target including the silicon in an amount of 0.5 to 5% by atomic weight of the total target. The semiconductor film has a smooth surface morphology compared to similarly formed tin oxide films formed without a doped target.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 7, 2019
    Inventors: WEIMIN ZENG, YONG CAO
  • Patent number: 10353683
    Abstract: A system for dynamically generating a timeout value based on a customer runtime environment for use with a manufacturer update package. More specifically, the system for dynamically generating a timeout value decomposes calculation of a timeout value based upon the major steps contained within the update service and dynamically calculates the timeout value based upon processor load. In certain embodiments the system uses a heuristic algorithm to perform the calculation.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: July 16, 2019
    Assignee: Dell Products L.P.
    Inventors: Jianwen Yin, Yong Cao, Xianghong Qian
  • Publication number: 20190212656
    Abstract: Methods for depositing an EUV hardmask film on a substrate by physical vapor deposition which allow for reduced EUV dose. Certain embodiments relate to metal oxide hardmasks which require smaller amounts of EUV energy for processing and allow for higher throughput. A silicon or metal target can be sputtered onto a substrate in the presence of an oxygen and or doping gas containing plasma.
    Type: Application
    Filed: January 10, 2019
    Publication date: July 11, 2019
    Inventors: Huixiong Dai, Weimin Zeng, Daniel Lee Diehl, Yong Cao, Hsiang Ning Wu, Khoi Phan, Christopher S. Ngai, Mingwei Zhu, Michael Stolfi, Nelson M. Felix, Ekmini Anuja DeSilva, Xianmin Tang
  • Publication number: 20190189433
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Application
    Filed: December 31, 2018
    Publication date: June 20, 2019
    Inventors: He REN, Mehul B. NAIK, Yong CAO, Yana CHENG, Weifeng YE
  • Publication number: 20190189407
    Abstract: A movable substrate support with a top surface for holding a substrate, when present, is used in conjunction with a cover ring that is stationary to adjust for a shadow effect to control substrate edge uniformity during deposition processes. The cover ring is held stationary by an electrically isolated spacer that engages with a grounded shield in the process volume of a semiconductor process chamber. A controller adjusts the substrate support in response to deposition material on a top surface of the cover ring to maintain the shadow effect and substrate edge uniformity.
    Type: Application
    Filed: December 11, 2018
    Publication date: June 20, 2019
    Inventors: THANH X. NGUYEN, ALEXANDER JANSEN, YANA CHENG, RANDAL SCHMIEDING, YONG CAO, XIANMIN TANG, WILLIAM JOHANSON
  • Patent number: 10255253
    Abstract: Captured data can be transformed and augmented for a particular presentation in a document, such as a note of a notebook application, based on an identified entity for the captured data. The particular presentation of captured data can be provided based on entity detection, extraction, and knowledge base resolution and retrieval. Methods, systems, and services are provided that identify a primary entity of an item input to a notebook application and create an entity object for the primary entity of the item at least from one or more structured representations for content associated with the item. A template for presenting the entity object can be determined according to the primary entity, where the template is selected from a set of templates corresponding to different primary entities such that an arrangement and presentation for one primary entity is different than that of another primary entity.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: April 9, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gregory Akselrod, Prashant Thiruvengadachari, Eun Ju Nam, Zaiqing Nie, Yong Cao, Pradeep Chilakamarri, Bernhard S. J. Kohlmeier
  • Publication number: 20190051768
    Abstract: A method for forming an anti-reflective coating (ARC) includes positioning a substrate below a target and flowing a first gas to deposit a first portion of the graded ARC onto the substrate. The method includes gradually flowing a second gas to deposit a second portion of the graded ARC, and gradually flowing a third gas while simultaneously gradually decreasing the flow of the second gas to deposit a third portion of the graded ARC. The method also includes flowing the third gas after stopping the flow of the second gas to form a fourth portion of the graded ARC. In another embodiment a film stack having a substrate having a graded ARC disposed thereon is provided. The graded ARC includes a first portion, a second portion disposed on the first portion, a third portion disposed on the second portion, and a fourth portion disposed on the third portion.
    Type: Application
    Filed: October 8, 2018
    Publication date: February 14, 2019
    Inventors: Yong CAO, Daniel Lee DIEHL, Rongjun WANG, Xianmin TANG, Tai-chou Papo CHEN, Tingjun XU
  • Publication number: 20190027403
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 24, 2019
    Inventors: Sree Rangasai V. KESAPRAGADA, Kevin MORAES, Srinivas GUGGILLA, He REN, Mehul NAIK, David THOMPSON, Weifeng YE, Yana CHENG, Yong CAO, Xianmin TANG, Paul F. MA, Deenesh PADHI
  • Patent number: 10170299
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Grant
    Filed: June 18, 2016
    Date of Patent: January 1, 2019
    Assignee: Applied Materials, Inc.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Yana Cheng, Weifeng Ye
  • Patent number: 10169290
    Abstract: The present invention provides a data processing method, including: acquiring historical data, where the historical data belongs to a first level and a second level, and data corresponding to the first level comprises data corresponding to the second level; generating, from the historical data, a first-granularity data set according to a first granularity, and generating, from the historical data, a second-granularity data set according to a second granularity, where the first granularity and the second granularity respectively correspond to the first level and the second level; performing modeling for a second-granularity forecasting model according to the first-granularity data set and the second-granularity data set; and performing forecasting by using the second-granularity forecasting model to obtain second-granularity forecast data. The present invention enables obtained forecast data of different granularities to be consistent.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: January 1, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yijun Liu, Guangjian Tian, Yong Cao
  • Patent number: 10116010
    Abstract: An insulating mother board, an insulating harness mother board assembly and a battery module including the insulating mother board are provided. The insulating mother board includes a first end insulating board, a middle insulating board and a second end insulating board moveably connected in sequence. According to the insulating mother board, an arbitrary number of middle insulating boards can be arranged by arranging the first end insulating board and the second end insulating board on two ends of the insulating mother board respectively. There may be an arbitrary number of connection holes on the first end insulating board, the middle insulating board and the second end insulating board, each connection hole corresponds to one single battery. In this way, an assembly of different numbers of single batteries can be achieved.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: October 30, 2018
    Assignee: CHINA AVIATION LITHIUM BATTERY CO., LTD.
    Inventors: Qixin Guo, Yong Cao, Qiu Xie, Wei Li
  • Patent number: 10109520
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: October 23, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sree Rangasai V. Kesapragada, Kevin Moraes, Srinivas Guggilla, He Ren, Mehul Naik, David Thompson, Weifeng Ye, Yana Cheng, Yong Cao, Xianmin Tang, Paul F. Ma, Deenesh Padhi
  • Patent number: 10096725
    Abstract: A method for forming an anti-reflective coating (ARC) includes positioning a substrate below a target and flowing a first gas to deposit a first portion of the graded ARC onto the substrate. The method includes gradually flowing a second gas to deposit a second portion of the graded ARC, and gradually flowing a third gas while simultaneously gradually decreasing the flow of the second gas to deposit a third portion of the graded ARC. The method also includes flowing the third gas after stopping the flow of the second gas to form a fourth portion of the graded ARC. In another embodiment a film stack having a substrate having a graded ARC disposed thereon is provided. The graded ARC includes a first portion, a second portion disposed on the first portion, a third portion disposed on the second portion, and a fourth portion disposed on the third portion.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: October 9, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Yong Cao, Daniel Lee Diehl, Rongjun Wang, Xianmin Tang, Tai-chou Papo Chen, Tingjun Xu
  • Patent number: 10090423
    Abstract: The present invention discloses a polymer containing 1,2,5-benzoselenadiazole-N—R1-5,6-dicarboxylic acid imide, and a preparation method and use thereof. The conjugated polymer prepared by the present invention has fluorescence, and a relatively wide absorption of sunlight, and thus it can be used for manufacture of an active layer for a polymer light-emitting diode device, a polymer field-effect transistor and a polymer solar cell.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: October 2, 2018
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Fei Huang, Xiaojuan Ma, Peng Zhu, Yong Cao
  • Publication number: 20180260488
    Abstract: The automated social networking graph mining and visualization technique described herein mines social connections and allows creation of a social networking graph from general (not necessarily social-application specific) Web pages. The technique uses the distances between a person's/entity's name and related people's/entities names on one or more Web pages to determine connections between people/entities and the strengths of the connections. In one embodiment, the technique lays out these connections, and then clusters them, in a 2-D layout of a social networking graph that represents the Web connection strengths among the related people's or entities' names, by using a force-directed model.
    Type: Application
    Filed: May 10, 2018
    Publication date: September 13, 2018
    Inventors: Zaiqing Nie, Yong Cao, Gang Luo, Ruochi Zhang, Xiaojiang Liu, Yunxiao Ma, Bo Zhang, Ying-Qing Xu, Ji-Rong Wen
  • Publication number: 20180212074
    Abstract: The present invention discloses a polymer containing 1,2,5-benzoselenadiazole-N—R1-5,6-dicarboxylic acid imide, and a preparation method and use thereof. The conjugated polymer prepared by the present invention has fluorescence, and a relatively wide absorption of sunlight, and thus it can be used for manufacture of an active layer for a polymer light-emitting diode device, a polymer field-effect transistor and a polymer solar cell.
    Type: Application
    Filed: December 9, 2016
    Publication date: July 26, 2018
    Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Fei HUANG, Xiaojuan MA, Peng ZHU, Yong CAO
  • Patent number: 10016700
    Abstract: A multifunctional continuous phase transition extraction apparatus comprises an extraction system, a desorption system and a solvent recovery system. The extraction system comprises a first heat exchanger and an extraction tank. The desorption system comprises a second heat exchanger, a first desorption tank, a second desorption tank, a first purification column and a second purification column. The solvent recovery system comprises a first condenser, a second condenser, a first solvent tank and a second solvent tank. Two extraction loops can be formed in the present invention. During the overall extraction process, the phase transition process of the extracting agent is real-time and continuous. The extracting agent goes through continuous phase-transitions and is cyclically re-used. The overall process is operated in an airtight and low-pressure condition, and is multifunctional, safe, reliable, and suitable for the extraction for most natural products.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: July 10, 2018
    Inventor: Yong Cao
  • Patent number: 10008448
    Abstract: An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber, wherein the substrate comprises a copper layer having an exposed surface and a low-k dielectric layer having an exposed surface, forming a metal layer over the exposed surface of the copper layer, wherein the exposed surface of the low-k dielectric layer is free from the metal layer, and forming a metal-based dielectric layer over the metal layer and over at least part of the exposed low-k dielectric surface, wherein the metal-based dielectric layer comprises an aluminum compound.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Mei-yee Shek
  • Patent number: 9990429
    Abstract: The automated social networking graph mining and visualization technique described herein mines social connections and allows creation of a social networking graph from general (not necessarily social-application specific) Web pages. The technique uses the distances between a person's/entity's name and related people's/entities names on one or more Web pages to determine connections between people/entities and the strengths of the connections. In one embodiment, the technique lays out these connections, and then clusters them, in a 2-D layout of a social networking graph that represents the Web connection strengths among the related people's or entities' names, by using a force-directed model.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: June 5, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Zaiqing Nie, Yong Cao, Gang Luo, Ruochi Zhang, Xiaojiang Liu, Yunxiao Ma, Bo Zhang, Ying-Qing Xu, Ji-Rong Wen
  • Publication number: 20180151337
    Abstract: Embodiments of process kits for process chambers and methods for processing a substrate are provided herein. In some embodiments, a process kit includes a non-conductive upper shield having an upper portion to surround a sputtering target and a lower portion extending downward from the upper portion; and a conductive lower shield disposed radially outward of the non-conductive upper shield and having a cylindrical body with an upper portion and a lower portion, a lower wall projecting radially inward from the lower portion, and a lip protruding upward from the lower wall. The cylindrical body is spaced apart from the non-conductive upper shield by a first gap. The lower wall is spaced apart from the lower portion of the non-conductive upper shield by a second gap to limit a direct line of sight between a volume within the non-conductive upper shield and the cylindrical body of the conductive lower shield.
    Type: Application
    Filed: November 20, 2017
    Publication date: May 31, 2018
    Inventors: THANH X. NGUYEN, WEIMIN ZENG, YONG CAO