Patents by Inventor Yong Cao

Yong Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9478697
    Abstract: In some embodiments, a substrate carrier for holding a plurality of substrates comprises a disk formed of a continuous material to a nominal dimension which is approximately a multiple of a nominal dimension of a standard substrate size used in the manufacture of light emitting diode devices. In an embodiment, the disk is formed symmetrically about a central axis and defines a substantially planar upper surface. A first pair of pockets is defined in the upper surface of the disk, wherein the disk and each of the first pair of pockets are bisected by a first reference plane passing through the central axis. A second pair of pockets is defined in the upper surface of the disk, wherein the disk and each of the second pair of pockets are bisected by a second reference plane passing through the central axis.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sriskantharajah Thirunavukarasu, Mingwei Zhu, Karthik Elumalai, Thean Ming Tan, Yong Cao, Daniel Lee Diehl, Nag Patibandla
  • Patent number: 9478421
    Abstract: The embodiments herein provides methods for forming a PVD silicon oxide or silicon rich oxide, or PVD SiN or silicon rich SiN, or SiC or silicon rich SiC, or combination of the preceding including a variation which includes controlled doping of hydrogen into the compounds heretofore referred to as SiOxNyCz:Hw, where w, x, y, and z can vary in concentration from 0% to 100%, is produced as a hardmask with optical properties that are substantially matched to the photo-resists at the exposure wavelength. Thus making the hardmask optically planarized with respect to the photo-resist. This allows for multiple sequences of litho and etches in the hardmask while the photo-resist maintains essentially no optical topography or reflectivity variations.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Christopher Dennis Bencher, Daniel Lee Diehl, Huixiong Dai, Yong Cao, Tingjun Xu, Weimin Zeng, Peng Xie
  • Publication number: 20160240483
    Abstract: Interconnect structures and methods of formation of such interconnect structures are provided herein. In some embodiments, a method of forming an interconnect includes: depositing a silicon-aluminum oxynitride (SiAlON) layer atop a first layer of a substrate, wherein the first layer comprises a first feature filled with a first conductive material; depositing a dielectric layer over the silicon-aluminum oxynitride (SiAlON) layer; and forming a second feature in the dielectric layer and the silicon-aluminum oxynitride (SiAlON) layer to expose the first conductive material.
    Type: Application
    Filed: February 11, 2016
    Publication date: August 18, 2016
    Inventors: YANA CHENG, YONG CAO, SRINIVAS GUGGILLA, SREE RANGASAI KESAPRAGADA, XIANMIN TANG, DEENESH PADHI
  • Publication number: 20160220923
    Abstract: A multifunctional continuous phase transition extraction apparatus comprises an extraction system, a desorption system and a solvent recovery system. The extraction system comprises a first heat exchanger and an extraction tank. The desorption system comprises a second heat exchanger, a first desorption tank, a second desorption tank, a first purification column and a second purification column. The solvent recovery system comprises a first condenser, a second condenser, a first solvent tank and a second solvent tank. Two extraction loops can be formed in the present invention. During the overall extraction process, the phase transition process of the extracting agent is real-time and continuous. The extracting agent goes through continuous phase-transitions and is cyclically re-used. The overall process is operated in an airtight and low-pressure condition, and is multifunctional, safe, reliable, and suitable for the extraction for most natural products.
    Type: Application
    Filed: July 11, 2014
    Publication date: August 4, 2016
    Inventor: Yong CAO
  • Publication number: 20160224704
    Abstract: The present invention provides a data processing method, including: acquiring historical data, where the historical data belongs to a first level and a second level, and data corresponding to the first level comprises data corresponding to the second level; generating, from the historical data, a first-granularity data set according to a first granularity, and generating, from the historical data, a second-granularity data set according to a second granularity, where the first granularity and the second granularity respectively correspond to the first level and the second level; performing modeling for a second-granularity forecasting model according to the first-granularity data set and the second-granularity data set; and performing forecasting by using the second-granularity forecasting model to obtain second-granularity forecast data. The present invention enables obtained forecast data of different granularities to be consistent.
    Type: Application
    Filed: February 2, 2016
    Publication date: August 4, 2016
    Inventors: Yijun LIU, Guangjian TIAN, Yong CAO
  • Publication number: 20160133781
    Abstract: In some embodiments, a substrate carrier for holding a plurality of substrates comprises a disk formed of a continuous material to a nominal dimension which is approximately a multiple of a nominal dimension of a standard substrate size used in the manufacture of light emitting diode devices. In an embodiment, the disk is formed symmetrically about a central axis and defines a substantially planar upper surface. A first pair of pockets is defined in the upper surface of the disk, wherein the disk and each of the first pair of pockets are bisected by a first reference plane passing through the central axis. A second pair of pockets is defined in the upper surface of the disk, wherein the disk and each of the second pair of pockets are bisected by a second reference plane passing through the central axis.
    Type: Application
    Filed: November 11, 2014
    Publication date: May 12, 2016
    Inventors: SRISKANTHARAJAH THIRUNAVUKARASU, Mingwei Zhu, Karthik Elumalai, Thean Ming Tan, Yong Cao, Daniel Lee Diehl, Nag Patibandla
  • Patent number: 9299605
    Abstract: Methods for forming a passivation protection structure on a metal line layer formed in an insulating material in an interconnection structure are provided. In one embodiment, a method for forming passivation protection on a metal line in an interconnection structure for semiconductor devices includes selectively forming a metal capping layer on a metal line bounded by a dielectric bulk insulating layer in an interconnection structure formed on a substrate in a processing chamber incorporated in a multi-chamber processing system, in-situ forming a barrier layer on the substrate in the processing chamber; wherein the barrier layer is a metal dielectric layer, and forming a dielectric capping layer on the barrier layer in the multi-chamber processing system.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: March 29, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Sree Rangasai V. Kesapragada, Mei-Yee Shek, Yana Cheng
  • Patent number: 9274383
    Abstract: A liquid crystal lens includes a liquid crystal layer and at least two driving electrode plates. The liquid crystal layer is arranged between the driving electrode plates. Each of the driving electrode plates includes a transparent substrate, a circuit layer, an insulating layer, an electrode layer, at least a conducting pillar and an alignment layer. The transparent substrate has a surface, and the circuit layer is atop the surface. The conducting pillar is arranged in the insulating layer and connected to the electrode layer and the circuit layer. The alignment layer contacts the liquid layer. The electrode layer is interposed between the alignment layer and the insulating layer. The electrode layer in at least one of the driving electrode plates includes at least two ring-shaped electrodes.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: March 1, 2016
    Assignee: SILICON TOUCH TECHNOLOGY INC.
    Inventors: Chi-Yuan Chin, Yan Wu, Rong-Li Liu, Ling-Yuan Tseng, Yong Cao, Cheng-Chieh Yang
  • Publication number: 20160042951
    Abstract: The embodiments herein provides methods for forming a PVD silicon oxide or silicon rich oxide, or PVD SiN or silicon rich SiN, or SiC or silicon rich SiC, or combination of the preceding including a variation which includes controlled doping of hydrogen into the compounds heretofore referred to as SiOxNyCz:Hw, where w, x, y, and z can vary in concentration from 0% to 100%, is produced as a hardmask with optical properties that are substantially matched to the photo-resists at the exposure wavelength. Thus making the hardmask optically planarized with respect to the photo-resist. This allows for multiple sequences of litho and etches in the hardmask while the photo-resist maintains essentially no optical topography or reflectivity variations.
    Type: Application
    Filed: October 8, 2015
    Publication date: February 11, 2016
    Inventors: Christopher Dennis BENCHER, Daniel Lee DIEHL, Huixiong DAI, Yong CAO, Tingjun XU, Weimin (Wilson) ZENG, Peng XIE
  • Patent number: 9183395
    Abstract: Firmware updates at an information handling system flash memory device, such as provisioning information stored on a USB device, are securely performed by using a buffer memory and a secured code. An application running on a CPU generates a firmware update and a security code, such as a ciphered hash code based on the firmware update, stores the firmware update and security code in a buffer, and informs a management processor of the update. The management processor analyzes the firmware update to authorize copying of the update from the buffer to the flash memory device. For instance, the management processor creates the security code from the firmware update and compares the created code with the security code stored in the buffer to validate the firmware update.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: November 10, 2015
    Assignee: Dell Products L.P.
    Inventors: Terry Wayne Liles, Charles T. Perusse, Jr., Yong Cao, Abhay Arjun Salunke, Marshal F. Savage
  • Patent number: 9177796
    Abstract: The embodiments herein provides methods for forming a PVD silicon oxide or silicon rich oxide, or PVD SiN or silicon rich SiN, or SiC or silicon rich SiC, or combination of the preceding including a variation which includes controlled doping of hydrogen into the compounds heretofore referred to as SiOxNyCz:Hw, where w, x, y, and z can vary in concentration from 0% to 100%, is produced as a hardmask with optical properties that are substantially matched to the photo-resists at the exposure wavelength. Thus making the hardmask optically planarized with respect to the photo-resist. This allows for multiple sequences of litho and etches in the hardmask while the photo-resist maintains essentially no optical topography or reflectivity variations.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: November 3, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Christopher Dennis Bencher, Daniel Lee Diehl, Huixiong Dai, Yong Cao, Tingjun Xu, Weimin Zeng, Peng Xie
  • Patent number: 9162930
    Abstract: The present invention generally relates to a doped aluminum nitride hardmask and a method of making a doped aluminum nitride hardmask. By adding a small amount of dopant, such as oxygen, when forming the aluminum nitride hardmask, the wet etch rate of the hardmask can be significantly reduced. Additionally, due to the presence of the dopant, the grain size of the hardmask is reduced compared to a non-doped aluminum nitride hardmask. The reduced grain size leads to smoother features in the hardmask which leads to more precise etching of the underlying layer when utilizing the hardmask.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: October 20, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yong Cao, Kazuya Daito, Rajkumar Jakkaraju, Xianmin Tang
  • Publication number: 20150293363
    Abstract: Light wave separation lattices and methods of formation are provided herein. In some embodiments, a light wave separation lattice includes a first layer having the formula ROXNY, wherein the first layer has a first refractive index; and a second layer, different from the first layer, disposed atop the first layer, and having the formula R?OXNY, wherein the second layer has a second refractive index different from the first refractive index, and wherein R and R? are each one of a metal or a dielectric material. In some embodiments, a method of forming a light wave separation lattice includes depositing a first layer having a predetermined desired refractive index atop a substrate by a physical vapor deposition process; and depositing a second layer, different from the first layer, atop the first layer, wherein the second layer has a predetermined second refractive index different from the first refractive index.
    Type: Application
    Filed: May 30, 2014
    Publication date: October 15, 2015
    Applicant: APPLIED MATERIALS, INC.
    Inventors: DANIEL LEE DIEHL, YONG CAO, MINGWEI ZHU, TAI-CHOU PAPO CHEN
  • Publication number: 20150293353
    Abstract: A crystal lens includes a liquid crystal layer, a pair of alignment layers, a first electrode set, and a second electrode set. The alignment layers are positioned on different sides of the liquid crystal layer. The first and second electrode sets are positioned on different alignment layers. The first electrode set includes a first transparent insulating layer and a first electrode layer. The first electrode set attaches to one of the alignment layers. The second electrode set includes a second transparent insulating layer, a second electrode layer, and a dielectric film. The second electrode layer includes a hole-patterned electrode. The dielectric film attaches to the first transparent insulating layer. The hole-patterned electrode exposes the dielectric film. In addition, an external power supply provides a driving voltage to the hole-patterned electrode and the first electrode layer, so that the liquid crystal molecules inside the liquid crystal layer drive rotation.
    Type: Application
    Filed: April 3, 2015
    Publication date: October 15, 2015
    Inventors: CHI-YUAN CHIN, LIN PING ZHANG, YONG CAO
  • Patent number: 9159928
    Abstract: Disclosed are an amine-oxide-group-containing conjugated polymer photoelectric material and application thereof. The amine-oxide-group-containing conjugated polymer photoelectric material consists of conjugated main chains and a side chain containing an amine oxide unit, and is applied in an organic photoelectric device. The material has desirable alcohol/water solubility and photoelectric properties, is suitable for making a multi-layer solution for machining a device, and meanwhile can prevent an adverse effect incurred by freely moving counter ions in a common polyelectrolyte to the device. The material may be used as a cathode interface modification layer applied in organic photoelectric devices such as light-emitting and photovoltaic devices, so as to improve performance of the devices.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: October 13, 2015
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Fei Huang, Xing Guan, Kai Zhang, Yong Cao
  • Publication number: 20150278524
    Abstract: Firmware updates at an information handling system flash memory device, such as provisioning information stored on a USB device, are securely performed by using a buffer memory and a secured code. An application running on a CPU generates a firmware update and a security code, such as a ciphered hash code based on the firmware update, stores the firmware update and security code in a buffer, and informs a management processor of the update. The management processor analyzes the firmware update to authorize copying of the update from the buffer to the flash memory device. For instance, the management processor creates the security code from the firmware update and compares the created code with the security code stored in the buffer to validate the firmware update.
    Type: Application
    Filed: June 15, 2015
    Publication date: October 1, 2015
    Applicant: Dell Products L.P.
    Inventors: Terry Wayne Liles, Charles T. Perusse, JR., Yong Cao, Abhay Arjun Salunke, Marshal F. Savage
  • Publication number: 20150260884
    Abstract: An optical zoom structure includes an amplifying set, a focusing set, and an image display region. The amplifying set resembles the diverging optical effect and includes a first fixed focal set and a first liquid crystal lens. The focusing set resembles a converging optical effect and includes a second fixed focal set and a second liquid crystal lens. The first liquid crystal lens and the second fixed focal set are disposed between the first fixed focal set and the second liquid crystal lens. The first distance is from the first fixed focal set to the first liquid crystal lens. The second distance is from the first liquid crystal lens to the second fixed focal set. The third distance is from the second fixed focal set to the second liquid crystal lens. The fourth distance is from the second first liquid crystal lens to the image display region.
    Type: Application
    Filed: February 12, 2015
    Publication date: September 17, 2015
    Inventors: CHI-YUAN CHIN, ZHI GAO XU, LIN PING ZHANG, YONG CAO
  • Publication number: 20150255329
    Abstract: Methods for forming a passivation protection structure on a metal line layer formed in an insulating material in an interconnection structure are provided. In one embodiment, a method for forming passivation protection on a metal line in an interconnection structure for semiconductor devices includes selectively forming a metal capping layer on a metal line bounded by a dielectric bulk insulating layer in an interconnection structure formed on a substrate in a processing chamber incorporated in a multi-chamber processing system, in-situ forming a barrier layer on the substrate in the processing chamber; wherein the barrier layer is a metal dielectric layer, and forming a dielectric capping layer on the barrier layer in the multi-chamber processing system.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 10, 2015
    Inventors: He Ren, Mehul B. NAIK, Yong CAO, Sree Rangasai V. KESAPRAGADA, Mei-Yee SHEK, Yana CHENG
  • Publication number: 20150221596
    Abstract: An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber. The substrate has an exposed copper surface and an exposed low-k dielectric surface. A metal layer is formed over the copper surface but not over the low-k dielectric surface. A metal-based dielectric layer is formed over the metal layer and the low-k dielectric layer.
    Type: Application
    Filed: February 5, 2014
    Publication date: August 6, 2015
    Inventors: He REN, Mehul B. NAIK, Yong CAO, Mei-Yee SHEK, Yana Cheng, Sree Rangasai V. Kesapragada
  • Patent number: 9092424
    Abstract: Described is a technology for understanding entities of a webpage, e.g., to label the entities on the webpage. An iterative and bidirectional framework processes a webpage, including a text understanding component (e.g., extended Semi-CRF model) that provides text segmentation features to a structure understanding component (e.g., extended HCRF model). The structure understanding component uses the text segmentation features and visual layout features of the webpage to identify a structure (e.g., labeled block). The text understanding component in turn uses the labeled block to further understand the text. The process continues iteratively until a similarity criterion is met, at which time the entities may be labeled. Also described is the use of multiple mentions of a set of text in the webpage to help in labeling an entity.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: July 28, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Zaiqing Nie, Yong Cao, Ji-Rong Wen, Chunyu Yang