Abstract: Systems and methods that facilitate improved programming memory cells in a nonvolatile memory (e.g., flash memory) are presented. An optimized voltage component can facilitate supplying respective voltages to a source, drain, and gate associated with a memory cell during operations, such as programming operations. The optimized voltage component can facilitate supplying a predetermined source bitline voltage to a memory cell during programming of the cell to facilitate reducing leakage currents associated with the bitlines, which can improve programming of the memory cell, and to facilitate reducing the programming current, which can result in power efficient programming and improved programming speed.

Abstract: A memory device comprising an optimization component that facilitates erasing memory cells in a substantially homogeneous electromagnetic field and methods that facilitate erasing memory cells in a substantially homogeneous electromagnetic field are presented. The optimization component facilitates selecting a subset of memory cells to be erased at the same time, such that a memory cell in the subset of memory cells has two neighbor memory cells adjacent thereto that are in the subset of memory, or one neighbor memory cell adjacent thereto when the memory cell is an end-row memory cell. The optimization component facilitates performing a Fowler-Nordheim channel erase to erase the subset of memory cells, and a predetermined voltage potential associated with an erase command is applied to each cell of the subset of memory cells to facilitate reducing fringing effect associated with the electromagnetic fields applied to the cells during the erase.

Abstract: An emission driver for an organic light emitting display device is disclosed. The emission driver includes a plurality of flip-flops, and each flip-flop selectively receives two input signals and inverts a level of a received input signal. Also, each flip-flop transmits the level-inverted signal to an adjacent flip-flop, inverts the level-inverted signal, and transmits the inverted level-inverted signal to the adjacent flip-flop and as an emission control signal. To invert the level of the received input signal, the emission driver includes a level shifter, which includes transistors of the same conductivity type arranged to reduce power consumption.

Abstract: Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount.

Abstract: The present invention relates to a compound having a good agonistic activity to melanocortin receptor, or pharmaceutically acceptable salt or isomer thereof, and an agonistic composition for melanocortin receptor comprising the same as an active ingredient.

Abstract: A receiver includes a frequency converter configured to generate a I signal and a Q signal from each band of a multiband signal and a mismatch compensator configured to estimate a mismatch of the I signal and the Q signal for each of the bands of the multiband signal and store at least one compensation value to compensate for the estimated mismatch. The frequency converter compensates for the mismatch of the I signal and the Q signal based on the at least one compensation value.

Abstract: An emission control driver compensates for the threshold voltages of transistors to provide uniform brightness using a plurality of emission control signal generating circuits.

Abstract: A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

Abstract: A method and system for testing a semiconductor device is disclosed. The method provides an integrated test program defined by a plurality of test items, and a test program defined by a sub-set of the test items. Test data is derived by batch sample testing of the semiconductor device, and an error rate for a test item is computed and then compared to a reference data value. On the basis of the comparison between the error rate and the reference data value, the test program may be modified in real-time.

Abstract: A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

Abstract: A memory device comprised of a plurality of memory cells that can each include multiple charge storage elements in undercut regions that are formed under a tunneling barrier and adjacent to a gate oxide layer of each memory cell. The tunneling barrier can be formed from a high work function material, such as P+ polycrystalline silicon or a P-type metal, and/or a high-K material. The memory cell can reduce the likelihood of gate electron injection through the gate electrode and into the charge storage elements during a Fowler-Nordheim erase by employing such tunneling barrier. Systems and methods of fabricating memory devices having at least one such memory cell are provided.

Abstract: An optical sheet includes a base film in which light is incident from a lower side, a plurality of prism patterns and a diffusion member. The prism patterns are protruded to be spaced apart from each other on the base film to enhance the front luminance of light incident from the lower side of the base film. The diffusion member is disposed between prism patterns to have a diffusion surface in parallel with the base film. The diffusion member includes a plurality of diffusion dots capable of enhancing the luminance uniformity of light incident from the lower side of the base film. Thus, front luminance and luminance uniformity may be enhanced due to a juxtaposition of the prism patterns and the diffusion portion, and the viewing angle of the LCD device may be enhanced.

Abstract: An organic light emitting display device and a method of driving the same. In a method of driving an organic light emitting display device including a second capacitor having a first terminal coupled to a gate electrode of a driving transistor and a first capacitor coupled between the gate electrode of the driving transistor and a first power source, the driving method includes supplying a threshold voltage of an organic light emitting diode to a second terminal of the second capacitor during a period when a first current is sunk via the driving transistor, and supplying a data signal to the second terminal of the second capacitor after a voltage corresponding to a difference between a voltage applied to the gate electrode of the driving transistor and the threshold voltage of the organic light emitting diode is charged in the second capacitor.

Abstract: A communications protocol interface is configured as being divisible into a core portion and an extensible portion. The extensible portion of the communications protocol interface is further configured to be customized in scope so that each network element can communicate a unique and optionally small, subset of actual interoperable data that corresponds to at least a portion of a larger defined data set. A software generator program is configured to generate a set of extensible source code that operates upon the subset of actual data and that directs the execution of the extensible portion of the communications protocol interface for a particular network element.

Abstract: Example embodiments may provide a method of testing semiconductor devices by identifying units of lots and a test tray such that a plurality of lots having semiconductor devices may be continuously tested by a handler. Example embodiments may also provide a handler used to test the semiconductor devices.

Abstract: The present invention relates to a compound of the following formula 1, pharmaceutically acceptable salt and isomer thereof effective as agonist of melanocortin receptor, and an agonistic composition of melanocortin receptor comprising the same as active ingredient.

Abstract: Erasing wordlines at the same time can cause undesirable results because some wordlines are affected by electromagnetic waves of other wordlines. However, other wordlines are not affected because they are next to contacts. Therefore, it can be beneficial to erase wordlines in a multi-phase sequence that allows for erasing wordlines without an impact from other wordlines.

Abstract: An organic light emitting display (OLED) device using a tiling technique including a system-on-panel (SOP)-type emission control driver. The emission control driver includes a shift register and a logical operation portion having a plurality of logic gates, each of which receives output signals from the shift register and performs a logical OR operation on the received signals. An active load of each of the logic gates is controlled using two output signals and two inverted output signals of two adjacent flip-flops. Also, each of the logic gates performs a logical OR operation on the two output signals of the two adjacent flip-flops and generates an emission control signal. The flip-flops and the logic gates of the emission control driver include positive channel metal oxide semiconductors (PMOS) transistors.

Abstract: A test apparatus includes one handler connected to a tester and one test board divided into two or more sites or two or more test boards. Since only the sites on the test board (or test boards) need be duplicated, rather than the loading lanes or sorters of the handler, the test apparatus can be conveniently compact. Further, while testing semiconductor devices on one site or one test board, semiconductor devices in another site or on another test board can be sorted according to the test result. This enables the reduction or elimination of tester idle time to optimize the efficiency of the test apparatus.

Abstract: A method of manufacturing a semiconductor device which can prevent leakage current caused by gate electrodes intersecting element isolation layers in a major axis of an active region, and which further has vertical channels to provide a sufficient overlap margin, and a semiconductor device manufactured using the above method. The device includes gate electrodes formed on element isolation layers that are disposed between active regions and have top surfaces that are higher than the top surfaces of the active regions. Since the gate electrodes are formed on the element isolation layers, leakage current in a semiconductor substrate is prevented. In addition, the gate electrodes are formed using a striped shape mask pattern, thereby obtaining a sufficient overlap margin compared to a contact shape or bar shape pattern.