Abstract: A microactuator including a base frame; and a moving plate having both ends supported by a plurality of elastic support portions inside the base frame, the moving plate having a first side on which a reflective mirror for changing a light path is disposed. At least one first rib is disposed along an edge of a second side of the moving plate, which is the reverse side of the first side of the moving plate, and a second rib is disposed in the center of the second side of the moving plate and correspondingly encloses a permanent magnet. Also, a portion of the second side of the moving plate, except for the first and second ribs, is removed to a predetermined depth to reduce the weight of the entire moving plate and to define the first and second ribs.

Abstract: A pilot designing method in an uplink OFDMA system is provided. In the uplink OFDMA system, communications are carried out in a frame divided into time-frequency lattices, and each time-frequency lattice includes a plurality of data symbol periods and a plurality of pilot symbol periods intermittently arranged with respect to the data symbol periods. The frame is divided into a plurality of blocks. The blocks are allocated to the terminals. A predetermined allocated pilot time-frequency lattice is shared between adjacent terminals.

Abstract: In a semiconductor device and a method of manufacturing the same, a conductive structure is formed on an active region defined by a device isolation layer on a semiconductor substrate. The conductive structure includes a gate pattern and source/drain regions adjacent to the gate pattern. A first semiconductor layer is formed on the active region by a selective epitaxial growth (SEG) process. An amorphous layer is formed on the first semiconductor layer. A second semiconductor layer is formed from a portion of the amorphous layer by a solid-phase epitaxy (SPE) process. Elevated structures are formed on the source/drain regions by removing a remaining portion of the amorphous layer from the substrate, so the elevated structure includes the first semiconductor layer and the second semiconductor layer stacked on the first semiconductor layer. The device isolation layer may be prevented from being covered with the elevated structures, to thereby prevent contact failures.

Abstract: In a method of manufacturing a semiconductor device, a string structure including a selection transistor and a memory cell on a substrate. An insulation layer pattern is formed on the substrate to cover the string structure. The insulation layer pattern includes at least one opening exposing a portion of the substrate adjacent to the selection transistor. A seed layer including a single-crystalline material is formed in the opening. An amorphous thin film including an amorphous material is formed on the insulation layer pattern and the seed layer. The amorphous thin film is transformed into a single-crystalline thin film, using the single-crystalline material in the seed layer as a seed during a phase transition of the amorphous thin film, to form a channel layer on the insulation layer pattern and the seed layer. Therefore, the semiconductor device including the channel layer having the single-crystalline thin film may be manufactured.

Abstract: A method of deregistering a relay station and a multi-hop relay system for the method are provided. In order to deregister the relay station, a base station ends a handover of mobile stations connected to the relay station, and informs the relay station accordingly. When the handover of the mobile stations is ended, the relay station performs a deregistration procedure. Messages that already exist are used as messages necessary for the method.

Abstract: A vertical semiconductor device, a DRAM device, and associated methods, the vertical semiconductor device including single crystalline active bodies vertically disposed on an upper surface of a single crystalline substrate, each of the single crystalline active bodies having a first active portion on the substrate and a second active portion on the first active portion, and the first active portion having a first width smaller than a second width of the second active portion, a gate insulating layer on a sidewall of the first active portion and the upper surface of the substrate, a gate electrode on the gate insulating layer, the gate electrode having a linear shape surrounding the active bodies, a first impurity region in the upper surface of the substrate under the active bodies, and a second impurity region in the second active portion.

Abstract: Metal-oxide-semiconductor (MOS) transistors having elevated source/drain regions and methods of fabricating the same are provided. The MOS transistors may include a gate pattern formed to cross over a predetermined region of a substrate. Recessed regions are provided in the substrate adjacent to the gate pattern. Epitaxial layers are provided on bottom surfaces of the recessed regions. High concentration impurity regions are provided in the epitaxial layers. The recessed regions may be formed using a chemical dry etching techniques.

Abstract: In a semiconductor device, and a method of manufacturing thereof, the device includes a substrate of single-crystal semiconductor material extending in a horizontal direction and a plurality of interlayer dielectric layers on the substrate. A plurality of gate patterns are provided, each gate pattern being between a neighboring lower interlayer dielectric layer and a neighboring upper interlayer dielectric layer. A vertical channel of single-crystal semiconductor material extends in a vertical direction through the plurality of interlayer dielectric layers and the plurality of gate patterns, a gate insulating layer being between each gate pattern and the vertical channel that insulates the gate pattern from the vertical channel.

Abstract: A light source module of a display device comprises light-emitting blocks each of which comprises multiple sets of light sources, with different sets emitting different colors (e.g. red, green and blue). Each set is independently controllable according to one or more driving parameters.

Abstract: A heated mascara device having a mascara container housing a mascara formulation and a mascara applicator having an applicator head control heated by a heating system, the heating system turning on when the mascara applicator is disengaged from the mascara container and turning off when the mascara applicator is engaged with the mascara container. The applicator head has two sets of lined tooth protruding from a casing of the applicator head, a first set of a single combing toothed strip for combing the eyelashes and a second set of a plurality of lined applicator toothed strips for applying the mascara to the eyelashes.

Abstract: A heated eyelash curler comprising a curling head having a heating element, a cover switch engaged with the heated eyelash curler, and a body enclosing operational components of the heated eyelash curler connected to the curling head. The cover switch turns the heating element “on” after exposing the curling head and turns the heating element “off” after covering the curling head instead of the current practice of manually turning the switch “on” and “off”. The engagement between the parts on the cover switch and the heated eyelash curler attaches the cover switch to the body of the heated eyelash curler. The heating element on the eyelash curler can be conventional or it can adopt wiring in a zigzag configuration housed within a conducting tube coated with a non-sticking material.

Abstract: Disclosed are concatameric proteins comprising two soluble domains, in which the C-terminus of a soluble domain of a biologically active protein is linked to the N-terminus of an identical soluble domain or a distinct soluble domain of a biologically active protein. Also, the present invention discloses dimeric proteins formed by formation of intermolecular disulfide bonds at the hinge region of two monomeric proteins formed by linkage of a concatamer of two identical soluble extracellular regions of proteins involving immune response to an Fc fragment of an immunoglobulin molecule, their glycosylated proteins, DNA constructs encoding the monomeric proteins, recombinant expression plasmids containing the DNA construct, host cells transformed or transfected with the recombinant expression plasmids, and a method of preparing the dimeric proteins by culturing the host cells. Further, the present invention discloses pharmaceutical or diagnostic compositions comprising the dimeric protein or its glycosylated form.

Abstract: Methods of fabricating metal-oxide-semiconductor (MOS) transistors having elevated source/drain regions are provided. The MOS transistors formed by these methods may include a gate pattern formed to cross over a predetermined region of a substrate. Recessed regions are provided in the substrate adjacent to the gate pattern. Epitaxial layers are provided on bottom surfaces of the recessed regions. High concentration impurity regions are provided in the epitaxial layers. The recessed regions may be formed using a chemical dry etching techniques.

Abstract: Provided are a handover method using a relay station having a handover control function and a multi-hop relay system. When handover of mobile stations connected to a relay station is required, the relay station negotiates handover of the mobile stations with a base station by exchanging a handover request message and a handover response message. Upon execution of handover of the mobile stations, the relay station collects handover results of the mobile stations and transmits the handover results to the base station. The base station then updates information about the handed-over mobile stations.

Abstract: Disclosed is a protein variant which substitutes valine for phenylalanine residue in a binding domain having a biological response-modifying function by binding to a receptor, ligand or substrate. Also, the present invention discloses a DNA encoding the protein variant, a recombinant expression vector to which the DNA is operably linked, a host cell transformed or transfected with the recombinant expression vector, and a method of preparing the protein variant comprising cultivating the host cell and isolating the protein variant from the resulting culture. Further, the present invention discloses a pharmaceutical composition comprising the protein variant and a pharmaceutically acceptable carrier.

Abstract: An equipment inspecting device for inspecting at least one piece of equipment positioned in an office from among a plurality of offices included in the equipment inspection target recognizes office information for indicating a position of an office, and searches office equipment information for indicating a previous state of at least one piece of equipment positioned in the office by using the office information. The equipment inspecting device transmits the searched office equipment information to the equipment information collecting device so that an equipment information collecting device for collecting at least one piece of equipment information corresponding to at least one piece of equipment may generate update information for indicating a state change of at least one piece of equipment. Also, the equipment inspecting device receives the update information from the equipment information collecting device, and updates office equipment information by using the update information.

Abstract: In a conductive structure, method of forming the conductive structure, a vertical-type pillar transistor and a method of manufacturing the vertical-type pillar transistor, the conductive structure includes a pillar provided on a substrate. A first conductive layer pattern is provided on a sidewall of the pillar, at least a portion of the first conductive layer pattern facing the sidewall of the pillar. A second conductive layer pattern is provided on a surface of the first conductive layer pattern, the second conductive layer pattern facing the sidewall of the pillar. A hard mask pattern covers upper surfaces of the first conductive layer pattern and the pillar. The conductive structure includes an electric conductor with a relatively low resistance. The conductive structure may be used as an electrode of a memory device.

Abstract: A display device with improved display quality is provided. The display device includes an LED light source emitting light, a display panel receiving the light to display an image, and a backlight driver adjusting the magnitude and the duty ratio of an LED current I_LED flowing through the LED light source. The waveform of the LED current I_LED includes at least one of a rising section in which the magnitude of the LED current more gradually increases from a turn-off current value to a peak value, and a falling section in which the magnitude of the LED current more gradually decreases from the peak value to the turn-off current value. This acts to reduce waterfall noise.

Abstract: A semiconductor package includes a main substrate, a semiconductor chip having a first side and a second side, the first side of the semiconductor chip disposed on the main substrate and electrically connected to the main substrate, and a conductive network formed on the second side of the semiconductor chip.