Abstract: In a vertical-type memory device and a method of manufacturing the vertical-type memory device, the vertical memory device includes an insulation layer pattern of a linear shape provided on a substrate, pillar-shaped single-crystalline semiconductor patterns provided on both sidewalls of the insulation layer pattern and transistors provided on a sidewall of each of the single-crystalline semiconductor patterns. The transistors are arranged in a vertical direction of the single-crystalline semiconductor pattern, and thus the memory device may be highly integrated.

Abstract: The present invention provides for Ni-based lithium transition metal oxide cathode active materials used in lithium ion secondary batteries. The cathode active materials are substantially free of Li2CO3 impurity and soluble bases.

Abstract: The present invention provides for lithium ion secondary batteries that use Ni-based lithium transition metal oxide cathode active materials. The cathode active materials are substantially free of Li2CO3 impurity and soluble bases.

Abstract: The present invention provides for a process of making a Ni-based lithium transition metal oxide cathode active materials used in lithium ion secondary batteries. The cathode active materials are substantially free of Li2CO3 impurity and soluble bases.

Abstract: A holder for cosmetic products having a hollow shell housing a removable reservoir containing a cosmetic composition. The removable reservoir is disposable or reusable. The removable reservoir comes with a replaceable applicator for the composition contained in the removable reservoir. The replaceable applicator has a handle acting as a cover for the removable reservoir. The handle inserts into an outer cover having an outside surface matching and complimenting the outside surface of the hollow shell.

Abstract: A carry-on organizer for beauty implements having a plurality of horizontally or vertically fused covers, holders or containers as components of the carry-on organizer, the components having different or uniform length and different or similar internal dimensions for covering, holding or housing the beauty implement. The components of the carry-on organizer can be all fused covers, all fused holders, all fused containers or a combination of fused covers, holders and containers.

Abstract: Disclosed is a protein variant which substitutes valine for phenylalanine residue in a binding domain having a biological response-modifying function by binding to a receptor, ligand or substrate. Also, the present invention discloses a DNA encoding the protein variant, a recombinant expression vector to which the DNA is operably linked, a host cell transformed or transfected with the recombinant expression vector, and a method of preparing the protein variant comprising cultivating the host cell and isolating the protein variant from the resulting culture. Further, the present invention discloses a pharmaceutical composition comprising the protein variant and a pharmaceutically acceptable carrier.

Abstract: In order to perform local dimming, a driving dimming duty cycle is generated using a target gamma curve (TGV), wherein the driving dimming duty cycle corresponds to a representative grayscale value (RGV) of each of a plurality of dimming unit areas. Each of a plurality of light unit blocks of a light source is driven based on the driving dimming duty cycle, wherein the light unit blocks correspond to the dimming unit areas, respectively. Therefore, a display apparatus may display an image having a higher contrast ratio than normal.

Abstract: In a method of forming a single crystalline semiconductor layer, an amorphous layer may be formed on a seed layer that includes a single crystalline material. The single crystalline layer may be formed from the amorphous layer by irradiating a laser beam onto the amorphous layer using the seed layer as a seed for a phase change of the amorphous layer. The laser beam may have an energy for melting the amorphous layer, and the laser beam may be irradiated onto the amorphous layer without generating a superimposedly irradiated region of the amorphous layer. The single crystalline layer may include a high density of large-sized grains without generating a protrusion thereon through a simple process so that a semiconductor device including the single crystalline layer may have a high degree of integration and improved electrical characteristics.

Abstract: An interface device for an optical recording and/or reproducing apparatus for recording and playback of an optical disc, wherein the configuration of an interface circuit between a pickup that reads and writes information from/on the optical disc and a radio frequency (RF) integrated circuit (IC) for signal processing is simplified. To this end, the interface device includes a pickup, an integrated circuit, and a multiplexer. The pickup drives a plurality of laser diodes generating laser signals to record and/or reproduce information on a plurality of discs, respectively, and receives the laser signals reflected from the discs and output photodiode (PD) signals corresponding respectively to the received laser signals. The integrated circuit controls outputs of the laser diodes, and processes the PD signals from the pickup.

Abstract: A method of fabricating a semiconductor device includes forming an insulation layer structure on a single-crystalline silicon substrate, forming a first insulation layer structure pattern comprising a first opening by etching a portion of the insulation layer structure, filling the first opening with a non-single-crystalline silicon layer, and forming a single-crystalline silicon pattern by irradiating a first laser beam onto the non-single-crystalline silicon layer. The method also includes forming a second insulation layer structure pattern comprising a second opening by etching a portion of the first insulation layer structure, filling the second opening with a non-single-crystalline silicon-germanium layer, and forming a single-crystalline silicon-germanium pattern by irradiating a second laser beam onto the non-single-crystalline silicon-germanium layer.

Abstract: Disclosed is a flash memory device including a memory cell array having memory cells arranged at intersections of word lines and bit lines, such that one bit line is associated with a plurality of memory cells connected in series, a voltage generator configured to generate at least a first selection voltage, a row selection circuit configured to drive the non-selected word lines based on at least the first non-selected voltage, and a control logic circuit configured to control the voltage generator and the row selection circuit, such that the voltage generator generates at least the first non-selection voltage based on a location of a selected memory cell in the plurality of memory cells.

Abstract: A method of forming a thin layer including providing a first single-crystalline silicon layer partially exposed through an opening in an insulation pattern and forming an epitaxial layer on the first single-crystalline silicon layer and forming an amorphous silicon layer on the insulation pattern, the amorphous silicon layer having a first portion adjacent the epitaxial layer and a second portion spaced apart from the first portion, wherein the amorphous silicon layer is formed on the insulation pattern at substantially the same rate at the first portion and at a second portion. The amorphous silicon layer may be formed to a uniform thickness without a thinning defect.

Abstract: In a semiconductor device and a method of manufacturing the same, a first insulation layer is removed from a cell area of a substrate and a first active pattern is formed on the first area by a laser-induced epitaxial growth (LEG) process. Residuals of the first insulation layer are passively formed into a first device isolation pattern on the first area. The first insulation layer is removed from the second area of the substrate and a semiconductor layer is formed on the second area of the substrate by a SEG process. The semiconductor layer on the second area is patterned into a second active pattern including a recessed portion and a second insulation pattern in the recessed portion is formed into a second device isolation pattern on the second area. Accordingly, grain defects in the LEG process and lattice defects in the SEG process are mitigated or eliminated.

Abstract: In a semiconductor device and a method of manufacturing the same, a conductive structure is formed on an active region defined by a device isolation layer on a semiconductor substrate. The conductive structure includes a gate pattern and source/drain regions adjacent to the gate pattern. A first semiconductor layer is formed on the active region by a selective epitaxial growth (SEG) process. An amorphous layer is formed on the first semiconductor layer. A second semiconductor layer is formed from a portion of the amorphous layer by a solid-phase epitaxy (SPE) process. Elevated structures are formed on the source/drain regions by removing a remaining portion of the amorphous layer from the substrate so the elevated structure includes the first semiconductor layer and the second semiconductor layer stacked on the first semiconductor layer. The device isolation layer may be prevented from being covered with the elevated structures, to thereby prevent contact failures.

Abstract: A method and an apparatus for performing handover in a mobile communication network are provided. The method of performing handover in a mobile communication network includes: obtaining a service providing time period and a utility function on a candidate network basis; obtaining a selection function of each of the candidate networks using the utility function and the service providing time period; and selecting a network for handover among the plurality of mobile networks using the selection function. Therefore, in consideration of user satisfaction and a network service quality, utility functions are defined and by selecting a network for handover using the utility functions, a network suitable for a user environment can be effectively selected and thus it is possible to perform handover that has a performance and a cost suitable for user request and that can maximize a quality of a mobile service.

Abstract: Non-volatile memory devices according to embodiments of the present invention include an EEPROM transistor in a first portion of a semiconductor substrate, an access transistor in a second portion of the semiconductor substrate and an erase transistor in a third portion of the semiconductor substrate. The second portion of the semiconductor substrate extends adjacent a first side of the first portion of the semiconductor substrate and the third portion of the semiconductor substrate extends adjacent a second side of the first portion of the semiconductor substrate. The first and second sides of the first portion of the semiconductor substrate may be opposite sides of the first portion of the semiconductor substrate. The access transistor has a first source/drain terminal electrically connected to a first source/drain terminal of the EEPROM transistor and the erase transistor has a first source/drain terminal electrically connected to a second source/drain terminal of the access transistor.

Abstract: A method of fabricating a semiconductor device includes forming a buffer pattern on a substrate, the buffer pattern including germanium, recrystallizing the buffer pattern to form a strained relaxation buffer pattern, and forming a tensile silicon cap on the strained relaxation buffer pattern, the cap being under tensile strain.

Abstract: Disclosed herein is an echo cancellation and echo channel estimation system that can relay transmit signals without interference with echo signals by canceling the undesired echo signals received by a relay. The echo cancellation and echo channel estimation system is designed to relay signals between a transmitter and a receiver through a relay using multiple antennas. The echo cancellation and echo channel estimation system includes a receive antenna, a preprocessing vector generation module, an echo cancellation module, and a transmit array antenna. The receive antenna receives a transmit signal from the transmitter and an echo signal via an echo channel. The preprocessing vector generation module generates a preprocessing vector and applies the preprocessing vector, the transmit signal and the echo signal, received from the receive antenna, to the echo cancellation module.