Abstract: Provided is a chitosan spreading system using low temperature atmospheric pressure plasma.

Abstract: Disclosed herein too is a method that includes dispersing nanotubes in media that comprises flavin moieties substituted with solubilizing side chains, and/or non-flavin containing molecular species; self-assembling the flavin moieties and other non-flavin containing molecular species in a pattern that is orderly wrapped around the nanotubes to form a composite; introducing desired amounts of an optional reagent that competes with self-assembly in order to disturb the wrapping around nanotubes with moderate order; and centrifuging the mass of the nanotubes and the composites to extract the composite from other nanotubes that are not in composite form.

Abstract: A data alignment circuit of a semiconductor memory apparatus for receiving and aligning parallel data group includes a first control unit, a second control unit, a first alignment unit and a second alignment unit. The first alignment unit generates a first control signal group in response to an address group, a clock signal, and a latency signal. The second control unit generates a second control signal group in response to the address group, the clock signal, and the latency signal. The first alignment unit aligns the parallel data group as a first serial data group in response to the first control signal group. The second alignment unit aligns the parallel data group as a second serial data group in response to the second control signal group.

Abstract: Provided is a dissolved oxygen measurement system. The dissolved oxygen measurement system includes a hydrogen storage device storing hydrogen, a first hydrogen fuel cell in which the hydrogen stored in the hydrogen storage device and water supplied from the outside in real time react with each other to generate first electricity energy, a water storage tank storing the water supplied from the outside, a second hydrogen fuel cell in which the water supplied from the water storage tank and the hydrogen stored in the hydrogen storage device react with each other to generate second electricity energy, and a control unit analyzing a difference between the first electricity energy and the second electricity energy.

Abstract: Provided is a method of fabricating of a nanowire porous medium and a medium formed by the method. In this method, water and organic solvent are mixed and stirred to form a large amount of bubbles, and the bubbles are used such that porosity can be formed more easily and in a more amount. Therefore, the nanowire porous medium can be fabricated more easily and simply. Also, in the nanowire porous medium according to the inventive concept, absorption capacity is increased by containing nanowires, and flexibility and durability are increased by containing a polymer.

Abstract: A multi-junction stripline circulator, comprising a housing with a cavity structure and a plurality of stripline junction circuits stacked within the cavity structure and connected in a cascade arrangement. Each stripline junction circuit comprises a stripline conductor having a plurality of ports, where one of the ports is connected to a port of a stripline conductor of each consecutive junction circuit in a cascade arrangement, and a pair of ferrite elements sandwiching the stripline conductor therebetween. The multi-junction stripline circulator further comprises one or more center ground planes, each having radial arms connected to ground. Each of the center ground planes are disposed between two consecutive stripline junction circuits in said cascade arrangement.

Abstract: Provided is a transport packet generating apparatus that generates a transport packet having a variable length, and the length of the transport packet is indicated by a field included in a header of the transport packet or a synchronization area of the transport packet, the field indicating a length of the transport packet. Also provided is a transport packet depacketizing apparatus that depacketizes the transport packet having the variable length by decoding the field indicating the length of the transport packet or detecting a starting point of the transport packet based on a predetermined rule with respect to the synchronization area to decode the transport packet.

Abstract: Provided is a system and method for controlling a device using Augmented Reality (AR). A system for controlling a device using Augmented Reality (AR) includes a device server, an AR server, and a portable terminal. The device server registers information about each device. The AR server generates an AR screen displaying type information and service-related information of at least one device searched in response to a request of a portable terminal by using the registered device information, and provides the generated AR screen to the portable terminal. The portable terminal connects with a device selected among devices displayed on the AR screen and performs a specific function with the connected device.

Abstract: An image forming apparatus includes a photosensitive body on which a visible image is developed by developer, an intermediate transfer belt to which developer of the photosensitive body is transferred, and a first transfer roller to transfer the developer from the photosensitive body to the intermediate transfer belt, wherein since a developing unit housing at which the photosensitive body is mounted is provided with position regulating guides to support a shaft of the first transfer roller, the intermediate transfer belt comes into contact with the photosensitive body at a uniform angle. As a result, uniform print quality may be obtained.

Abstract: An integrated circuit includes a delay locked loop configured to delay a reference clock signal by a delay time for delay locking and generate a delay locked clock signal, a clock transmission circuit configured to transmit the delay locked clock signal in response to a clock transmission signal, a duty correction circuit configured to perform duty correction operation on an output clock signal of the clock transmission circuit, and a clock transmission signal generation circuit configured to generate the clock transmission signal in response to a command and burst length information.

Abstract: A video communication apparatus in which eye contact can be made with an opposite party of a conversation is provided. The video communication apparatus includes: a monitor unit for video communication; and a camera unit for capturing an image of a user, wherein the monitor unit repeats mode switching between a video mode and a transparent mode according to a specific period, and wherein the camera unit is located behind the monitor unit and captures the image of the user by using a screen of the monitor unit. Accordingly, eye contact can be made with the opposite party when users who participate in video communication talk to each other while seeing communication images.

Abstract: An image forming apparatus includes a first conveyance path to guide a print medium from a pickup unit to a pair of conveyance rollers and a second conveyance path to guide the print medium from the conveyance rollers to a transfer device. The first conveyance path and the second conveyance path are curved in opposite directions so as to reduce vertical heights of the first and second conveyance paths and consequently, reduce a height of a main body of the image forming apparatus.

Abstract: A semiconductor integrated circuit equipped with an equalizer which has a circuit structure simpler than that of a related equalizer according to an FFE scheme or a DFE scheme and is capable of preventing a noise component from being amplified. The data receiver includes a plurality of receiver units, wherein each receiver unit includes a plurality of level detectors which detect different levels, and an encoder, in which the level detectors receive data according to a clock signal having a predetermined phase difference and perform an amplification operation including an equalization function based on feedback data, thereby outputting an amplification signal, and wherein level detectors of one receiver unit receive an amplification signal, as the feedback data, from level detectors of another receiver unit that receives a first clock signal having a phase more advanced than a phase of a second clock signal received in one receiver unit.

Abstract: An internal supply voltage generating circuit includes a clock comparator configured to compare a first clock signal having clock information corresponding to a level of a reference voltage with a second clock signal having clock information corresponding to a level of an internal supply voltage, a control signal generator configured to generate a driving control voltage having a voltage level corresponding to an output signal of the clock comparator; and a driver configured to drive a terminal of the internal supply voltage in response to the driving control voltage.

Abstract: A latency control circuit includes a path calculator configured to calculate a delay value of a path that an input signal is to go through inside a chip and output the delay value as path information, a delay value calculator configured to output delay information representing a delay value for delaying the input signal based on a latency value of the input signal and the path information, and a delayer configured to delay the input signal by a delay corresponding to the delay information.

Abstract: A semiconductor memory device is able to generate an output enable signal in response to a read command and CAS latency information. The semiconductor memory device includes a delay locked loop configured to detect a phase difference of an external clock signal and a feedback clock signal, generate a delay control signal corresponding to the detected phase difference, and generate a DLL clock signal by delaying the external clock signal for a time corresponding to the delay control signal, a delay configured to output an active signal as an output enable reset signal in response to the delay control signal and an output enable signal generator configured to be reset in response to the output enable reset signal and generate an output enable signal in response to a read signal and a CAS latency signal by counting the external clock signal and the DLL clock signal.

Abstract: A data relay apparatus according to one embodiment described herein can include a phase detection unit that can detect a phase difference between a clock output from a transmitter and a clock output from a receiver, and generate a plurality of phase detection signals, a data relay control unit that can distinguish a difference in clock timing between the clocks of the transmitter and the receiver in response to the plurality of phase detection signals, and output a relay data selection signal and a relay control clock, and a data relay unit that can transmit data output from the receiver to the transmitter in response to the relay data selection signal and the relay control clock.

Abstract: A semiconductor memory device includes: a strobe signal reception unit configured to receive a strobe signal and generate a tracking clock signal; a clock reception unit configured to receive a clock signal and generate an internal clock signal; a plurality of data reception units configured to receive parallel data in accordance with the internal clock signal and generate internal data; and a phase control unit configured to control the phase of the internal clock signal to track the tracking clock signal and to compensate for a variation in the phase of the internal clock signal while the data is received.

Abstract: An anode active material for a lithium secondary battery includes a silicon alloy that includes silicon and at least one kind of metal other than silicon, the silicon alloy allowing alloying with lithium. A volume of an inactive region in the silicon alloy, which is not reacted with lithium, is 50 to 75% of the entire volume of an active material. The anode active material has a large capacity in comparison to carbon-based anode active materials, and also ensures small volume expansion and high capacity retention ratio after charging/discharging, resulting in excellent cycle characteristics.

Abstract: A semiconductor integrated circuit can include a first voltage pad, a second voltage pad, and a voltage stabilizing unit that is connected between the first voltage pad and the second voltage pad. The first voltage pad can be connected to a first internal circuit, and the second voltage pad can be connected to a second internal circuit.