Abstract: The invention provides a displacement control valve for a variable displacement compressor comprising: a valve housing having a discharge chamber connecting space and a crank chamber connecting space; an electronic solenoid; and a valve body configured to reciprocate within the valve housing the electronic solenoid. The displacement control valve is opened and closed when the valve body moves from the discharge chamber connecting space toward the crank chamber connecting space, making it possible to enlarge a cross-sectional area of the valve body and improving productivity.

Abstract: A differential signal generation circuit includes: an inverter array configured to sequentially invert an input signal to generate a plurality of delayed signals; and a phase mixer configured to mix a phase of a first delayed signal and a phase of a second delayed signal among the plurality of delayed signals at a preset mixing ratio to generate a first differential signal. The first delayed signal has a first delay from the input signal and the second delayed signal has a second delay from the input signal. The differential signal generation circuit is configured to generate a third delayed signal having a third delay from the input signal corresponding to a medium of the first and second delays, and the third delayed signal is further delayed to generate a second differential signal.

Abstract: A voltage measuring apparatus for a semiconductor integrated circuit includes a first delay unit configured to delay a reference clock in a first region, a second delay unit configured to delay the reference clock in a second region and an analysis unit configured to analyze a difference in voltage level between the regions based on the phases of associated with the delayed clock signals generated by the first and second delay units.

Abstract: Provided are an extended multimedia file structure, a multimedia file producing method, and a multimedia file executing method. The extended multimedia file structure includes: a metadata section including a media initial object descriptor (IOD) field and at least one track pointer; and a media data section including at least one media block indicated by the track pointer, wherein the at least one track pointer indicates a detail media resource contained in an embedded multimedia file or an external multimedia file.

Abstract: Provided are a large-scale cluster monitoring system and a method for automatically building/restoring the same, which can automatically build a large-scale monitoring system and can automatically build a monitoring environment when a failure occurs in nodes. The large-scale cluster monitoring system includes a CM server, a BD server, GM nodes, NA nodes, and a DB agent. The CM server manages nodes in a large-scale cluster system. The DB server stores monitoring information that is state information of nodes in groups. The GM nodes respectively collect the monitoring information that is the state information of the nodes in the corresponding groups to store the collected monitoring information in the DB server. The NA nodes access the CM server to obtain GM node information and respectively collect the state information of the nodes in the corresponding groups to transfer the collected state information to the corresponding GM nodes.

Abstract: A method, system, and medium of providing various types of broadcast services such as a record, a summary, a navigation and a real-time event service with respect to a broadcast content, utilizing a home server, according to a user's request. A broadcast service providing method includes: storing broadcast summary data, navigation data and real-time event data which is generated by analyzing received broadcast data according to a broadcast record request from a user's portable device, in a database; and providing the user's portable device with a streaming service with respect to the stored broadcast summary data, the navigation data and the real-time event data, according to a summary selection request from the user's portable device.

Abstract: A semiconductor memory device includes a delay locked loop circuit that can control input/output timing of data according to a system clock of a high frequency. The semiconductor memory device includes a phase comparator configured to detect a phase difference between an internal clock and a reference clock to output a state signal having a pulse width corresponding to the detected phase difference, a phase adjuster configured to generate a digital code for determining a delay time corresponding to the state signal for locking a phase of the internal clock, a digital-to-analog converter configured to convert the digital code to an analog voltage, and a multiphase delay signal generator configured to delay the internal clock according to a bias voltage corresponding to the analog voltage to feed back the delayed internal clock as the internal clock and generate multiphase delay signals.

Abstract: A method of sharing data of a scalable video coding (SVC) file and the SVC file are provided. The SVC file includes: a scalable base track including at least one scalable layer entry each storing metadata of the at least one scalable layer; and at least one sub track generated based on the scalable base track, which includes identification information of the scalable layer that is a basis of generation of a sub track among the scalable layers and identification information of the scalable base track instead of the scalable layer entry. Accordingly, when an SVC coded content is stored as a file, it is possible to reduce a storage capacity by avoiding duplication of common data and to provide convenience when the stored content is reprocessed by allowing a relation of tracks correlated to one another to be represented.

Abstract: Provided is an apparatus and method for obtaining a high dynamic range (HDR) image. The apparatus includes an image sensor generating a first image by applying different exposure times for units of different predetermined regions, an image separating unit separating the first image into images, each of which is composed of regions having an identical exposure time, an image restoring unit restoring the separated images in such a way that each of the separated images has a resolution that is the same as a resolution of the first image, and an image synthesizing unit synthesizing the restored images into a second image.

Abstract: Disclosed is an electrode active material comprising: a core layer capable of repeating lithium intercalation/deintercalation; an amorphous carbon layer; and a crystalline carbon layer, successively, wherein the core layer comprises at least two core particles. A secondary battery comprising the same electrode active material is also disclosed. The electrode active material can inhibit variations in volume of the core layer that may occur during repeated charge/discharge cycles, since the core layer comprising at least two core particles, each core particle having an increased area that is in contact with the carbon layer coated thereon. Therefore, the battery using the electrode active material can provide improved cycle life characteristics.

Abstract: Provided is a system and method for transmitting/receiving an object-based audio. The system includes: a pre-processing unit for receiving an audio signal from diverse sources of outside and creating an object-based audio signal through a pre-processing procedure; an object-based audio editing unit for editing the object-based audio signal from the pre-processing unit and organizing an audio scene; an object-based audio coding unit for coding/multiplexing information on the object-based audio signal and the audio scene from the object-based audio editing unit and creating object-based audio contents; and a transmitting unit for transmitting the object-based audio contents from the object-based audio coding unit.

Abstract: An interface apparatus for a semiconductor integrated circuit and an interfacing method thereof controls the VOX of differential signals to a target level in response to the differential signals being outputted by an output block. The interface apparatus for a semiconductor integrated circuit includes an output block configured to output differential signals output by an internal circuit a detector configured to detect a timing error of the differential signals; and a controller configured to control a timing of the differential signals output by the internal circuit according to a detection result of the detector.

Abstract: A method for forming a fine pattern having a variable width by simultaneously using an optimal focused electron beam and a defocused electron beam in a light exposure process Includes, after forming a first film on a substrate, forming a first film pattern including a first level area and a second level area having different distances from the substrate by changing a profile of an upper surface of the first film. A photoresist film having a first area covering the first level area and a second area covering the second level area is formed. To simultaneously light-expose the first area and the second area with the same width, a light exposure condition, in which an optimal focused electron beam is eradiated on the first area and a defocused electron beam is eradiated on the second area, is applied.

Abstract: A delay locked loop (DLL) circuit includes a phase detection unit configured to generate a phase detection signal by comparing a phase of a reference clock signal with a phase of a feedback clock signal. An update control apparatus is configured to generate a valid interval signal and an update control signal by determining a difference between the number of first logical values and the number of second logical values of the phase detection signal in response to the reference clock signal. A shift register configured to update a delay value granted to a delay line in response to the update control signal when the valid interval signal is enabled.

Abstract: Conductivity improvements in III-V semiconductor devices are described. A first improvement includes a barrier layer that is not coextensively planar with a channel layer. A second improvement includes an anneal of a metal/Si, Ge or SiliconGermanium/III-V stack to form a metal-Silicon, metal-Germanium or metal-SiliconGermanium layer over a Si and/or Germanium doped III-V layer. Then, removing the metal layer and forming a source/drain electrode on the metal-Silicon, metal-Germanium or metal-SiliconGermanium layer. A third improvement includes forming a layer of a Group IV and/or Group VI element over a III-V channel layer, and, annealing to dope the III-V channel layer with Group IV and/or Group VI species. A fourth improvement includes a passivation and/or dipole layer formed over an access region of a III-V device.

Abstract: A signal receiver circuit includes a first level detector for offset-controlling a first output node in response to a pair of first reference signals. A second level detector offset-controls a second output node in response to a pair of second reference signals.

Abstract: A power noise detecting device includes a plurality of power lines, and a power noise detecting part configured to detect power noise by rectifying voltages of the plurality of power lines and converting the rectified voltages into effective voltages.

Abstract: A DLL circuit for a semiconductor memory apparatus includes a delay line having a coarse delay chain, which has a plurality of coarse delayers connected in series and is inputted with a reference clock signal, and a plurality of fine delayers which receive output clock signals of the respective coarse delayers, and a delay control section for comparing phases of an output clock signal of a final coarse delayer among the coarse delayers with the reference clock signal and generating coarse control signals for controlling the coarse delayers and for comparing phases of an output clock signal of a fine delayer inputted with the output clock signals of the final coarse delayer, as a fine feedback clock signal, with the reference clock signal and generating fine control signals for controlling the fine delayers.

Abstract: A phase detecting circuit includes a first node that outputs a pull-up control signal, a second node that outputs a pull-down control signal, an initializing unit that initializes voltage levels of the first and second nodes in response to a pre-charge signal, a data input unit to which receives a receiver data, a phase comparison unit that compares a phase of a receiver clock and a phase of the receiver data input to the data input unit to control the voltage levels of the first and second nodes, and a charging/discharging unit that charges or discharges electric charges that are applied to the first and second nodes.

Abstract: An image encoding method and an image decoding method, the image encoding method including: degrading a quality of a first image which is obtained through a sensor of an imaging device to generate a second image having a target resolution; generating additional information which represents a transform relationship between the first and second images; and transmitting the additional information and the second image.