Abstract: The present disclosure provides a display control method and a display control device. The display control method is used for a display panel. The display panel includes at least a first display area and a second display area arranged in a first direction, the first display area is coupled to a first signal line, and the second display area is coupled to a second signal line. The display control method includes: controlling a first sub-pixel in the first display area to display an image via the first signal line; and controlling a second sub-pixel in the second display area to display an image via the second signal line. A light-emission phase of the first sub-pixel at most partially overlaps a light-emission phase of the second sub-pixel.

Abstract: A display panel includes: a substrate, including a display area and a peripheral area surrounding the display area; an auxiliary electrode layer, located on a side of the substrate, where the auxiliary electrode layer includes an auxiliary electrode in the display area and a connection portion in the peripheral area; and a data line layer, including multiple data lines in the display area and a peripheral line portion in the peripheral area; where in the display area, the multiple data lines and the auxiliary electrode are provided in a same layer; and where in the peripheral area, the peripheral line portion and the connection portion are provided in a same layer.

Abstract: A shift register includes a first scan unit, a leakage prevention unit, and a leakage prevention input unit. The first scan unit includes a first input circuit configured to transmit an input signal to a first pull-up node. The leakage prevention input unit is configured to: transmit a first voltage signal to a leakage prevention input node; and transmit a second voltage signal to the leakage prevention input node. The first voltage signal and the second voltage signal are different. The leakage prevention unit is configured to transmit one of the first voltage signal and the second voltage signal from the leakage prevention input node to a first leakage prevention node.

Abstract: A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction. The display substrate further includes data lines extended in the first direction, and the data lines are connected in one-to-one correspondence with the sub-pixels in columns in each row of sub-pixels, so as to provide data signals respectively; the display substrate further includes auxiliary electrode lines extended in the first direction which are configured to be electrically connected with a second electrode of the light emitting element to provide a second power voltage; each of the auxiliary electrode lines is spaced from any one of the plurality of data lines by at least one column of sub-pixels.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction. The display substrate further includes data lines extended in the first direction, and the data lines are connected in one-to-one correspondence with the sub-pixels in columns in each row of sub-pixels, so as to provide data signals respectively; the display substrate further includes auxiliary electrode lines extended in the first direction which are configured to be electrically connected with a second electrode of the light emitting element to provide a second power voltage; each of the auxiliary electrode lines is spaced from any one of the plurality of data lines by at least one column of sub-pixels.

Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.

Abstract: A display substrate and a display device are provided. The display substrate includes: a plurality of pixel units arranged on a base substrate, each pixel unit includes a plurality of sub-pixels, and each sub-pixel includes a light emitting element and a pixel driving circuit; a semiconductor layer arranged on the base substrate; a first conductive layer arranged on a side of the semiconductor layer; and a second conductive layer arranged on another side of the semiconductor layer. The pixel driving circuit includes a driving transistor, a switching transistor and a sensing transistor; the switching transistor includes a first gate electrode and a first active layer; the display substrate further includes a channel defining portion for defining a channel region of the switching transistor, and an orthographic projection of the channel defining portion substrate at least partially overlaps an orthographic projection of the first active layer on the base substrate.

Abstract: This application relates to display panels, methods of driving the same, and display devices. The display panel includes: a first pixel circuit and a demultiplexing circuit. The first pixel circuit includes a first reset circuit, a first data writing circuit, and a first drive circuit. A first terminal of the first reset circuit is connected to a first terminal of the first drive circuit. A second terminal of the first reset circuit is connected to a first multiplexing signal line. A control terminal of the first drive circuit is connected to a first terminal of the first data writing circuit. A second terminal of the first data writing circuit is connected to the first multiplexing signal line. The demultiplexing circuit includes a first control circuit and a second control circuit. A first terminal of the first control circuit is connected to the first multiplexing signal line. A second terminal of the first control circuit is used for receiving a reset signal.

Abstract: A pixel structure includes: gate lines and data lines disposed crosswise and a plurality of pixel repetition modules distributed in an array. A pixel repetition module includes: a plurality of pixel units arranged in order, wherein each pixel unit includes three sub-pixels arranged in a triangular structure, and the three sub-pixels in each pixel unit and the three sub-pixels in an adjacent pixel unit are arranged inversely with respect to each other; each pixel unit corresponds to two groups of gate lines, wherein each group of gate lines includes two gate lines parallel to each other, a first group of gate lines are located on a first outer side and a second outer side of the pixel units respectively, and a second group of gate lines are both located between the sub-pixels located in a first row and the sub-pixels located in a second row in the pixel units.

Abstract: Provided are a display panel and a method for manufacturing the same, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a separator located at the peripheral area and including at least one separation portion, each separation portion including a first and a second separation layer, and the orthographic projection of the first separation layer on the base substrate is within that of the second separation layer; a cathode including: a first cathode portion, and a second cathode apart from the first cathode portion; and an encapsulation layer including a first and a second inorganic layer, and an organic layer located between the first and the second inorganic layer, wherein edges of the orthographic projections of the first inorganic layer, the organic layer, and the second inorganic layer on the base substrate overlap.

Abstract: The present disclosure provides a multiplexing circuitry, a multiplexing method, a multiplexing module, and a display device. The multiplexing circuitry includes N multiplexing unit circuitries, N energy storage unit circuitries and N control unit circuitries. An nth multiplexing unit circuitry is configured to enable an nth output data line to be electrically coupled to or electrically decoupled from an input data line under the control of a potential at an nth control end; an nth energy storage unit circuitry is configured to control a potential at the nth control end in accordance with an nth clock signal; and an nth control unit circuitry is configured to enable the nth control end to be electrically coupled to or electrically decoupled from an nth switch control line in accordance with a control voltage signal and an nth switch control signal.

Abstract: A display substrate includes a first base and a plurality of pixel units arranged in rows and in columns. A pixel unit includes a first light-emitting device, a second light-emitting device and a third light-emitting device. A first effective light-emitting area where the first light-emitting device is located and a second effective light-emitting area where the second light-emitting device is located are arranged at intervals along a first direction, a third effective light-emitting area where the third light-emitting device is located is spaced apart from both the first effective light-emitting area and the second effective light-emitting area arranged along a second direction.

Abstract: Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a plurality of display units. The display unit includes a display area and a transparent area. The display area includes a plurality of sub-pixels. In a direction perpendicular to the display substrate, the sub-pixel includes a first metal layer, a semiconductor layer, a second metal layer and a third metal layer which are arranged on a substrate. The first metal layer includes a first plate, the semiconductor layer includes a second plate, the second metal layer includes a first scanning line and a second scanning line, and the third metal layer includes a third plate, a first power supply line, a second power supply line, a compensation line and a data line.

Abstract: A method and apparatus for direct drying of inorganic sludge with a drum drawing process, comprising the following steps: 1) drum mixed drying of slag and sludge: respectively conveying the slag and sludge into a drum (1) in proportion, completing mixing, heat exchange, dehydration, cooling and crushing of the slag and sludge under the rolling action of the drum (1) and a steel ball to achieve cooling, crushing and drying of the slag and sludge, and directly discharging the obtained mixture; 2) slag and sludge separation: separating the steel slag and dry sludge in a manner of combining screening and rotary separation; 3) tail gas treatment: treating dusts, sulfides and organic compounds in tail gas generated by the dry sludge by using wet alkali washing and activated carbon adsorption, and discharging the treated tail gas; and 4) tailing sludge treatment: generating steam and dusts in the drum treatment of the slag and sludge, allowing dusts to enter a tail gas treatment device (4) with steam, aggregating th

Abstract: The present disclosure provides a shift register unit, a driving method, a gate driving circuit and a display device. The shift register unit includes a pull-down node control circuit; the pull-down node control circuit is electrically connected to an input terminal, a reset terminal, a first voltage terminal, a second voltage terminal and a pull-down node, respectively, and is configured to, under the control of an input signal provided by the input terminal and a reset signal provided by the reset terminal, control the pull-down node to be electrically conducted to the first voltage terminal or the second voltage terminal, and control to hold a potential of the pull-down node.

Abstract: A display substrate and a display device are provided. The display substrate includes a light emitting element disposed on a base substrate, and an encapsulation layer, a connection layer, a light extraction layer, a polarization conversion layer and a polarization layer stacked sequentially at a light exiting side of the light emitting element. The light extraction layer is configured to convert at least a portion of light emitted by the light emitting element incident onto the light extraction layer into circularly polarized light with a set rotational direction to pass through the light extraction layer. The polarization conversion layer is configured to convert the circularly polarized light passing through the light extraction layer into linearly polarized light, with a polarization direction parallel to a direction of a light transmission axis of the polarization layer; the connection layer is configured to bond the light extraction layer to the encapsulation layer.

Abstract: A display substrate comprises a pixel driving circuit and a bottom-emission light-emitting device that are disposed on a base and located in each sub-pixel in a display area. The light-emitting device includes a first electrode electrically connected to the pixel driving circuit. The pixel driving circuit includes a first storage capacitor and a second storage capacitor connected in parallel. The first storage capacitor includes a first storage electrode and a second storage electrode that are disposed oppositely, and the first electrode serves as the first storage electrode. The second storage capacitor includes the second storage electrode and a third storage electrode that are disposed oppositely. The second storage electrode is located between the first storage electrode and the third storage electrode. The first storage electrode is electrically connected to the third storage electrode. The first electrode, the second storage electrode, and the third storage electrode are all transparent electrodes.

Abstract: The present disclosure provides a display substrate, a method for manufacturing the same, a driving method and a display device. The display substrate includes a base substrate, gate lines, data lines and sub-pixels. The sub-pixels include sub-pixel columns corresponding to the data lines in a one-to-one manner. In a sub-pixel driving circuit of the sub-pixel, a driving transistor and a data writing transistor are located at a first side of an aperture area of the sub-pixel; a sensing transistor is located at a second side of the aperture area of the sub-pixel. The first side and the second side are opposite sides of the aperture area along the extension direction of the data lines. Gate electrodes of sensing transistors in a same sub-pixel row, and gate electrodes of data writing transistors in an adjacent next sub-pixel row, are all coupled to a gate line corresponding to the adjacent next sub-pixel row.

Abstract: An array substrate includes: a substrate, at least one gate driving circuit and at least one clock signal line that are located on a same side of the substrate. The gate driving circuit includes a plurality of cascaded shift registers located in different rows, the plurality of shift registers are divided into at least two groups of shift registers, each group of shift registers includes at least one shift register, located in a same column. A gate driving circuit in the at least one gate driving circuit corresponds to at least one clock signal line. The clock signal line includes a main body transmission section configured to transmit a clock signal, and at least two branch transmission sections connected to the main body transmission section. Each branch transmission section is connected to a clock signal input terminal of each shift register in a respective group of shift registers.

Abstract: A pixel driving circuit includes: a data writing sub-circuit configured to write a data signal received at a data signal terminal into a first node under control of a first scanning signal received at a first scanning signal terminal; a driving sub-circuit configured to drive a light-emitting device coupled to a second node to work under control of a voltage of the first node and a first power supply voltage signal received at a first power supply voltage signal terminal; and a time control sub-circuit configured to transmit a control signal received at a control signal terminal to the first node under control of a second scanning signal received at a second scanning signal terminal after the light-emitting to device works for a preset time, so that the driving sub-circuit is turned off to control the light-emitting device to stop working.