Abstract: A riding mower having left and right driving rear wheels independently drivable forward and backward and a pair of left and right steerable front wheels is provided with a support device capable of being mounted with a cylindrical gas cylinder in a horizontal position on an external side of a rollover projection frame. The support device is provided such that the mounted gas cylinder is positioned along front and rear of the rollover protection frame and is mounted in a tilted state in which the central axis of the cylindrical gas cylinder is closer to a central side in a lateral direction of a vehicle body toward a rear side from a plan view.

Abstract: A magnetoresistive random access memory includes first and second magnetoresistive effect element. A shape of the first magnetoresistive effect element has a first length in a first direction and a second length in a second direction. The second length is equal to or greater than the first length. A ratio of the second length to the first length is a first value. The second magnetoresistive effect element is used to determine a resistance state of the first magnetoresistive effect element. A shape of the second magnetoresistive effect element has a third length in a third direction and a fourth length in a fourth direction. The fourth length is equal to or greater than the third length. A ratio of the fourth length to the third length is a second value which is greater than the first value.

Abstract: The document management server includes an identification information providing unit that receives a request to obtain identification information required for accessing a document from a client, generates the identification information for the received request, and sends the generated identification information to the client; a relation information management unit that manages relation information of the requested document and the identification information generated for the request; and a history information management unit that manages information on the client who has sent the request, associating with the identification information.

Abstract: According to one embodiment, a semiconductor memory device includes memory cells and sense amplifiers. One end of the memory cell is connected to each of bit lines. The other end of the memory cell is connected to a source line. The sense amplifiers are connected to the bit lines. First writing changes the resistance of the memory cells connected to a first state by a current running from the source line to the bit lines. Second writing changes the resistance of the memory cells to a second state by a current running from the bit lines to the source line on the basis of data retained by the sense amplifiers after the first writing. Before the first writing, data is read from the memory cells, and the read data is retained in the sense amplifiers, and the data retained by the sense amplifiers is overwritten in accordance with write data.

Abstract: The apparatus includes a hydrostatic stepless speed change section 20 receiving an output of an engine 1, a planetary transmission section 3a having a plurality of planetary transmission mechanisms PF, PR and a plurality of output members 41, 42, the planetary transmission section being configured to combine a drive force outputted from the hydrostatic stepless speed change section 20 and an engine drive force that has not been subjected to any speed change action by the hydrostatic stepless speed change section 20, and a speed change output section 3b having an output shaft 70, the speed change output section being configured to output combined drives force outputted from the plurality of output members 41, 42 in a plurality of different speed ranges from the output shaft 70.

Abstract: A working vehicle has a cooling fan provided on a first side of an engine to blow air to the engine; a muffler main body provided on a second side thereof in a position lower than an upper surface of a head cover of the engine; and an exhaust pipe exposed in a position facing an air blowing path of the cooling fan higher than the upper surface of the head cover of the engine to discharge exhaust from the muffler main body.

Abstract: A semiconductor memory device comprises a plurality of cell arrays, each cell array including a plurality of mutually parallel word lines, a plurality of mutually parallel bit lines disposed to cross these word lines, and a plurality of cells connected to the intersections of these word lines and bit lines, respectively, one portion of the cell arrays forming a memory cell array that has the cells as memory cells, and another portion of the cell arrays forming a reference cell array that has the cells as reference cells. A cell selection circuit is operative to select from the memory cell array a memory cell whose data is to be read, and to select from the reference cell array a reference cell at a position corresponding to a position of the memory cell selected in the memory cell array. A sense amplifier circuit is operative to detect and compare a current or a voltage of the selected memory cell with a current or a voltage of the selected reference cell, and thereby read data of the memory cell.

Abstract: A semiconductor memory device includes a memory cell having a first resistance state and a second resistance state, a bit line connected to the memory cell, a reference cell fixed to the first resistance state, a reference bit line connected to the reference cell, and a generation circuit configured to generate a reading voltage and a reference voltage. The generation circuit includes a constant current source connected to a first node, a first replica cell connected between the first node and a second node and fixed to the first resistance state, a second replica cell connected between the second node and a third node and fixed to the second resistance state, a first resistance element connected between the first node and a fourth node, and a second resistance element connected between the fourth node and the third node.

Abstract: A resistive memory includes a plurality of memory cells, a plurality of reference cells having mutually different resistance values, at least one sense amplifier having a first input terminal connected to one selected memory cell which is selected from the plurality of memory cells at a time of read, and a second input terminal connected to one selected reference cell which is selected from the plurality of reference cells at the time of read, and one latch circuit which holds offset information of the at least one sense amplifier. The resistive memory further includes a decoder which selects, in accordance with the offset information, the one selected reference cell from the plurality of reference cells, and connects the one selected reference cell to the second input terminal of the at least one sense amplifier.

Abstract: According to one embodiment, a semiconductor memory device includes a first cell array includes memory cells and reference cells, a second cell array located adjacent to the first cell array in a first direction, a third cell array located adjacent to the first cell array in a second direction crossing the first direction, a fourth cell array located adjacent to the second cell array in the second direction, and a sense amplifier connected to the first to fourth cell array and configured to compare a current through a memory cell with a current through a reference cell to determine the data of the memory cell. A reference cell is selected from a cell array which is diagonally opposite to a cell array as a read target.

Abstract: There is provided an interface card system for SD bus control. The interface card system for SD bus control includes a CPU bus interface 11a and/or an SD bus interface 11b, a host interface module 16 connected to the interfaces which interprets an SD command and controls operation of the whole of the interface card system, first and second internal SD host engines 15a and 15b which function as a host controller, first and second selectors 14a and 14b respectively connected to the internal SD host engines which each select a path for data or a command, first and second SD bus interfaces 13a and 13b respectively connected to the selectors, and a data pass-through control section 17 connected to the SD bus interfaces connected to the selectors which allows an SD command and data to pass through.

Abstract: A semiconductor memory device includes a memory cell having a resistance which differs based on stored data, a bit line connected to the memory cell, a first MOSFET which clamps the bit line to a read voltage when reading data, a sense amplifier which detects the stored data in the memory cell based on a current flowing through the bit line, a first switch element which connects the sense amplifier to a drain of the first MOSFET, a second switch element which connects a source of the first MOSFET to the bit line, a third switch element which connects the drain of the first MOSFET to a ground terminal, and a fourth switch element which connects the source of the first MOSFET to a ground terminal.

Abstract: A semiconductor memory device includes a sense amplifier that compares intensities of currents flowing through a first node and a second node with each other, a first MOSFET having a drain terminal connected with the first node, a second MOSFET having a drain terminal connected with the second node, a memory cell connected with a source terminal of the first MOSFET, and a reference cell. The semiconductor memory device further includes a connection control circuit that connects a source terminal of the second MOSFET with the reference cell at the time of a regular operation and connects the source terminal of the second MOSFET with a reference voltage terminal at the time of a test operation.

Abstract: The refrigerator includes a vegetable compartment (107) thermally insulated by a rear partition (111), and a mist generation department (139) for atomizing a mist into the vegetable compartment (107), and the mist generation department (139) includes a atomizing electrode (135) for atomizing the mist into the vegetable compartment (107), a voltage applicator (133) for applying a voltage to the atomizing electrode (135), and a cooling pin (134) coupled to the atomizing electrode (135), in which the atomizing electrode (135) is cooled to a temperature lower than the dew point by a outlet air-duct for freezer compartment (141), and the moisture in the air is cooled to condense dew on the atomizing electrode (135), and is atomized as a mist into the vegetable compartment (107), and dew can be condensed from moisture onto the atomizing electrode (135) stably and in a simple configuration, and the freshness of the food is enhanced while the reliability of the refrigerator is enhanced.

Abstract: A riding type grass mower includes a right wheel and a left wheel, a rear-discharge type mower unit disposed forwardly of the right/left wheels, a driver's seat disposed between and upwardly of the right/left wheels, an engine mounted rearwardly of the driver's seat, an engine hood for covering the engine, and a restricting unit disposed rearwardly of the driver's seat and at an area downwardly of the engine hood, the restricting unit having a restricting face (including a mesh face) configured to restrict upward rising of cut grass discharged from the mower unit.

Abstract: A resistance-change memory includes first and second bit lines running in the same direction, a third bit line running parallel to the first and second bit lines, fourth and fifth bit lines running in the same direction, a sixth bit line running parallel to the fourth and fifth bit lines, a first memory element which has one and the other terminals connected to the first and third bit lines, and changes to one of first and second resistance states, a first reference element having one and the other terminals connected to the fourth and sixth bit lines, and set in the first resistance state, a second reference element having one and the other terminals connected to the fifth and sixth bit lines, and set in the second resistance state, and a sense amplifier having first and second input terminals connected to the first and fourth bit lines.

Abstract: A word line voltage is applied to a plurality of word lines. A read/write voltage is applied to a plurality of bit lines. The read/write voltage is applied to a plurality of source lines. A word line selector selects the word line and applies the word line voltage. A driver applies a predetermined voltage to the bit line and the source line, thereby supplying a current to the memory cell. A read circuit reads a first current having flowed through the memory cell, and determines data stored in the memory cell. When performing the read, the driver supplies a second current to second bit lines among other bit lines, which are adjacent to the first bit line through which the first current has flowed. The second current generates a magnetic field in a direction to suppress a write error in the memory cell from which data is to be read.

Abstract: A loader work machine is disclosed in which a base portion of each of right/left arms (77) is received by an arm support portion (164) of a first lift link (81) and pivotally supported by a first arm shaft (88), and a hydraulic pipe arrangement (167) connected to a hydraulic actuator (98) extend through an support frame (11) from inside to outside of its inner wall (12), and toward an arm (77). The base portion of the arm (77) is supported to the arm support portion (164) at a position adjacent a link outer wall (157) in a transverse direction so that a hose accommodation space (165) is formed between a link inner wall (156) and an internal side face of the base portion of the arm (77). The hydraulic pipe arrangement (167) runs frontward of the first arm shaft (88) and a first link shaft (85), and is disposed in the hose accommodation space (165).

Abstract: A semiconductor memory device includes n resistance change elements which are arranged in one cell, have a low-resistance state and a high resistance state, are connected in series or parallel, have different resistance values in the same resistance state, and change between the low-resistance state and the high-resistance state under different conditions, and a write circuit which is connected to one end of the n resistance change elements, and applies a pulse current m (1?m?n) times to the n resistance change elements during a write operation. Letting Im be a current value of an mth pulse current, condition I1>I2> . . . >Im holds.

Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive element includes a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is variable and a nonmagnetic layer disposed between the fixed layer and the recording layer. A direction of a read current is set to a first direction in a case where an expression of MR ratio ?|Ic+/Ic?|?1 is satisfied if a critical current of the first direction used to write the magnetoresistive element to the parallel state is set to Ic? and a critical current of a second direction used to write the magnetoresistive element to the anti-parallel state is set to Ic+.