Patents by Inventor Young-Woo Park

Young-Woo Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190338029
    Abstract: The present disclosure is broadly concerned with the field of cancer immunotherapy. For example, the present disclosure generally related to a binding molecule comprising antibody variable light (VL) regions, variable heavy (VH) regions, constant heavy 1 (CH1) regions, and light chain constant (CL) regions that are configured to form two antigen binding Fab regions and an antigen binding Fv region so that the binding molecule binds to two different antigens.
    Type: Application
    Filed: April 1, 2019
    Publication date: November 7, 2019
    Applicant: Y-BIOLOGICS, INC.
    Inventors: Seil JANG, Bum-Chan PARK, Young Woo PARK
  • Publication number: 20190322750
    Abstract: Disclosed are an antibody to human programmed cell death-ligand 1 (PD-L1) or an antigen-binding fragment thereof, a nucleic acid encoding the same, a vector including the nucleic acid, a cell transformed with the vector, a method for producing the antibody or an antigen-binding fragment thereof, and a composition for preventing or treating cancer or infectious diseases containing the same.
    Type: Application
    Filed: August 7, 2017
    Publication date: October 24, 2019
    Applicant: Y-BIOLOGICS INC.
    Inventors: Jae Eun Park, Soo A Choi, Jisu Lee, Hyun Mi Lee, Si Hyung Lee, Gi Sun Baek, Yeung Chul Kim, Bum-chan Park, Jung Chae Lim, Young-Gyu Cho, Young Woo Park
  • Patent number: 10448662
    Abstract: The present invention relates to compositions and methods for treating fatty liver, steatohepatitis, or liver cirrhosis as well as insulin resistance and aging by administration of a DLK1-Fc fusion protein constructed by conjugation of an extracellular domain of DLK1 or a fragment thereof with a human antibody Fc region. Also provided are health functional foods containing a DLK1-Fc fusion protein constructed by conjugation of an extracellular domain of DLK1 (delta-like 1 homolog) or a fragment thereof with a human antibody Fc region as an active ingredient.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: October 22, 2019
    Assignees: Y-Biologics Inc., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Young Woo Park, Bum-chan Park, Bong-soo Cha, Yong Ho Lee, Jung Chae Lim, Young-gyu Cho, Joong Kyu Kim, Jae Eun Park, Seok Ho Yoo
  • Patent number: 10453908
    Abstract: Disclosed herein is an organic light emitting diode display, including a substrate, a first thin film transistor including a first active pattern on the substrate and a first gate electrode on the first active pattern, a data wire on the first gate electrode, a first interlayer insulating layer between the first gate electrode and the data wire, a second interlayer insulating layer positioned the first interlayer insulating layer and the data wire, and an organic light emitting diode positioned on the data wire and connected to the first active pattern.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: October 22, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Young Woo Park, Wang Woo Lee
  • Patent number: 10453859
    Abstract: A vertical memory device includes insulating interlayer patterns, of gate electrodes, a channel, and a charge storage pattern structure. The insulating interlayer patterns are spaced in a first direction. The gate electrodes between are neighboring insulating interlayer patterns, respectively. The channel extends through the insulating interlayer patterns and the gate electrodes in the first direction. The charge storage pattern structure includes a tunnel insulation pattern, a charge trapping pattern structure, and a blocking pattern sequentially stacked between the channel and each of the gate electrodes in a second direction. The charge trapping pattern structure includes charge trapping patterns spaced in the first direction. The charge trapping patterns are adjacent to sidewalls of first gate electrodes, respectively. A first charge trapping pattern extends in the first direction along a sidewall of a first insulating interlayer pattern.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: October 22, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kohji Kanamori, Shin-Hwan Kang, Young-Woo Park, Jung-Hoon Park
  • Publication number: 20190309094
    Abstract: The present disclosure is broadly concerned with the field of cancer immunotherapy. For example, the present disclosure generally related to a binding molecule comprising antibody variable light (VL) regions, variable heavy (VH) regions, constant heavy 1 (CH1) regions, and light chain constant (CL) regions that are configured to form two antigen binding Fab regions and an antigen binding Fv region so that the binding molecule binds to two different antigens.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 10, 2019
    Applicant: Y-BIOLOGICS, INC.
    Inventors: Seil JANG, Bum-Chan PARK, Young Woo PARK
  • Publication number: 20190309093
    Abstract: The present disclosure is broadly concerned with the field of cancer immunotherapy. For example, the present disclosure generally related to a binding molecule comprising antibody variable light (VL) regions, variable heavy (VH) regions, constant heavy 1 (CH1) regions, and light chain constant (CL) regions that are configured to form two antigen binding Fab regions and an antigen binding Fv region so that the binding molecule binds to two different antigens.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 10, 2019
    Applicant: Y-BIOLOGICS, INC.
    Inventors: Seil JANG, Bum-Chan PARK, Young Woo PARK
  • Publication number: 20190280241
    Abstract: A display device including a first substrate including a display area that displays an image and a peripheral area, in which no image is displayed, surrounding the display area. The display device further includes a plurality of pixels disposed in the display area. The display device additionally includes a first metal layer disposed above the first substrate in the peripheral area, and the first metal layer including a plurality of openings. The display device further includes a sealant disposed above the first metal layer, and surrounding the plurality of pixels. The display device additionally includes a plurality of second metal layers disposed above the first substrate and below the first metal layer in the peripheral area, and respectively overlapping the openings of the first metal layer. A part of the sealant is disposed in the plurality of openings.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 12, 2019
    Inventors: Moo Soon Ko, Young Woo Park, Il Jeong Lee, Sang-Mok Hong
  • Publication number: 20190252401
    Abstract: A semiconductor device includes a peripheral circuit region on a substrate, a polysilicon layer on the peripheral circuit region, a memory cell array region on the polysilicon layer and overlapping the peripheral circuit region, the peripheral circuit region being under the memory cell array region, an upper interconnection layer on the memory cell array region, and a vertical contact through the memory cell array region and the polysilicon layer, the vertical contact connecting the upper interconnection layer to the peripheral circuit region.
    Type: Application
    Filed: April 26, 2019
    Publication date: August 15, 2019
    Inventors: Yoo-cheol Shin, Young-woo Park, Jae-duk Lee
  • Publication number: 20190248900
    Abstract: Disclosed are an antibody to human programmed cell death 1 (PD-1) or an antigen-binding fragment thereof, a nucleic acid encoding the same, a vector including the nucleic acid, an isolated cell transformed with the vector, a method for producing the antibody or an antigen-binding fragment thereof, and a composition for preventing or treating cancer containing the same. The novel antibody binding to PD-1 or an antigen-binding fragment thereof can bind to PD-1 and inhibit the activity of PD-1, thus being useful for the development of immunotherapeutic agents for various diseases associated with PD-1.
    Type: Application
    Filed: August 7, 2017
    Publication date: August 15, 2019
    Inventors: Jae Eun Park, Soo Young Kim, Hyun Mi Lee, Si Hyung Lee, Hyun Kyung Lee, Hye-Nan Kim, Jin Chul Youn, Bum-chan Park, Jung Chae Lim, Young-Gyu Cho, Young Woo Park
  • Patent number: 10381370
    Abstract: A semiconductor device includes a peripheral circuit region on a substrate, a polysilicon layer on the peripheral circuit region, a memory cell array region on the polysilicon layer and overlapping the peripheral circuit region, the peripheral circuit region being under the memory cell array region, an upper interconnection layer on the memory cell array region, and a vertical contact through the memory cell array region and the polysilicon layer, the vertical contact connecting the upper interconnection layer to the peripheral circuit region.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: August 13, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoo-cheol Shin, Young-woo Park, Jae-duk Lee
  • Publication number: 20190229160
    Abstract: A display device includes a substrate including a display area and a non-display area. First, second, and third insulating layers are sequentially disposed on the substrate. Pixels are disposed in the display area. Each of the pixels including a transistor and a light emitting element connected to the transistor. A data line is disposed in the display area. The data line is configured to supply a data signal to each of the plurality of pixels. A wiring portion is disposed in the non-display area. The wiring portion includes a connecting line connected to the data line and a fan-out line connected to the connecting line. A dummy pattern is disposed in the non-display area. The dummy pattern at least partially overlaps the wiring portion.
    Type: Application
    Filed: October 1, 2018
    Publication date: July 25, 2019
    Inventors: JI SEON LEE, MOO SOON KO, YOUNG WOO PARK, SE WAN SON, JIN SUNG AN, MIN WOO WOO, JU WON YOON, WANG WOO LEE, JEONG SOO LEE, DEUK MYUNG JI
  • Patent number: 10263009
    Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a ground selection gate electrode, and a channel structure. The channel structure may extend the ground selection gate electrode in a first direction perpendicular to a top surface of the substrate, and include a channel layer, a channel contact layer, and a stepped portion. The channel contact layer may contact the substrate and include a first width in a second direction perpendicular to the first direction. The channel layer may contact the channel contact layer, include a bottom surface between a bottom surface of the ground selection gate electrode and the top surface of the substrate in the first direction, and include a second width in the second direction different from the first width.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: April 16, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-hyun Lee, Jin-taek Park, Young-woo Park
  • Patent number: 10263213
    Abstract: A display device including a first substrate including a display area that displays an image and a peripheral area, in which no image is displayed, surrounding the display area. The display device further includes a plurality of pixels disposed in the display area. The display device additionally includes a first metal layer disposed above the first substrate in the peripheral area, and the first metal layer including a plurality of openings. The display device further includes a sealant disposed above the first metal layer, and surrounding the plurality of pixels. The display device additionally includes a plurality of second metal layers disposed above the first substrate and below the first metal layer in the peripheral area, and respectively overlapping the openings of the first metal layer. A part of the sealant is disposed in the plurality of openings.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: April 16, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Moo Soon Ko, Young Woo Park, Il Jeong Lee, Sang-Mok Hong
  • Patent number: 10224303
    Abstract: An anisotropic conductive film composition, an anisotropic conductive film prepared using the same, and a connection structure using the same, the anisotropic conductive film including a binder resin; a curable alicyclic epoxy compound; a curable oxetane compound; a quaternary ammonium catalyst; and conductive particles, wherein the anisotropic conductive film has a heat quantity variation rate of about 15% or less, as measured by differential scanning calorimetry (DSC) and calculated by Equation 1: Heat quantity variation rate (%)=[(H0?H1)/H0]×100??Equation 1 wherein H0 is a DSC heat quantity of the anisotropic conductive film, as measured at 25° C. and a time point of 0 hr, and H1 is a DSC heat quantity of the anisotropic conductive film, as measured after being left at 40° C. for 24 hours.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: March 5, 2019
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Youn Jo Ko, Soon Young Kwon, Ji Yeon Kim, Ha Na Kim, Young Woo Park, Hyun Joo Seo, Gun Young Heo, Ja Young Hwang
  • Publication number: 20190040347
    Abstract: A microalgae culture broth producing system includes a device for culture broth sterilization using a micro bubble generator, an air compression and pressure equalization device for the injection of carbon dioxide and oxygen in the atmosphere into the culture broth. The system also includes an air chilling device to maintain suitable culture broth temperature when water temperature is too high, an automatic carbon dioxide supply device to promote photosynthesis, and a sealed vertical photobioreactor to block out pollutants and increase dissolved carbon dioxide and oxygen concentration. The system further includes a high-efficiency harvesting device using hollow fiber membranes, and a hot air drying device using the waste heat generated by air compression.
    Type: Application
    Filed: July 27, 2018
    Publication date: February 7, 2019
    Inventors: Youngnam KIM, Young Woo PARK
  • Patent number: 10199389
    Abstract: A non-volatile memory device is provided. The non-volatile memory device includes a channel structure that is located on a substrate and extends perpendicularly to the substrate, a conductive pattern that extends perpendicularly to the substrate and is spaced apart from the channel structure, an electrode structure that is located between the channel structure and the conductive pattern, and comprises a plurality of gate patterns and a plurality of insulation patterns that are alternately laminated. An insulating layer that contacts with a top surface of the conductive pattern is formed along side surfaces of the electrode structure. The top surface of the conductive pattern is formed to be lower than the top surface of the channel structure.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: February 5, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Won Kim, Chang-Seok Kang, Young-Woo Park, Jae-Goo Lee, Jae-Duk Lee
  • Patent number: 10192883
    Abstract: A memory device may include a peripheral region and a cell region. The peripheral region may include a first substrate, a plurality of circuit elements disposed on the first substrate, a first insulating layer disposed on the plurality of circuit elements, and a first protective layer disposed in the first insulating layer. The cell region may include a second substrate disposed on the first insulating layer, wherein the ceil region includes a first impurity region, a channel region extending in a direction substantially perpendicular to an upper surface of the second substrate, a plurality of gate electrode layers stacked on the second substrate and adjacent to the channel region, and a first contact electrically connected to the first impurity region, wherein the first protective layer is disposed below the first impurity region, and has a shape corresponding to a shape of the first impurity region.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: January 29, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Hwan Son, Young Woo Park, Jae Duk Lee
  • Publication number: 20190013330
    Abstract: A vertical memory device includes insulating interlayer patterns, of gate electrodes, a channel, and a charge storage pattern structure. The insulating interlayer patterns are spaced in a first direction. The gate electrodes between are neighboring insulating interlayer patterns, respectively. The channel extends through the insulating interlayer patterns and the gate electrodes in the first direction. The charge storage pattern structure includes a tunnel insulation pattern, a charge trapping pattern structure, and a blocking pattern sequentially stacked between the channel and each of the gate electrodes in a second direction. The charge trapping pattern structure includes charge trapping patterns spaced in the first direction. The charge trapping patterns are adjacent to sidewalls of first gate electrodes, respectively. A first charge trapping pattern extends in the first direction along a sidewall of a first insulating interlayer pattern.
    Type: Application
    Filed: August 30, 2018
    Publication date: January 10, 2019
    Inventors: Kohji KANAMORI, Shin-Hwan KANG, Young-Woo PARK, Jung-Hoon PARK
  • Patent number: 10153292
    Abstract: A memory device includes a plurality of channel regions that each extend in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate adjacent the channel regions, each of the gate electrodes extending different lengths, and a plurality of dummy channel regions adjacent first ends of the plurality of gate electrode layers, wherein the substrate includes a substrate insulating layer formed below the plurality of dummy channel regions.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: December 11, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Won Kim, Seung Hyun Lim, Chang Seok Kang, Young Woo Park, Dae Hoon Bae, Dong Seog Eun, Woo Sung Lee, Jae Duk Lee, Jae Woo Lim, Hanmei Choi