Patents by Inventor Yu Min Lin
Yu Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130168851Abstract: A bump structure includes a substrate, a pad, an electrode and a protruding electrode. The pad is disposed on the substrate. The electrode is formed by a first metal material and disposed on the pad. The protruding electrode is formed by a second metal material and disposed on the electrode, wherein a cross-sectional area of the protruding electrode is less than a cross-sectional area of the electrode.Type: ApplicationFiled: May 31, 2012Publication date: July 4, 2013Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Min Lin, Chau-Jie Zhan, Tao-Chih Chang
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Patent number: 8415795Abstract: A semiconductor device and an assembling method thereof are provided. The semiconductor device includes a chip, a carrier, a plurality of first conductive elements and a plurality of second conductive elements. The chip has a plurality of first pads. The carrier has a plurality of second pads. The second pads correspond to the first pads. Each first conductive element is disposed between one of the first pads and one of the second pads. Each second conductive element is disposed between one of the first pads and one of the second pads. A volume ratio of intermetallic compound of the second conductive elements is greater than a volume ratio of intermetallic compound of the first conductive elements.Type: GrantFiled: April 18, 2011Date of Patent: April 9, 2013Assignee: Industrial Technology Research InstituteInventors: Yu-Min Lin, Chau-Jie Zhan, Su-Tsai Lu
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Patent number: 8390995Abstract: An adjusting device includes a rotating mechanism disposed between a base and a supporter for adjusting an angle between the supporter and the base, a slide mechanism disposed on the base, and a turntable mechanism slidably disposed on the slide mechanism for holding a panel module, so that the panel module can slide relative to the base along the slide mechanism and for coaxially rotating the panel module relative to the base. A contacting component of the turntable mechanism is for pushing a constraining component of the slide mechanism to pivot relative to an axle, so as to separate the constraining component from a protruding portion of the rotating mechanism for releasing constraint on the supporter relative to the base.Type: GrantFiled: July 17, 2011Date of Patent: March 5, 2013Assignee: Wistron CorporationInventors: Kuo-Hsing Wang, Sung-Yu Hsieh, Yu-Min Lin
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Patent number: 8384215Abstract: A wafer level molding structure including a first chip, a second chip and an adhesive layer therebetween is provided. The first chip includes a first back side, a first front side and a plurality of lateral sides, and a plurality of first front side bumps are disposed on the first front side. The second chip includes a second back side and a second front side, and a plurality of second back side bumps and second front side bumps are respectively disposed on the second back side and the second front side. A plurality of through electrodes are disposed in the second chip, and electrically connected the second back side bumps to the second front side bumps. Adhesive materials including a plurality of conductive particles cover the lateral sides, and electrically connect the second back side bumps with the first front side bumps.Type: GrantFiled: December 30, 2010Date of Patent: February 26, 2013Assignee: Industrial Technology Research InstituteInventors: Su-Tsai Lu, Jing-Ye Juang, Yu-Min Lin
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Publication number: 20130020657Abstract: A method for manufacturing a MOS transistor is provided. A substrate has a high-k dielectric layer and a barrier in each of a first opening and a second opening formed by removing a dummy gate and located in a first transistor region and a second transistor region. A dielectric barrier layer is formed on the substrate and filled into the first opening and the second opening to cover the barrier layers. A portion of the dielectric barrier in the first transistor region is removed. A first work function metal layer is formed. The first work function metal layer and a portion of the dielectric barrier layer in the second transistor region are removed. A second work function metal layer is formed. The method can avoid a loss of the high-k dielectric layer to maintain the reliability of a gate structure, thereby improving the performance of the MOS transistor.Type: ApplicationFiled: July 22, 2011Publication date: January 24, 2013Applicant: UNITED MICROELECTRONICS CORP.Inventors: Tsuo-Wen LU, Tzung-Ying Lee, Jei-Ming Chen, Chun-Wei Hsu, Yu-Min Lin, Chia-Lung Chang, Chin-Cheng Chien, Shu-Yen Chan
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Patent number: 8345194Abstract: The present invention discloses a liquid crystal lens and a manufacturing method thereof. At least one first electrode is disposed on a first substrate, a first alignment layer is disposed on the first electrode, a liquid crystal layer is disposed on the first alignment layer, a second alignment layer is disposed on the liquid crystal layer, an electric field uniformization layer is disposed on the second alignment layer, at least one second electrode and at least one third electrode are disposed on the electric field uniformization layer, and the second electrode is arranged around the third electrode. A second substrate is disposed on the second electrode and the third electrode. The third electrode which matches up with the second electrode produces an electric field gradient and the liquid crystal layer is affected uniformly by the electric field uniformization layer so as to achieve rapid focus purpose by the liquid crystal.Type: GrantFiled: September 23, 2010Date of Patent: January 1, 2013Assignee: National Chiao Tung UniversityInventors: Lin-Yao Liao, Yi-Pai Huang, Yu-Min Lin, Han-Ping D. Shieh
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Publication number: 20120326238Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region thereon; forming a high-k dielectric layer, a barrier layer, and a first metal layer on the substrate; removing the first metal layer of the second region; forming a polysilicon layer to cover the first metal layer of the first region and the barrier layer of the second region; patterning the polysilicon layer, the first metal layer, the barrier layer, and the high-k dielectric layer to form a first gate structure and a second gate structure in the first region and the second region; and forming a source/drain in the substrate adjacent to two sides of the first gate structure and the second gate structure.Type: ApplicationFiled: June 24, 2011Publication date: December 27, 2012Inventors: Chin-Cheng Chien, Tzung-Ying Lee, Tsuo-Wen Lu, Shu-Yen Chan, Jei-Ming Chen, Yu-Min Lin, Chun-Wei Hsu
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Publication number: 20120329261Abstract: A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.Type: ApplicationFiled: June 21, 2011Publication date: December 27, 2012Inventors: Shao-Wei Wang, Yu-Ren Wang, Chien-Liang Lin, Wen-Yi Teng, Tsuo-Wen Lu, Chih-Chung Chen, Ying-Wei Yen, Yu-Min Lin, Chin-Cheng Chien, Jei-Ming Chen, Chun-Wei Hsu, Chia-Lung Chang, Yi-Ching Wu, Shu-Yen Chan
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Publication number: 20120321108Abstract: An electrode connection structure of a speaker unit is provided. The speaker unit includes at least one electrode layer, which is made of a conductive material, or made of a non-conductive material with a conductive layer formed on a surface thereof. The electrode connection structure includes a conductive electrode and an adhesive material. The conductive electrode is used for providing power supply signals for the speaker unit to generate sounds. The adhesive material adheres the conductive electrode in parallel with a surface of the electrode layer. The adhesive material has adhesive characteristics, so as to electrically connect the conductive electrode and the electrode layer, in which the adhesive material is adhered to a side of the surface of the electrode layer closely adjacent to the conductive electrode with a certain area.Type: ApplicationFiled: August 23, 2012Publication date: December 20, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Min Lin, Chang-Ho Liou, Yu-Wei Huang, Ming-Daw Chen, Rong-Shen Lee
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Publication number: 20120303967Abstract: A digital content management system operative in a distributed network includes a SDP server and a client. The SDP server includes a content issuer and a right issuer. The content issuer is configured to randomly generate a first key, convert the first key to a second key by a conversion function, and encrypt a portion of a digital content item with the second key to form an encrypted portion, wherein the encrypted portion has its corresponding character code. The right issuer is configured to generate a right object, which includes the first key, and encrypt the right object.Type: ApplicationFiled: May 25, 2011Publication date: November 29, 2012Applicant: DELTA ELECTRONICS, INC.Inventors: Yen-Tsung Chia, Yu-Min Lin, Chih-Chung Hsu
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Publication number: 20120270392Abstract: A fabricating method of an active device array substrate is provided. The active device array substrate has at least one patterned conductive layer. The patterned conductive layer includes a copper layer. A cross-section of the copper layer which is parallel to a normal line direction of the copper layer includes a first trapezoid and a second trapezoid stacked on the first trapezoid. A base angle of the first trapezoid and a base angle of the second trapezoid are acute angles, and a difference between the base angle of the first trapezoid and the base angle of the second trapezoid is from about 5° to about 30°.Type: ApplicationFiled: June 29, 2012Publication date: October 25, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Po-Lin Chen, Chih-Yuan Lin, Yu-Min Lin, Chun-Nan Lin
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Publication number: 20120257351Abstract: An adjusting device includes a rotating mechanism disposed between a base and a supporter for adjusting an angle between the supporter and the base, a slide mechanism disposed on the base, and a turntable mechanism slidably disposed on the slide mechanism for holding a panel module, so that the panel module can slide relative to the base along the slide mechanism and for coaxially rotating the panel module relative to the base. A contacting component of the turntable mechanism is for pushing a constraining component of the slide mechanism to pivot relative to an axle, so as to separate the constraining component from a protruding portion of the rotating mechanism for releasing constraint on the supporter relative to the base.Type: ApplicationFiled: July 17, 2011Publication date: October 11, 2012Inventors: Kuo-Hsing Wang, Sung-Yu Hsieh, Yu-Min Lin
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Patent number: 8280081Abstract: An electrode connection structure of a speaker unit is provided. The speaker unit includes at least one electrode layer, which is made of a conductive material, or made of a non-conductive material with a conductive layer formed on a surface thereof. The electrode connection structure includes a conductive electrode and an adhesive material. The conductive electrode is used for providing power supply signals for the speaker unit to generate sounds. The adhesive material adheres the conductive electrode in parallel with a surface of the electrode layer. The adhesive material has adhesive characteristics, so as to electrically connect the conductive electrode and the electrode layer, in which the adhesive material is adhered to a side of the surface of the electrode layer closely adjacent to the conductive electrode with a certain area.Type: GrantFiled: December 25, 2008Date of Patent: October 2, 2012Assignee: Industrial Technology Research InstituteInventors: Yu-Min Lin, Chang-Ho Liou, Yu-Wei Huang, Ming-Daw Chen, Rong-Shen Lee
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Patent number: 8270178Abstract: An active device array substrate has at least one patterned conductive layer. The patterned conductive layer includes a copper layer. A cross-section of the copper layer which is parallel to a normal line direction of the copper layer includes a first trapezoid and a second trapezoid stacked on the first trapezoid. A base angle of the first trapezoid and a base angle of the second trapezoid are acute angles, and a difference between the base angle of the first trapezoid and the base angle of the second trapezoid is from about 5° to about 30°.Type: GrantFiled: June 24, 2010Date of Patent: September 18, 2012Assignee: Au Optronics CorporationInventors: Po-Lin Chen, Chih-Yuan Lin, Yu-Min Lin, Chun-Nan Lin
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Patent number: 8270833Abstract: A passive optical network (PON) system supporting wireless communication includes an optical line terminal (OLT) configured on a central office, an optical distribution network (ODN), and a plurality of optical network units (ONUs) respectively configured on user ends. The ODN is connected to the OLT and the ONUs in a one-to-many manner. The OLT sends a downstream optical signal to the ODN, and receives an upstream optical signal. The ODN circularly guides the optical signal to each ONU. Each ONU receives and reflects the downstream optical signal, processes the received downstream optical signal, receives and processes the upstream optical signal, carries an electrical signal to be uploaded into the upstream optical signal, and carries data received by a remote antenna into the upstream optical signal. Through the above architecture, the PON system supports wireless communication.Type: GrantFiled: July 16, 2009Date of Patent: September 18, 2012Assignee: Industrial Technology Research InstituteInventors: Yu-Min Lin, Po-Lung Tien, Maria C. Yuang
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Publication number: 20120228618Abstract: A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.Type: ApplicationFiled: April 18, 2012Publication date: September 13, 2012Applicant: AU OPTRONICS CORP.Inventors: Yu-Min Lin, Feng-Yuan Gan
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Patent number: 8243966Abstract: An assembly structure of flat speaker including at least two speaker units and one connecting structure is provided. Each speaker unit includes a first electrode, a vibrating film, and a second electrode. The connecting structure includes two conductive layers, and a first insulating layer. A first conductive layer is connected the first electrode through a contact area, and each has a first length and a third length parallel to the contact area. A second conductive layer is connected the second electrode through a contact area, and each has a second length and a fourth, a fifth length parallel to the contact area. The third length is less than or equal to a sum of the first lengths of the speaker units. A sum of the third, the fourth, and the fifth length is less than or equal to a sum of the first and second lengths.Type: GrantFiled: August 4, 2009Date of Patent: August 14, 2012Assignee: Industrial Technology Research InstituteInventors: Yu-Min Lin, Chang-Ho Liou, Yu-Wei Huang, Ming-Daw Chen, Rong-Shen Lee
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Patent number: 8244132Abstract: A pre-compensation method for delays caused by optical fiber chromatic dispersion, a multi-sub-carrier signal generator applying the method, and a transmitter applying the signal generator are applicable to an optical orthogonal frequency-division multiplexing (OFDM) system. The pre-compensation method includes receiving a plurality of pre-compensation values, in which the pre-compensation values correspond to sub-carriers; and transmitting the sub-carriers after delaying the sub-carriers by time of the corresponding pre-compensation values. The delay time between the sub-carriers is estimated at a receiver end and a pre-compensation value of the transmitter is set according to the delay time. The transmitter delays the pre-compensation values respectively when transmitting the respective sub-carriers. Therefore, the respective sub-carriers are able to reach a receiver at nearly the same time, thereby achieving a purpose of pre-compensating for the delays caused by optical fiber chromatic dispersion.Type: GrantFiled: July 13, 2009Date of Patent: August 14, 2012Assignee: Industrial Technology Research InstituteInventor: Yu-Min Lin
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Patent number: 8238501Abstract: A burst-mode clock and data recovery circuit using phase selecting technology is provided. In the data recovery circuit, a phase-locked loop (PLL) circuit is used for providing a plurality of fixed clock signals, each of which has a clock phase. An oversampling phase selecting circuit is coupled to the phase-locked loop circuit and used for detecting a data edge of a received data signal by using the clock signals and selects a clock phase to be locked according to the location of the data edge. A delay-locked loop (DLL) circuit is coupled to the phase-locked loop circuit and the oversampling phase selecting circuit, and used for comparing the data phase of the data signal with the clock phase of the selected clock signal, so as to delay the data phase of the data signal by a delay time until the data phase is locked as the clock phase.Type: GrantFiled: November 6, 2008Date of Patent: August 7, 2012Assignee: Industrial Technology Research InstituteInventors: Ching Yuan Yang, Jung-Mao Lin, Yu-Min Lin
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Patent number: 8233795Abstract: Disclosed is an apparatus and method for medium access control (MAC) in an optical packet-switched network. The MAC apparatus may comprise a bandwidth allocation module and an MAC processor. The bandwidth allocation module determines a data transmission limit based on a probabilistic quota plus credit mechanism for each node of the network, dynamically informs all downstream nodes of unused quota and allows the downstream nodes to use remaining bandwidths of the upstream node. Through a control message carried by a control channel, the MAC processor determines uploading, downloading and data erasing for a plurality of data channels, and updates the corresponding contents in the control message.Type: GrantFiled: December 25, 2008Date of Patent: July 31, 2012Assignee: Industrial Technology Research InstituteInventors: Shi-Wei Lee, Yu-Min Lin, Maria C. Yuang, I-Fen Chao, Bird C. Lo