Patents by Inventor Yu Min Lin

Yu Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160195233
    Abstract: An LED vehicle headlight includes a lens, a reflector, a first light source, and a second light source. The lens has a focal plane. The reflector is located at a side of the lens, and the reflector is equipped with a first focal point and a second focal point, wherein the second focal point is located on the focal plane. The first light source has a first light-emitting surface confronting the lens. The second light source has a second light-emitting surface confronting the reflector. The first focal point is located on the second light-emitting surface, and the reflector is configured to reflect and focus light beams emitted from the second light-emitting surface onto the second focal point.
    Type: Application
    Filed: November 30, 2015
    Publication date: July 7, 2016
    Inventors: Yu-Min LIN, Shih-Kai LIN
  • Publication number: 20160163665
    Abstract: A chip structure includes a chip, a first metal layer, a second metal layer and a bonding wire. The first metal layer is disposed on the chip, and a material of the first metal layer includes nickel or nickel alloy. The second metal layer is disposed on the first metal layer, and a material of the second metal layer includes copper, copper alloy, aluminum, aluminum alloy, palladium or palladium alloy. The bonding wire is connected to the second metal layer, and a material of the bonding wire includes copper or copper alloy.
    Type: Application
    Filed: March 26, 2015
    Publication date: June 9, 2016
    Inventors: Yu-Min Lin, Po-Chen Lin, Jing-Yao Chang
  • Patent number: 9237631
    Abstract: A light emitting chip operating under a DC power supply is provided. The light emitting chip includes a substrate and a plurality of light emitting elements. The light emitting elements are arranged on the substrate, and have the same or different area sizes. The light emitting elements are driven by a single driving voltage or sectionally driven by a plurality of driving voltages.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: January 12, 2016
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Yu-Sheng Chen, Cheng-Chun Liao, Chia-Yen Lee, Yu-Min Lin
  • Publication number: 20150224159
    Abstract: Disclosed is an extract of Perilla frutescens seeds that contains rosmarinic acid, luteolin, and apigenin, the weight ratio between rosmarinic acid, luteolin, and apigenin being 0.1-200:0.1-200:1. Also disclosed is a method for treating a psychiatric disorder using the above-described extract or an extract of Perilla frutescens seeds containing at least an active agent selected from the group consisting of rosmarinic acid, luteolin, and apigenin.
    Type: Application
    Filed: February 3, 2015
    Publication date: August 13, 2015
    Inventors: Leah Lo, Win-Chin Chiang, Jui-Ching Chen, Yu-Min Lin, Chien-Chang Wu, Che-Yi Lin, Chien-Jen Shih, Yu-Hsuan Lin, Tzu-Chun Chen, Yu-Hsiang Huang
  • Publication number: 20150202455
    Abstract: In a flexible LED pad for use in phototherapy treatment of humans or animals, the PCBs in the pad are securely linked together with electrical connectors and ribbon cables to prevent the connections from being broken as the flexible pad is bent or otherwise deformed during the treatment. In one embodiment, low-profile socket connectors are mounted to the PCBs and mate with plug connectors at the ends of the ribbon cables. For similar reasons, the LED pad may be connected to an LED control unit by means of an electrical connector (e.g. a USB socket) mounted to a PCB in the LED pad. The PCBs, on which the LEDs are mounted, are fitted into a downset in the flexible pad to prevent the LEDs from becoming misaligned with openings in the flexible pad.
    Type: Application
    Filed: August 15, 2014
    Publication date: July 23, 2015
    Applicant: Applied BioPhotonics Limited
    Inventors: Richard K. Williams, Keng Hung Lin, Yu-Min Lin, Daniel Schell, Joseph Leahy
  • Publication number: 20150187737
    Abstract: A molding package assembly is provided, which includes a substrate and first and second molding packages stacked on the substrate. Each of the first and second molding packages has a semiconductor element, an anti-warping structure disposed around a periphery of the semiconductor element, a molding material encapsulating the semiconductor element and the anti-warping structure, and a protection layer formed on the semiconductor element, the molding material and the anti-warping structure. The anti-warping structure facilitates to prevent warping of the molding package assembly during a molding process.
    Type: Application
    Filed: December 5, 2014
    Publication date: July 2, 2015
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Chau-Jie Zhan
  • Patent number: 9024441
    Abstract: A bump structure includes a substrate, a pad, an electrode and a protruding electrode. The pad is disposed on the substrate. The electrode is formed by a first metal material and disposed on the pad. The protruding electrode is formed by a second metal material and disposed on the electrode, wherein a cross-sectional area of the protruding electrode is less than a cross-sectional area of the electrode.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: May 5, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Chau-Jie Zhan, Tao-Chih Chang
  • Patent number: 8963048
    Abstract: The invention includes a heating assembly, a heating device and an auxiliary cooling module for a battery. The heating assembly is connected to a battery and includes a heat-conducting element and a heating element. The heat-conducting element has at least one heat-absorbing portion and at least one heat-conducting portion. The heat-conducting portion is provided to correspond to the battery. The heating element has at least one first heating portion located to correspond to the heat-absorbing portion for heating the heat-absorbing portion. The other side of the heat-conducting element opposite to the battery is provided with a heat-insulating portion. The auxiliary cooling module is further provided with at least one cooling pipe in the heat-conducting element, thereby cooling the battery.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: February 24, 2015
    Assignee: Asia Vital Components Co., Ltd.
    Inventor: Yu-Min Lin
  • Patent number: 8866309
    Abstract: A first back surface of a first chip faces toward a carrier. A first active surface of the first chip has first pads and a first insulting layer thereon. A second chip is disposed on the first chip and electrically connected to the carrier. A second active surface of the second chip faces toward the first active surface. The second active surface has second pads and a second insulting layer thereon. Bumps connect the first and second pads. First and second daisy chain circuits are respectively disposed on the first and second insulting layers. Hetero thermoelectric device pairs are disposed between the first and second chips and connected in series by the first and second daisy chain circuits, and constitute a circuit with an external device. First and second heat sinks are respectively disposed on a second surface of the carrier and a second back surface of the second chip.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: October 21, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Jing-Yao Chang, Tao-Chih Chang, Yu-Wei Huang, Yu-Min Lin, Shin-Yi Huang
  • Patent number: 8807800
    Abstract: An illumination structure including an illumination module, a light base and a cover is provided. The light base includes a cylindrical shell and an electrical connector, wherein the cylindrical shell is used for receiving and supporting the illumination module. A first end of the cylindrical shell has a first edge including a plurality of protrusions. A second end of the cylindrical shell is connected to the electrical connector. The cover has a second edge including a plurality of recessions. Each recession is complementary in shape to a corresponding protrusion, so that the protrusions are received in corresponding recessions respectively.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: August 19, 2014
    Assignee: Lextar Electronics Corporation
    Inventors: Yu-Min Lin, Cheng-Chun Liao, Ya-Wen Chen, Chia-Shen Cheng, Chang-Han Chen, Chin-Chang Hsu
  • Patent number: 8722448
    Abstract: A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: May 13, 2014
    Assignee: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Patent number: 8674452
    Abstract: A semiconductor device includes: a substrate having a first region and a second region; a first gate structure disposed on the first region, wherein the first gate structure comprises a first high-k dielectric layer, a first work function metal layer, and a first metal layer disposed between the first high-k dielectric layer and the first work function metal layer; and a second gate structure disposed on the second region, wherein the second gate structure comprises a second high-k dielectric layer, a second work function metal layer, and a second metal layer disposed between the second high-k dielectric layer and the second work function metal layer, wherein the thickness of the second metal layer is lower than the thickness of the first metal layer.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: March 18, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chin-Cheng Chien, Tzung-Ying Lee, Tsuo-Wen Lu, Shu-Yen Chan, Jei-Ming Chen, Yu-Min Lin, Chun-Wei Hsu
  • Publication number: 20140051200
    Abstract: A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 20, 2014
    Applicant: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Publication number: 20140035070
    Abstract: A MOS transistor including a silicon substrate, a first gate structure and a second gate structure disposed on the silicon substrate is provided. The first gate structure and the second gate structure each includes a high-k dielectric layer disposed on the silicon substrate, a barrier layer disposed on the high-k dielectric layer, and a work function layer disposed on and contacted with the barrier layer. The MOS transistor further includes a dielectric material spacer. The dielectric material spacer is disposed on the barrier layer of each of the first gate structure and the second gate structure and surrounding the work function layer of each of the first gate structure and the second gate structure.
    Type: Application
    Filed: October 4, 2013
    Publication date: February 6, 2014
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Tsuo-Wen Lu, Tzung-Ying Lee, Jei-Ming Chen, Chun-Wei Hsu, Yu-Min Lin, Chia-Lung Chang, Chin-Cheng Chien, Shu-Yen Chan
  • Publication number: 20140021877
    Abstract: A light emitting chip operating under a DC power supply is provided. The light emitting chip includes a substrate and a plurality of light emitting elements. The light emitting elements are arranged on the substrate, and have the same or different area sizes. The light emitting elements are driven by a single driving voltage or sectionally driven by a plurality of driving voltages.
    Type: Application
    Filed: July 15, 2013
    Publication date: January 23, 2014
    Inventors: Yu-Sheng Chen, Cheng-Chun Liao, Chia-Yen Lee, Yu-Min Lin
  • Publication number: 20130329374
    Abstract: A pre-molded cavity 3D packaging module with layout is disclosed. The 3D packaging module includes a pre-molded cavity. A wall and a vertical plane of the pre-molded cavity form an inclined angle of more than 3°. An intersecting region between a bottom and a sidewall of the 3D packaging module has a curved profile to facilitate smooth circuit layout.
    Type: Application
    Filed: July 6, 2012
    Publication date: December 12, 2013
    Applicants: Keng-Hung Lin, CMSC, Inc.
    Inventors: Keng-Hung Lin, Ming-Lun Chang, Yu-Min Lin
  • Patent number: 8599181
    Abstract: A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region and the first electrodes are electrically connected to the first patterned semiconductor layer.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: December 3, 2013
    Assignee: AU Optronics Corp.
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Patent number: 8580625
    Abstract: A method for manufacturing a MOS transistor is provided. A substrate has a high-k dielectric layer and a barrier in each of a first opening and a second opening formed by removing a dummy gate and located in a first transistor region and a second transistor region. A dielectric barrier layer is formed on the substrate and filled into the first opening and the second opening to cover the barrier layers. A portion of the dielectric barrier in the first transistor region is removed. A first work function metal layer is formed. The first work function metal layer and a portion of the dielectric barrier layer in the second transistor region are removed. A second work function metal layer is formed. The method can avoid a loss of the high-k dielectric layer to maintain the reliability of a gate structure, thereby improving the performance of the MOS transistor.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: November 12, 2013
    Inventors: Tsuo-Wen Lu, Tzung-Ying Lee, Jei-Ming Chen, Chun-Wei Hsu, Yu-Min Lin, Chia-Lung Chang, Chin-Cheng Chien, Shu-Yen Chan
  • Publication number: 20130279198
    Abstract: A light guide device includes N+1 light guide plates and N linear plane splitters. The light guide plates include a light outlet face, a light guiding face and a reflection face. The volume of the light guide device is defined by the light outlet face opposite to the light guiding face. The light guiding face has a plurality of first microstructures for diverting the light. The reflection face extends from the light outlet face toward a splitting portion. The linear plane splitters have a first and a second splitting portion. The first and second splitting portions of the ith linear plane splitter connects the light guiding face and the reflection face of the (j?1)th and jth light guide plates. The i and j satisfy 1?i?N and 2?j?N+1. Moreover, a light module utilizing the light guide device is disclosed.
    Type: Application
    Filed: December 16, 2012
    Publication date: October 24, 2013
    Applicant: LEXTAR ELECTRONICS CORP.
    Inventors: YU-MIN LIN, CHIA-SHEN CHENG, CHENG-CHUN LIAO, YA-WEN CHEN
  • Patent number: 8536038
    Abstract: A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: September 17, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shao-Wei Wang, Yu-Ren Wang, Chien-Liang Lin, Wen-Yi Teng, Tsuo-Wen Lu, Chih-Chung Chen, Ying-Wei Yen, Yu-Min Lin, Chin-Cheng Chien, Jei-Ming Chen, Chun-Wei Hsu, Chia-Lung Chang, Yi-Ching Wu, Shu-Yen Chan