Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary method includes forming a fin-shaped structure extending from a front side of a substrate, recessing a source region of the fin-shaped structure to form a source opening, forming a semiconductor plug under the source opening, exposing the semiconductor plug from a back side of the substrate, selectively removing a first portion of the substrate without removing a second portion of the substrate adjacent to the semiconductor plug, forming a backside dielectric layer over a bottom surface of the workpiece, replacing the semiconductor plug with a backside contact, and selectively removing the second portion of the substrate to form a gap between the backside dielectric layer and the backside contact. By forming the gap, a parasitic capacitance between the backside contact and an adjacent gate structure may be advantageously reduced.

Abstract: A method and a system for obtaining a product prototype based on an eye movement data. The method comprises the following steps: Obtaining A front-side view of the target product for establishing a underlying sample library; The target product is divided into several detection areas according to its structure or function features, and the eye movement is detected to obtain the fixation time of the target product The invention adopts computer and image collecting technology to process the observation data of human eyes, and adopts K-means clustering to obtain the prototype of the target product, to assist the designer to grasp the categories of personal interest contour, so as to improve the design effect of product appearance.

Abstract: A method for forming a multi-material part by selective laser melting includes the following steps. Modeling is performed by regularly distributing and arraying a combination of materials that meets forming requirements such that a part model is designed. The designed part model is subjected to a dimension compensation, a shape compensation, a chamfering setting, a margin design and a design of a process support to obtain a process model. The obtained process model is sliced into a series of layers. Type, distribution and boundary information of materials in each layer are collected to generate a control file. All materials required for part forming are loaded into an additive manufacturing equipment. After a state of the additive manufacturing equipment meets forming requirements, a part is formed under the control of the generated control file. Post-processing is performed after the part is formed.

Abstract: A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor coupled in series with an isolation transistor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations. During a data refresh, the isolation transistor can be turned on to provide current boosting. During emission periods, the isolation transistor is turned off to prevent cathode noise from potentially coupling through to one or more direct-current voltage nodes in the pixel.

Abstract: A device for double-sided processing through single shot peening includes: a shot peening system, a workpiece clamping mechanism for clamping a workpiece, and a rebound system. The workpiece is provided with a first through-hole, and the first through-hole directly faces a nozzle. The rebound system includes a reflecting surface, an open container, and a reflecting surface gripping unit. The reflecting surface includes an upper reflecting surface, a middle reflecting surface, and a lower reflecting surface. The middle reflecting surface is provided with a second through-hole. The upper reflecting surface and the lower reflecting surface are both made of flexible elastic materials and are both provided with waterproof layers. A partition plate is disposed in the open container and partitions the open container into a first cavity and a second cavity. The second cavity is provided with a filling liquid, and the partition plate is slidable in the open container.

Abstract: The invention provides a wind power forecasting method and system based on an asymmetric Laplace distribution. It utilizes the asymmetric Laplace distribution to model the uncertainty of the power forecasts. First, the maximum information coefficient (MIC) is used to characterize the linear and nonlinear relationship between the target and historical power data to select reasonable and optimal inputs. Then, to avoid the information loss, a multi-scale feature fusion module is proposed which combines the features obtained from different convolutional layers of a convolutional neural network (CNN), thereby further enhancing the feature extraction ability of the traditional CNN. Finally, a BiLSTM is used to extract temporal information and forecast the parameters of asymmetric Laplace distribution.

Abstract: Disclosed in the present invention is a tail gas treatment catalyst. The catalyst consists of a carrier, a first catalyst, and a second catalyst. The first catalyst and the second catalyst are provided on both ends of the carrier. The first catalyst can purify pollutants in tail gas. The second catalyst can purify a byproduct, ammonia, obtained by the purification by the first catalyst and pollutants that are not completely purified by the first catalyst. The second catalyst is of a double-layer structure; the lower layer consists of an oxygen storage material, aluminum oxide, and a second active component; the second active component is a composition of Pt and Pd, or a composition of Ce, Fe, Ni and Cu; the upper layer consists of a molecular sieve and a third active component; the third active component is Cu or a composition of Cu and Fe.

Abstract: Disclosed here is a supported catalyst comprising a thermally stable core, wherein the thermally stable core comprises a metal oxide support and nickel disposed in the metal oxide support, wherein the metal oxide support comprises at least one base metal oxide and at least one transition metal oxide or rare earth metal oxide mixed with or dispersed in the base metal oxide. Optionally the supported catalyst can further comprise an electrolyte removing layer coating the thermally stable core and/or an electrolyte repelling layer coating the electrolyte removing layer, wherein the electrolyte removing layer comprises at least one metal oxide, and wherein the electrolyte repelling layer comprises at least one of graphite, metal carbide and metal nitride. Also disclosed is a molten carbonate fuel cell comprising the supported catalyst as a direct internal reforming catalyst.

Abstract: A method and structure for forming a semiconductor device includes etching back a source/drain contact to define a substrate topography including a trench disposed between adjacent hard mask layers. A contact etch stop layer (CESL) is deposited along sidewall and bottom surfaces of the trench, and over the adjacent hard mask layers, to provide the CESL having a snake-like pattern disposed over the substrate topography. A contact via opening is formed in a dielectric layer disposed over the CESL, where the contact via opening exposes a portion of the CESL within the trench. The portion of the CESL exposed by the contact via opening is etched to form an enlarged contact via opening and expose the etched back source/drain contact. A metal layer is deposited within the enlarged contact via opening to provide a contact via in contact with the exposed etched back source/drain contact.

Abstract: A method includes forming a gate structure on a substrate, forming a seal spacer covering a sidewall of the gate structure, forming a sacrificial spacer covering a sidewall of the seal spacer, forming source/drain regions sandwiching a channel region that is under the gate structure, and depositing a contact etch stop layer covering a sidewall of the sacrificial spacer. The method further includes removing the sacrificial spacer to form a trench, wherein the trench exposes a sidewall of the contact etch stop layer and the sidewall of the seal spacer, and depositing an inter-layer dielectric layer, wherein the inter-layer dielectric layer caps the trench, thereby defining an air gap inside the trench.

Abstract: In some embodiments, a display stack includes a set of light-emitting elements, and a display backplane that includes a set of conductors and is electrically coupled to the set of light-emitting elements. A conductor in the set of conductors has a length, and a curved edge extending along at least a portion of the length. In some embodiments, a display stack includes a set of light-emitting elements; a set of transistors, electrically coupled to the set of light-emitting elements; and a set of conductors, electrically coupled to the set of transistors. The set of transistors may be electrically coupled to the set of conductors at a set of conductive pads. A plurality of conductive pads in the set of conductive pads is coupled to a single conductor in the set of conductors. The single conductor approaches different conductive pads in the plurality of conductive pads at different angles.

Abstract: A system for self-discharge prognostics for vehicle battery cells with an internal short circuit includes a plurality of battery cells and a voltage sensor providing open-circuit voltage data over time for each battery cell. The system further includes a computerized prognostic controller operating programming to monitor the open-circuit voltage data over time for each of the plurality of battery cells and evaluate a voltage drop rate through a time window for each of the plurality of battery cells based upon the open-circuit voltage data. The controller further identifies one of the plurality of battery cells to include the internal short circuit based upon the voltage drop rate and signals an alert based upon the one of the plurality of battery cells including the internal short circuit.

Abstract: A semiconductor structure includes a fin extending from a substrate and oriented lengthwise in a first direction, where the fin includes a stack of semiconductor layers, an isolation feature disposed over the substrate and oriented lengthwise in a second direction perpendicular to the first direction, where the isolation feature is disposed adjacent to the fin, and a metal gate structure having a top portion disposed over the stack of semiconductor layers and a bottom portion interleaved with the stack of semiconductor layers. Furthermore, a sidewall of the bottom portion of the metal gate structure is defined by a sidewall of the isolation feature, and the top portion of the metal gate structure laterally extends over a top surface of the isolation feature.

Abstract: Semiconductor structures and methods are provided. An exemplary method according to the present disclosure includes receiving a fin-shaped structure comprising a first channel region and a second channel region, a first and a second dummy gate structures disposed over the first and the second channel regions, respectively. The method also includes removing a portion of the first dummy gate structure, a portion of the first channel region and a portion of the substrate under the first dummy gate structure to form a trench, forming a hybrid dielectric feature in the trench, removing a portion of the hybrid dielectric feature to form an air gap, sealing the air gap, and replacing the second dummy gate structure with a gate stack after sealing the air gap.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a substrate and nanostructures suspended over the substrate. The semiconductor structure also includes a gate structure wrapping around the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure also includes a contact vertically over the source/drain structure and a first conductive structure vertically over the gate structure. The semiconductor structure also includes a second conductive structure in contact with a top surface of the first conductive structure and a top surface of the contact and including an extending portion laterally sandwiched between the first conductive structure and the contact.

Abstract: An AR-based supplementary teaching system for guzheng and method thereof, the system includes an AR device, a data processing device and positioning devices for key positions, the data processing device is signal-connected to the AR device, and the positioning devices is installed on the guzheng code of guzheng, the positioning devices corresponds to the guzheng code of guzheng one by one; the AR device is used to obtain real scene data; the data processing device is used to guzheng and the positioning devices identify and generate string distribution data; also used to obtain operation instruction based on user actions, execute the operation instruction and generate virtual data; the AR device is also used to convert all data based on the string distribution data The virtual data and the real scene data are superimposed and displayed.

Abstract: A semiconductor device includes: an isolation insulating layer; fin structures protruding from the isolation insulating layer; gate structures, each having a metal gate and a cap insulating layer disposed over the metal gate; a first source/drain epitaxial layer and a second source/drain epitaxial layer disposed between two adjacent gate structures; and a first conductive contact disposed on the first source/drain epitaxial layer, and a second conductive contact disposed on the second source/drain epitaxial layer; a separation isolation region disposed between the first and second conductive contact; and an insulating layer disposed between the separation isolation region and the isolation insulating layer. The separation isolation region is made of a different material than the insulating layer.

Abstract: A method for detecting thermal runaway of a cell includes: positioning a battery pack having multiple cells in an automobile vehicle; measuring a cell voltage of the multiple cells at a predetermined sample rate; and identifying if the cell voltage decreases and modulates coincident with a cell surface temperature increase indicating initiation of a cell short.

Abstract: In a method for measuring brain free water content, in response to an RF excitation field generated on the basis of a magnetic resonance fingerprinting sequence and applied to the brain, an equilibrium magnetization mixed term (M0) signal is acquired from radiation emitted by each excited voxel of the brain, to obtain an M0 value of each voxel of the brain; a receive coil sensitivity (RP) value of each voxel of the brain is acquired; the M0 value of each voxel of the brain is divided by the RP value of the corresponding voxel to obtain a proton density (PD) value of each voxel of the brain; a PD value of cerebrospinal fluid is taken to be a reference PD value; and the PD value of each voxel of the brain is divided by the reference PD value to obtain the free water content of each voxel of the brain. The method advantageously increases the speed and accuracy of measurement of brain free water content.

Abstract: Methods and devices including an air gap adjacent a contact element extending to a source/drain feature of a device are described. Some embodiments of the method include depositing a dummy layer, which is subsequently removed to form the air gap. The dummy layer and subsequent air gap may be formed after a SAC dielectric layer such as silicon nitride is formed over an adjacent metal gate structure.