Patents by Inventor Yun Wei

Yun Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Increased optical path for long wavelength light by grating structure
    Patent number: 11581352
    Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: February 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee
  • Image sensor having stress releasing structure and method of forming same
    Patent number: 11569288
    Abstract: A semiconductor structure includes a sensor chip. The sensor chip includes a pixel array region, a bonding pad region, and a periphery region surrounding the pixel array region. The semiconductor structure further includes a stress-releasing trench, wherein the stress-releasing trench is in the periphery region, and the stress-releasing trench fully surrounds a perimeter of the pixel array region and the bonding pad region.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: January 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yun-Wei Cheng, Chun-Wei Chia, Chun-Hao Chou, Kuo-Cheng Lee, Ying-Hao Chen
  • Image sensor having stress releasing structure and method of forming same
    Patent number: 11569289
    Abstract: A semiconductor structure includes a substrate having a pixel array region and a first seal ring region, wherein the first seal ring region surrounds the pixel array region, and the first seal ring region includes a first seal ring. The semiconductor structure further includes a first isolation feature in the first seal ring region, wherein the first isolation feature is filled with a dielectric material, and the first isolation feature is a continuous structure surrounding the pixel array region. The semiconductor structure further includes a second isolation feature between the first isolation feature and the pixel array region, wherein the second isolation feature is filled with the dielectric material.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: January 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yun-Wei Cheng, Chun-Wei Chia, Chun-Hao Chou, Kuo-Cheng Lee, Ying-Hao Chen
  • SAMPLE HOLDING CIRCUIT OF REDUCED COMPLEXITY AND ELECTRONIC DEVICE USING THE SAME
    Publication number: 20220406391
    Abstract: A sample holding circuit includes a signal input terminal, a first sampling unit, a second sampling unit, and a holding unit. The signal input terminal receives a first reference voltage or a second reference voltage, the first sampling unit samples the first reference voltage when a first clock signal is triggered to obtain a first sampling voltage, the second sampling unit samples the second reference voltage when a second clock signal is triggered to obtain a second sampling voltage. The holding unit receives the first sampling voltage and the second sampling voltage when a third clock signal is triggered. The sample holding circuit effectively simplifies circuit structure and reduces the use of amplifiers, also improving the signal to noise ratio.
    Type: Application
    Filed: August 3, 2021
    Publication date: December 22, 2022
    Inventors: FENG-WEI LIN, YU-CHIEH HSU, HONG-YUN WEI
  • Photodetector using a buried gate electrode for a transfer transistor and methods of manufacturing the same
    Patent number: 11527563
    Abstract: A semiconductor structure includes a photodetector, which includes a substrate semiconductor layer having a doping of a first conductivity type, a second-conductivity-type photodiode layer that forms a p-n junction with the substrate semiconductor layer, a floating diffusion region that is laterally spaced from the second-conductivity-type photodiode layer, and a transfer gate electrode including a lower transfer gate electrode portion that is formed within the substrate semiconductor layer and located between the second-conductivity-type photodiode layer and the floating diffusion region. The transfer gate electrode may laterally surround the p-n junction, and may provide enhanced electron transmission efficiency from the p-n junction to the floating diffusion region. An array of photodetectors may be used to provide an image sensor.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: December 13, 2022
    Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Wei-Li Hu, Kuo-Cheng Lee, Hsin-Chi Chen
  • Multi-protrusion transfer gate structure
    Patent number: 11521997
    Abstract: An IC structure includes a substrate region having a first doping type and including an upper surface, first and second regions within the substrate region, each of the first and second regions having a second doping type opposite the first doping type, and a gate conductor including a plurality of conductive protrusions extending into the substrate region in a direction perpendicular to a plane of the upper surface. The conductive protrusions are electrically connected to each other, and at least a portion of each conductive protrusion is positioned between the first and second regions.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: December 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kun-Huei Lin, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Chun-Wei Chia
  • Low-Refractivity Grid Structure and Method Forming Same
    Publication number: 20220384509
    Abstract: A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventors: Kun-Huei Lin, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Cheng Yuan Wang
  • Image Sensors With Stress Adjusting Layers
    Publication number: 20220384497
    Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.
    Type: Application
    Filed: July 29, 2022
    Publication date: December 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Chien HSIEH, Kuo-Cheng Lee, Ying-Hao Chen, Yun-Wei Cheng
  • PHOTODETECTOR USING A BURIED GATE ELECTRODE FOR A TRANSFER TRANSISTOR AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20220367546
    Abstract: A semiconductor structure includes a photodetector, which includes a substrate semiconductor layer having a doping of a first conductivity type, a second-conductivity-type photodiode layer that forms a p-n junction with the substrate semiconductor layer, a floating diffusion region that is laterally spaced from the second-conductivity-type photodiode layer, and a transfer gate electrode including a lower transfer gate electrode portion that is formed within the substrate semiconductor layer and located between the second-conductivity-type photodiode layer and the floating diffusion region. The transfer gate electrode may laterally surround the p-n junction, and may provide enhanced electron transmission efficiency from the p-n junction to the floating diffusion region. An array of photodetectors may be used to provide an image sensor.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 17, 2022
    Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Wei-Li Hu, Kuo-Cheng Lee, Hsin-Chi Chen
  • Heterodimeric Antibodies That Bind to CD38 and CD3
    Publication number: 20220363758
    Abstract: The present disclosure provides heterodimeric antibodies that bind to two different target antigens at the same time. In one embodiment, the heterodimeric antibodies are bispecific antibodies. In one embodiment, the heterodimeric antibodies comprise three polypeptides including: a first polypeptide comprising an scFv-Fc fusion polypeptide; a second polypeptide comprising an immunoglobulin heavy chain; and a third polypeptide comprising an immunoglobulin light chain. In one embodiment, the first polypeptide includes one or more point mutations that confer increased thermal-stability to the first polypeptide.
    Type: Application
    Filed: June 30, 2020
    Publication date: November 17, 2022
    Applicant: Sorrento Therapeutics, Inc.
    Inventors: Xiao He, Yanliang Zhang, Yun Wei Lai, Gunnar F. Kaufmann, Barbara A. Swanson, Lisa Diane Kerwin, Susan M. Richards
  • IMAGE SENSOR DEVICE
    Publication number: 20220367549
    Abstract: An image sensor device includes a substrate, photosensitive pixels, an interconnect structure, a dielectric layer, and a light blocking element. The photosensitive pixels are in the substrate. The interconnect structure is over a first side of the substrate. The dielectric layer is over a second side of the substrate opposite the first side of the substrate. The light blocking element has a first portion extending over a top surface of the dielectric layer and a second portion extending in the dielectric layer. The second portion of the light blocking element laterally surrounds the photosensitive pixels.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Wei-Li HU, Kuo-Cheng LEE, Ying-Hao CHEN
  • USE OF COMPUTATIONALLY GENERATED THERMAL ENERGY
    Publication number: 20220369521
    Abstract: In one aspect, a computing device-implemented method includes receiving at least one triggering event signal from one or more components of a heat recovery system. The method also includes determining, based in part on the at least one triggering event signal, a computation workload assignment to be executed on one or more computation devices. The method further includes sending one or more command signals to the one or more computation devices. The one or more command signals include a portion of the computation workload assignment for execution by the one or more computation devices. The method also includes initiating capture of heat energy to be stored in one or more heat reservoirs, the heat energy being generated by the one or more computation device based upon the computation workload assignment.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 17, 2022
    Inventors: Lawrence Orsini, Yun Wei
  • Redistribution Layer Layouts on Integrated Circuits and Methods for Manufacturing the Same
    Publication number: 20220359370
    Abstract: Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Cheng-Yuan Li, Kuo-Cheng Lee, Yun-Wei Cheng, Yen-Liang Lin
  • ELECTROMAGNETIC RADIATION DETECTION METHOD
    Publication number: 20220359590
    Abstract: A method of detecting electromagnetic radiation includes illuminating a photodiode of a pixel sensor with electromagnetic radiation, using vertical gate structures of a transfer transistor to couple a cathode of the photodiode to an internal node of the pixel sensor, thereby generating an internal node voltage level, and generating an output voltage level of the pixel sensor based on the internal node voltage level.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 10, 2022
    Inventors: Kun-Huei LIN, Yun-Wei CHENG, Chun-Hao CHOU, Kuo-Cheng LEE, Chun-Wei CHIA
  • Back side illuminated image sensor with deep trench isolation structures and self-aligned color filters
    Patent number: 11495632
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of isolation structures are each disposed between two respective radiation-sensing regions. The isolation structures protrude out of the second side of the substrate.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: November 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Cheng Lee, Yun-Wei Cheng, Yung-Lung Hsu, Hsin-Chi Chen
  • DEEP TRENCH ISOLATION STRUCTURE IN A PIXEL SENSOR
    Publication number: 20220344382
    Abstract: A pixel sensor may include a deep trench isolation (DTI) structure that extends the full height of a substrate in which a photodiode of the pixel sensor is included. Incident light entering the pixel sensor at a non-orthogonal angle is absorbed or reflected by the DTI structure along the full height of the substrate. In this way, the DTI structure may reduce, minimize, and/or prevent the incident light from traveling through the pixel sensor and into an adjacent pixel sensor along the full height of the substrate. This may increase the spatial resolution of an image sensor in which the DTI structure is included, may increase the overall sensitivity of the image sensor, may reduce and/or prevent color mixing between pixel sensors of the image sensor, and/or may decrease image noise after color correction.
    Type: Application
    Filed: April 22, 2021
    Publication date: October 27, 2022
    Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE, Cheng-Ming WU
  • Edge-trimming methods for wafer bonding and dicing
    Patent number: 11482506
    Abstract: A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: October 25, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Feng-Chien Hsieh, Hsin-Chi Chen, Kuo-Cheng Lee, Mu-Han Cheng, Yun-Wei Cheng
  • EDGE-TRIMMING METHODS FOR WAFER BONDING AND DICING
    Publication number: 20220336411
    Abstract: A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 20, 2022
    Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Mu-Han Cheng, Kuo-Cheng Lee, Hsin-Chi Chen
  • Activatable Multi-Specific Antigen Binding Protein Complexes
    Publication number: 20220324974
    Abstract: The present disclosure provides several embodiments of multi-specific antigen binding protein complexes. In some embodiments, the multi-specific antigen binding protein complex is composed of either two or three polypeptide chains that assemble with each other to form het-erodimeric complexes comprising two different Fab regions each capable of binding two different epitopes and comprising an Fc region which is capable of exhibiting Fc effector function, thus having a relatively simple structure compared to certain other multi-specific antibodies. In one embodiment, the multi-specific antigen binding protein complex is activatable as one of the polypeptide chains that compose the protein complex carries a cleavable linker.
    Type: Application
    Filed: April 10, 2020
    Publication date: October 13, 2022
    Applicant: Sorrento Therapeutics, Inc.
    Inventors: Yanliang Zhang, Gunnar F. Kaufmann, Xiao He, Yun Wei Lai
  • Use of blockchain based distributed consensus control
    Patent number: 11468518
    Abstract: A system for the cryptographically-secure, autonomous control of devices comprising, connected to or remotely operating devices in an electrically powered network and the transaction of the benefits, costs or value created by or transacted through the devices in this electrically powered network.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: October 11, 2022
    Assignee: TransActive Grid Inc.
    Inventors: Lawrence Orsini, Yun Wei, Joseph Lubin