Patents by Inventor Yun Wei

Yun Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11728364
    Abstract: A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kun-Huei Lin, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Cheng Yuan Wang
  • Patent number: 11728365
    Abstract: A semiconductor device includes a semiconductor substrate, a radiation-sensing region, at least one isolation structure, and a doped passivation layer. The radiation-sensing region is present in the semiconductor substrate. The isolation structure is present in the semiconductor substrate and adjacent to the radiation-sensing region. The doped passivation layer at least partially surrounds the isolation structure in a substantially conformal manner.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Han Tsai, Yun-Wei Cheng, Kuo-Cheng Lee, Chun-Hao Chou, Yung-Lung Hsu
  • Publication number: 20230253284
    Abstract: The present disclosure describes heat dissipation structures formed in functional or non- functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 10, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yun-Wei CHENG, Chun-Hao Chou, Kuo-Cheng Lee, Ying-Hao Chen
  • Publication number: 20230246047
    Abstract: An image sensor includes a substrate, a first photosensitive unit, a second photosensitive unit, a buffer layer, a dielectric grid, a first color filter, and a second color filter. The first photosensitive unit and the second photosensitive unit are in the substrate. The buffer layer covers the substrate, the first photosensitive unit and the second photosensitive unit. The dielectric grid is over the buffer layer and between the first photosensitive unit and the second photosensitive unit. The dielectric grid has a round top surface. The first color filter is over the first photosensitive unit. The first color filter is in contact with the round top surface and the buffer layer. The second color filter is over the second photosensitive unit.
    Type: Application
    Filed: April 10, 2023
    Publication date: August 3, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei CHENG, Chun-Hao CHOU, Yin-Chieh HUANG, Wan-Chen HUANG, Zhe-Ju LIU, Kuo-Cheng LEE, Chi-Cherng JENG
  • Patent number: 11706525
    Abstract: An image sensor including a semiconductor substrate, a plurality of color filters, a plurality of first lenses and a second lens is provided. The semiconductor substrate includes a plurality of sensing pixels arranged in array, and each of the plurality of sensing pixels respectively includes a plurality of image sensing units and a plurality of phase detection units. The color filters at least cover the plurality of image sensing units. The first lenses are disposed on the plurality of color filters. Each of the plurality of first lenses respectively covers one of the plurality of image sensing units. The second lens is disposed on the plurality of color filters and the second lens covers the plurality of phase detection units.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: July 18, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Hsin-Chi Chen, Kuo-Cheng Lee, Hsun-Ying Huang
  • Publication number: 20230214387
    Abstract: Computer technology for: (i) performing prefetching based on shard workload in NoSQL; and/or (ii) perform distribution of stored data over the various tiers of a cache memory based on shard workload in NoSQL. This can help achieve better load balance among and between the shards of a database and the respectively associated nodes on which the shards are stored.
    Type: Application
    Filed: January 5, 2022
    Publication date: July 6, 2023
    Inventors: Peng Hui Jiang, Gang Tang, Jun Su, Yan Chen, Yun Wei Qi
  • Patent number: 11684687
    Abstract: An automatic floor-disinfection robot for floors of hospital rooms, including a moving device, a alarm and a disinfection device. The moving device is a disc-shaped robot, and includes a chassis moving mechanism, a support plate and a top plate arranged successively from bottom to top. The disinfection device includes a disinfection assembly and a baffle. The disinfection assembly includes a liquid supply mechanism, a liquid spray mechanism and a fan.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: June 27, 2023
    Assignees: SOUTHWEST JIAOTONG UNIVERSITY, LAOKEN MEDICAL TECHNOLOGY CO., LTD.
    Inventors: Xianghui Chang, Bowen Ma, Qijun Liu, Xia Liu, Yan Yan, Weidong Qiu, Xihao Jin, Xiang Li, Miao Zhang, Yun Wei
  • Publication number: 20230197751
    Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 22, 2023
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee
  • Patent number: 11670562
    Abstract: The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: June 6, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Ying-Hao Chen
  • Patent number: 11670651
    Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: June 6, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu
  • Patent number: 11652124
    Abstract: An isolation structure can be formed between adjacent and/or non-adjacent pixel regions (e.g., between diagonal or cross-road pixel regions), of an image sensor, to reduce and/or prevent optical crosstalk. The isolation structure may include a deep trench isolation (DTI) structure or another type of trench that is partially filled with a material such that an air gap is formed therein. The DTI structure having the air gap formed therein may reduce optical crosstalk between pixel regions. The reduced optical crosstalk may increase spatial resolution of the image sensor, may increase overall sensitivity of the image sensor, may decrease color mixing between pixel regions of the image sensor, and/or may decrease image noise after color correction of images captured using the image sensor.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: May 16, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Wei Huang, Chao-Ching Chang, Yun-Wei Cheng, Chih-Lung Cheng, Yen-Chang Chen, Wen-Jen Tsai, Cheng Han Lin, Yu-Hsun Chih, Sheng-Chan Li, Sheng-Chau Chen
  • Publication number: 20230115340
    Abstract: Leadless power amplifier (PA) packages having topside termination interposer (TTI) arrangements, and associated fabrication methods, are disclosed. Embodiments of the leadless PA package include a base flange, a first set of interposer mount pads, a first RF power die, a package body. The first RF power die is attached to a die mount surface of the base flange and electrically interconnected with the first set of interposer mount pads. The TTI arrangement is electrically coupled to the first set of interposer mount pads and projects therefrom in the package height direction. The package body encloses the first RF power die and having a package topside surface opposite the lower flange surface. Topside input/output terminals of the PA package are accessible from the package topside surface and are electrically interconnected with the first RF power die through the TTI arrangement and the first set of interposer mount pads.
    Type: Application
    Filed: September 30, 2021
    Publication date: April 13, 2023
    Inventors: Yun Wei, Scott Duncan Marshall, Lakshminarayan Viswanathan, Taek Kyu Kim, Ricardo Uscola, Fernando A. Santos
  • Publication number: 20230111199
    Abstract: An automatic floor-disinfection robot for floors of hospital rooms, including a moving device, a alarm and a disinfection device. The moving device is a disc-shaped robot, and includes a chassis moving mechanism, a support plate and a top plate arranged successively from bottom to top. The disinfection device includes a disinfection assembly and a baffle. The disinfection assembly includes a liquid supply mechanism, a liquid spray mechanism and a fan.
    Type: Application
    Filed: December 8, 2022
    Publication date: April 13, 2023
    Inventors: Xianghui CHANG, Bowen MA, Qijun LIU, Xia LIU, Yan YAN, Weidong QIU, Xihao JIN, Xiang LI, Miao ZHANG, Yun WEI
  • Patent number: 11626435
    Abstract: An image sensor includes a substrate, a photosensitive unit in the substrate, a dielectric grid over the substrate, and a color filter over the photosensitive unit and surrounded by the dielectric grid. The dielectric grid has a first portion and a second portion over the first portion, and the second portion of the dielectric grid has a rounded top surface extending upwards from a sidewall of the first portion of the dielectric grid. The color filter has a first portion lower than a lowermost portion of the rounded top surface of the second portion of the dielectric grid and a second portion higher than the lowermost portion of the rounded top surface of the second portion of the dielectric grid.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Yin-Chieh Huang, Wan-Chen Huang, Zhe-Ju Liu, Kuo-Cheng Lee, Chi-Cherng Jeng
  • Patent number: 11621231
    Abstract: Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: April 4, 2023
    Assignee: NXP USA, Inc.
    Inventors: Yun Wei, Fernando A. Santos, Lakshminarayan Viswanathan, Scott Duncan Marshall
  • Patent number: 11610638
    Abstract: A sample holding circuit includes a signal input terminal, a first sampling unit, a second sampling unit, and a holding unit. The signal input terminal receives a first reference voltage or a second reference voltage, the first sampling unit samples the first reference voltage when a first clock signal is triggered to obtain a first sampling voltage, the second sampling unit samples the second reference voltage when a second clock signal is triggered to obtain a second sampling voltage. The holding unit receives the first sampling voltage and the second sampling voltage when a third clock signal is triggered. The sample holding circuit effectively simplifies circuit structure and reduces the use of amplifiers, also improving the signal to noise ratio.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: March 21, 2023
    Assignee: JADARD TECHNOLOGY INC.
    Inventors: Feng-Wei Lin, Yu-Chieh Hsu, Hong-Yun Wei
  • Publication number: 20230078927
    Abstract: A method of manufacturing a transistor structure includes forming a plurality of trenches in a substrate, lining the plurality of trenches with a dielectric material, forming first and second substrate regions at opposite sides of the plurality of trenches, and filling the plurality of trenches with a conductive material. The plurality of trenches includes first and second trenches aligned between the first and second substrate regions, and filling the plurality of trenches with the conductive material includes the conductive material extending continuously between the first and second trenches.
    Type: Application
    Filed: November 11, 2022
    Publication date: March 16, 2023
    Inventors: Kun-Huei LIN, Yun-Wei CHENG, Chun-Hao CHOU, Kuo-Cheng LEE, Chun-Wei CHIA
  • Publication number: 20230067395
    Abstract: In some implementations, a pixel array may include a near infrared (NIR) cut filter layer for visible light pixel sensors of the pixel array. The NIR cut filter layer is included in the pixel array to absorb or reflect NIR light for the visible light pixel sensors to reduce the amount of MR light absorbed by the visible light pixel sensors. This increases the accuracy of the color information provided by the visible light pixel sensors, which can be used to produce more accurate images. In some implementations, the visible light pixel sensors and/or MR pixel sensors may include high absorption regions to adjust the orientation of the angle of refraction for the visible light pixel sensors and/or the MR pixel sensors, which may increase the quantum efficiency of the visible light pixel sensors and/or the MR pixel sensors.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE, Cheng-Ming WU
  • Publication number: 20230068723
    Abstract: A semiconductor arrangement includes a photodiode extending to a first depth from a first side in a substrate. An isolation structure laterally surrounds the photodiode and includes a first well that extends into a first side of the substrate. A deep trench isolation extends into a second side of the substrate and at least a portion of the deep trench isolation underlies the first well.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE, Cheng-Ming WU
  • Patent number: 11586948
    Abstract: An IoT system includes a computing module for controlling an integral function of the system and including an analysis unit and a machine learning unit. The analysis unit is capable of operational analysis and creating a predictive model and creating a predictive model according to the data analyzed. The machine learning unit has an algorithm function to create a corresponding learning model. An IoT module is electrically connected to the computing module to serve as an intermediate role. At least one detection unit is electrically connected to the IoT module and disposed in soil to detect data of environmental and soil conditions and sends the data detected to the computing module for subsequent analysis.
    Type: Grant
    Filed: October 20, 2019
    Date of Patent: February 21, 2023
    Assignee: National Yang Ming Chiao Tung University
    Inventors: Wen-Liang Chen, Lung-Chieh Chen, Szu-Chia Chen, Wei-Han Chen, Chun-Yu Chu, Yu-Chi Shih, Yu-Ci Chang, Tzu-I Hsieh, Yen-Ling Chen, Li-Chi Peng, Meng-Zhan Lee, Jui-Yu Ho, Chi-Yao Ku, Nian-Ruei Deng, Yuan-Yao Chan, Erick Wang, Tai-Hsiang Yen, Shao-Yu Chiu, Jiun-Yi Lin, Yun-Wei Lin, Fung Ling Ng, Yi-Bing Lin, Chin-Cheng Wang