Patents by Inventor Zvonimir Z. Bandic

Zvonimir Z. Bandic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8909859
    Abstract: A method and a storage system are provided for implementing a sustained large block random write performance mechanism for shingled magnetic recording (SMR) drives in a redundant array of inexpensive disks (RAID). A Solid State Drive (SSD) is provided with the SMR drives in the RAID. The SSD is used in a hot spare mode, which is activated when a large block random-write event is identified for a SMR drive in the RAID. In the hot spare mode, the SSD temporarily receives new incoming writes for the identified SMR drive. Then the identified SMR drive is updated from the SSD to restore the state of the identified SMR drive, and operations continue with normal writing only using the SMR drives in the RAID.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: December 9, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Tomohiro Harayama, Hitoshi Kamei, Takaki Nakamura, Timothy Tsai
  • Patent number: 8892817
    Abstract: Methods are described that allow disk drives, such as shingle-written magnetic recording (SMR) drives, to recover an Indirection Address Table mapping of LBAs to PBAs after an emergency power off (EPO). Indirection Address Table (IAT) snapshots are periodically written inline with user data stores, and in one embodiment Cumulative Delta Lists (CDLs) with incremental address update information are stored between snapshots. In an embodiment of the invention, when an imminent loss of power is detected, the current CDL, covering IAT updates not yet written to disk, is saved to a nonvolatile memory. The IAT snapshots combined with the set of CDLs provide the information needed to recreate the current Indirection Address Table when power is restored after an emergency power loss. In an alternative embodiment the CDL is obviated by including metadata in the sector that encodes the address indirection mapping and the last snapshot ID.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: November 18, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Yuval Cassuto, Jonathan Darrel Coker, Cyril Guyot, Marco Sanvido
  • Patent number: 8874875
    Abstract: ICC-NCQ priority and deadline information in conjunction with an estimation of command access time that is specific to SMR drives are used improve command queue optimization. Estimated completion times are determined based on the internal subcommands that the drive has to execute to complete the host read or write command taking into account whether all or part of the data will be or already is stored in write-twice cache, E-region and/or I-region. The command processor selects the next command for execution based on calculated access times with adjusted priority based on the specified deadline for the command. As the deadline approaches, the priority of the command increases. For high priority data writes as specified by a host, an optimized storage plan is selected as appropriate using the “write-twice cache” (WTC) region, E-region or I-region.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: October 28, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Cyril Guyot
  • Patent number: 8792272
    Abstract: A method and apparatus are provided for implementing enhanced data partial erase for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, and a data re-write after the partial erase to the MLC memory is performed using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase cycle includes a duration and voltage level based upon a degradation of the MLC memory cells.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: July 29, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Luiz M. Franca-Neto, Cyril Guyot, Robert Eugeniu Mateescu
  • Patent number: 8793431
    Abstract: A shingled magnetic recording hard disk drive that uses writeable cache tracks in the inter-band gaps between the annular data bands minimizes the effect of far track erasure (FTE) in the boundary regions of annular data bands caused by writing to the cache tracks. Based on the relative FTE effect for all the tracks in a range of tracks of the cache track being written, a count increment (CI) table or a cumulative count increment (CCI) table is maintained. For every writing to a cache track, a count for each track in an adjacent boundary region, or a cumulative count for each adjacent boundary region, is increased. When the count value for a track, or the cumulative count for a boundary region, reaches a predetermined threshold the data is read from that band and rewritten to the same band.
    Type: Grant
    Filed: March 17, 2012
    Date of Patent: July 29, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Tomohiro Harayama, Robert Eugeniu Mateescu, Shad Henry Thorstenson, Timothy Kohchih Tsai
  • Patent number: 8736993
    Abstract: Approaches are provided for a hard-disk drive (HDD) and techniques for using multiple LUNs per HDD where each LUN is mapped to a head/disk interface. In one example, a HDD generates multiple LUNs and assigns each to a single head, such that data written by a first head is only associated to a first LUN, and so forth.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: May 27, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Cyril Guyot
  • Patent number: 8724248
    Abstract: A method, apparatus and a data storage device are provided for implementing data track pitch adjustment for data written on a recordable surface of a storage device under operational vibration conditions. An operational vibration disturbance spectrum is detected during a write operation and the data track pitch is selectively adjusted based on the detected operational vibration disturbance spectrum. The adjusted track pitch information is saved and used during a read operation.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 13, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Abhishek Dhanda, Toshiki Hirano, Tetsuo Semba, Zvonimir Z. Bandic
  • Patent number: 8699266
    Abstract: A method and apparatus are provided for implementing enhanced performance for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A voltage baseline of a prior write is identified, and a data write uses the threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding for data being written to the MLC memory responsive to the identified voltage baseline.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: April 15, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Luiz M. Franca-Neto, Cyril Guyot, Robert Eugeniu Mateescu
  • Publication number: 20140006707
    Abstract: ICC-NCQ priority and deadline information in conjunction with an estimation of command access time that is specific to SMR drives are used improve command queue optimization. Estimated completion times are determined based on the internal subcommands that the drive has to execute to complete the host read or write command taking into account whether all or part of the data will be or already is stored in write-twice cache, E-region and/or I-region. The command processor selects the next command for execution based on calculated access times with adjusted priority based on the specified deadline for the command. As the deadline approaches, the priority of the command increases. For high priority data writes as specified by a host, an optimized storage plan is selected as appropriate using the “write-twice cache” (WTC) region, E-region or I-region.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Inventors: Zvonimir Z. Bandic, Cyril Guyot
  • Publication number: 20140002922
    Abstract: Approaches are provided for a hard-disk drive (HDD) and techniques for using multiple LUNs per HDD where each LUN is mapped to a head/disk interface. In one example, a HDD generates multiple LUNs and assigns each to a single head, such that data written by a first head is only associated to a first LUN, and so forth.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Inventors: Zvonimir Z. Bandic, Cyril Guyot
  • Publication number: 20130321948
    Abstract: A shingled magnetic recording (SMR) disk drive has concentric shingled data tracks having data sectors with physical block addresses (PBAs), with the tracks being arranged in annular bands separated by annular inter-band gaps. The disk drive also has an on-disk extended cache region and may have writable inter-band cache (IBC) tracks in the inter-band gaps. A count is maintained in memory for each band and each IBC, and the count is incremented for each writing to a band or an IBC. When a count for a band or IBC reaches a predetermined threshold, the data is read from the tracks in the boundary region of the adjacent band that are within the range of the FTE and that data is then written to the extended cache. The FTE-affected tracks are then invalidated, meaning that PBAs can no longer be assigned to the data sectors in those tracks.
    Type: Application
    Filed: June 4, 2012
    Publication date: December 5, 2013
    Inventors: Zvonimir Z. Bandic, Damien Cyril Daniel Le Moal, Shad Henry Thorstenson
  • Patent number: 8593748
    Abstract: A shingled magnetic recording (SMR) disk drive has concentric shingled data tracks having data sectors with physical block addresses (PBAs), with the tracks being arranged in annular bands separated by annular inter-band gaps. The disk drive also has an on-disk extended cache region and may have writable inter-band cache (IBC) tracks in the inter-band gaps. A count is maintained in memory for each band and each IBC, and the count is incremented for each writing to a band or an IBC. When a count for a band or IBC reaches a predetermined threshold, the data is read from the tracks in the boundary region of the adjacent band that are within the range of the FTE and that data is then written to the extended cache. The FTE-affected tracks are then invalidated, meaning that PBAs can no longer be assigned to the data sectors in those tracks.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: November 26, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Damien Cyril Daniel Le Moal, Shad Henry Thorstenson
  • Publication number: 20130246703
    Abstract: A shingled magnetic recording hard disk drive that uses writeable cache tracks in the inter-band gaps between the annular data bands minimizes the effect of far track erasure (FTE) in the boundary regions of annular data bands caused by writing to the cache tracks. Based on the relative FTE effect for all the tracks in a range of tracks of the cache track being written, a count increment (CI) table or a cumulative count increment (CCI) table is maintained. For every writing to a cache track, a count for each track in an adjacent boundary region, or a cumulative count for each adjacent boundary region, is increased. When the count value for a track, or the cumulative count for a boundary region, reaches a predetermined threshold the data is read from that band and rewritten to the same band.
    Type: Application
    Filed: March 17, 2012
    Publication date: September 19, 2013
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Tomohiro Harayama, Robert Euginiu Mateescu, Shad Henry Thorstenson, Timothy Kohchih Tsai
  • Publication number: 20130242426
    Abstract: A shingled magnetic recording (SMR) hard disk drive (HDD) essentially eliminates the effect of far track erasure (FTE) in the boundary regions of annular data bands caused by writing in the boundary regions of adjacent annular data bands. The extent of the FTE effect is determined for each track within a range of tracks of the track being written. Based on the relative FTE effect for all the tracks in the range, a count increment (CI) table or a cumulative count increment (CCI) table is maintained for all the tracks in the range. For every writing to a track in a boundary region, a count for each track in an adjacent boundary region, or a cumulative count for the adjacent boundary region, is increased. When the count reaches a predetermined threshold the data is read from that band and rewritten to the same band.
    Type: Application
    Filed: March 17, 2012
    Publication date: September 19, 2013
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Tomohiro Harayama, Robert Eugeniu Mateescu, Shad Henry Thorstenson, Timothy Kohchih Tsai
  • Patent number: 8537481
    Abstract: A shingled magnetic recording (SMR) hard disk drive (HDD) essentially eliminates the effect of far track erasure (FTE) in the boundary regions of annular data bands caused by writing in the boundary regions of adjacent annular data bands. The extent of the FTE effect is determined for each track within a range of tracks of the track being written. Based on the relative FTE effect for all the tracks in the range, a count increment (CI) table or a cumulative count increment (CCI) table is maintained for all the tracks in the range. For every writing to a track in a boundary region, a count for each track in an adjacent boundary region, or a cumulative count for the adjacent boundary region, is increased. When the count reaches a predetermined threshold the data is read from that band and rewritten to the same band.
    Type: Grant
    Filed: March 17, 2012
    Date of Patent: September 17, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Tomohiro Harayama, Robert Eugeniu Mateescu, Shad Henry Thorstenson, Timothy Kohchih Tsai
  • Patent number: 8531793
    Abstract: A hard disk drive (HDD) minimizes the effects of far track erasure (FTE) by counting the number of writes to the data tracks and incrementing counters based on the known effect of FTE on each track. The extent of the FTE effect is determined for each track within a range of tracks of the track being written, and based on the relative FTE effect for all the tracks in the range a count increment (CI) is determined for each track within the range. A counter is maintained for each track. For every writing to a track, a count for each track within a range of the track being written is increased by the CI value associated with the track number within the range. When the count value for a track reaches a predetermined threshold the data is read from that track and rewritten, preferably to the same track.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: September 10, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Marco Sanvido, Bruce Alexander Wilson
  • Publication number: 20130232292
    Abstract: A method and a storage system are provided for implementing a sustained large block random write performance mechanism for shingled magnetic recording (SMR) drives in a redundant array of inexpensive disks (RAID). A Solid State Drive (SSD) is provided with the SMR drives in the RAID. The SSD is used in a hot spare mode, which is activated when a large block random-write event is identified for a SMR drive in the RAID. In the hot spare mode, the SSD temporarily receives new incoming writes for the identified SMR drive. Then the identified SMR drive is updated from the SSD to restore the state of the identified SMR drive, and operations continue with normal writing only using the SMR drives in the RAID.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 5, 2013
    Applicant: Hitachi Global Storage Technologies Netherlands B. V.
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Tomohiro Harayama, Hitoshi Kamei, Takaki Nakamura, Timothy Tsai
  • Publication number: 20130194864
    Abstract: A method and apparatus are provided for implementing enhanced performance for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A voltage baseline of a prior write is identified, and a data write uses the threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding for data being written to the MLC memory responsive to the identified voltage baseline.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 1, 2013
    Applicant: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Luiz M. Franca-Neto, Cyril Guyot, Robert Eugeniu Mateescu
  • Publication number: 20130194865
    Abstract: A method and apparatus are provided for implementing enhanced data read for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data read back for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, higher voltage and lower voltage levels are compared, and respective data values are identified responsive to the compared higher voltage and lower voltage levels.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 1, 2013
    Applicant: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Luiz M. Franca-Neto, Cyril Guyot, Robert Eugeniu Mateescu
  • Publication number: 20130198436
    Abstract: A method and apparatus are provided for implementing enhanced data partial erase for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, and a data re-write after the partial erase to the MLC memory is performed using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase cycle includes a duration and voltage level based upon a degradation of the MLC memory cells.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 1, 2013
    Applicant: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Luiz M. Franca-Neto, Cyril Guyot, Robert Eugeniu Mateescu