ELECTRICALLY-ISOLATED INTERCONNECTS AND SEAL RINGS IN PACKAGES USING A SOLDER PREFORM
Embodiments include electronic assemblies and methods for forming electronic assemblies. One embodiment includes a method of forming a MEMS device assembly, including forming an active MEMS region on a substrate. A plurality of bonding pads electrically coupled to the active MEMS region are formed. A seal ring wetting layer is also formed on the substrate, the seal ring wetting layer surrounding the active MEMS region. A single piece solder preform is positioned on the bonding pads and on the seal ring wetting layer, the single piece solder preform including a seal ring region and a bonding pad region. The seal ring region is connected to the bonding pad region by a plurality of solder bridges. The method also includes heating the single piece solder preform to a temperature above the reflow temperature, so that the bridges split and the solder from the preform accumulates on the seal ring wetting layer and the bonding pads. A lid is coupled to the solder. In certain embodiments the lid may include vias having conductive material therein for providing electrical contact to the MEMS device. Other embodiments are described and claimed.
This application is a Divisional of U.S. Ser. No. 11/174,409, filed Jun. 30, 2005, which is hereby incorporated by reference in its entirety.
RELATED ARTElectronic devices such as micro electro mechanical systems (MEMS) may include a region that is covered by a lid. In certain applications, the lid should be sealed over the wafer or die, for example, over the active MEMS components. To facilitate the coupling of the lid, a solder preform may be placed on the wafer or die around the active MEMS components. The lid is then placed on the solder preform, and the stack is compressed and heated above the solder reflow temperature to solder the lid to the wafer or die. Electrical connections to the active MEMS components are made by leads positioned under the preform, with an insulating material separating the lead from the preform to prevent shorting. Such conventional processes for forming electrical connections and for attaching lids to devices such as MEMS may limit the ability to increase device integration and decrease device size.
BRIEF DESCRIPTION OF THE DRAWINGSEmbodiments are described by way of example, with reference to the accompanying drawings, which are not drawn to scale, wherein:
Solder preforms may be used for the attachment of covers to electronic assemblies. One such use is for the attachment of lids to MEMS devices, where the solder preform is used as a seal ring to attach the lid. However, as described above, as device integration increases and device size decreases, the conventional structure has problems due to the positioning of the leads for electrical contact to the active device region. Such leads are positioned under the seal ring solder preform, which necessitates the use of insulating materials to electrically isolate the leads from the solder preform. Certain embodiments relate to devices and methods for permitting greater device integration and decreased device size, using a single solder preform that is used for both forming a seal ring and for electrically contact to the active device region.
The hatched lines at the periphery of
The structure of the solder preform 20, including the bridges 28, acts to permit the same solder preform to be used for both forming a seal ring and for forming electrical interconnects to the bonding pads 14. Due to the properties of the solder, during the reflow process, the solder bridges 28 will break and the solder will accumulate only in the wettable areas, which includes the seal ring wetting layer 16 and the bonding pad region 14.
The solder preform may be formed from a variety of solder materials, and may include a flux if necessary. For example, certain embodiments may utilize a gold-tin solder. One such embodiment includes 80 wt % Au and 20 wt % Sn.
Certain embodiments including that shown in FIGS. 5(a) and 5(b) may provide one or more of the following advantages over conventional assemblies. For example, by making electrical connections through the lid instead of from the side of the assembly, the assembly can be narrower in width. In addition, the assembly shown in FIGS. 5(a) and 5(b) does not route the connections under the seal ring and, as a result, no insulating material is needed between the connections and the seal ring. As a result, the assembly can be made thinner in height. Thus, certain embodiments enable a higher interconnect density and smaller device footprint. In addition, the number of process operations may be decreased because no deposition of insulating material operation is needed. Moreover, the use of solder preforms instead of other solder deposition operations may lead to simplified fabrication, cost savings, tight composition control, and flexibility in the solder composition used.
The embodiments described above and in connection with
The method described in the flowchart of
The computer 201 further may further include memory 209 and one or more controllers 211a, 211b . . . 211n, which are also disposed on the motherboard 207. The motherboard 207 may be a single layer or multi-layered board which has a plurality of conductive lines that provide communication between the circuits in the package 205 and other components mounted to the board 207. Alternatively, one or more of the CPU 203, memory 209 and controllers 211a, 211b . . . 211n may be disposed on other cards such as daughter cards or expansion cards. The CPU 203, memory 209 and controllers 211a, 211b . . . 211n may each be seated in individual sockets or may be connected directly to a printed circuit board. A display 215 may also be included.
Any suitable operating system and various applications execute on the CPU 203 and reside in the memory 209. The content residing in memory 209 may be cached in accordance with known caching techniques. Programs and data in memory 209 may be swapped into storage 213 as part of memory management operations. The computer 201 may comprise any suitable computing device, such as a mainframe, server, personal computer, workstation, laptop, handheld computer, telephony device, network appliance, virtualization device, storage controller, network controller, etc.
The controllers 211a, 211b . . . 211n may include a system controller, peripheral controller, memory controller, hub controller, I/O bus controller, video controller, network controller, storage controller, etc. For example, a storage controller can control the reading of data from and the writing of data to the storage 213 in accordance with a storage protocol layer. The storage protocol of the layer may be any of a number of known storage protocols. Data being written to or read from the storage 213 may be cached in accordance with known caching techniques. A network controller can include one or more protocol layers to send and receive network packets to and from remote devices over a network 217. The network 217 may comprise a Local Area Network (LAN), the Internet, a Wide Area Network (WAN), Storage Area Network (SAN), etc. Embodiments may be configured to transmit data over a wireless network or connection. In certain embodiments, the network controller and various protocol layers may employ the Ethernet protocol over unshielded twisted pair cable, token ring protocol, Fibre Channel protocol, etc., or any other suitable network communication protocol.
While certain exemplary embodiments have been described above and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative and not restrictive, and that embodiments are not restricted to the specific constructions and arrangements shown and described since modifications may occur to those having ordinary skill in the art.
Claims
1. An electronic assembly comprising:
- an active MEMS region on a substrate;
- a plurality of bonding pads electrically coupled to the active MEMS region;
- a seal ring wetting layer on the substrate, the seal ring wetting layer surrounding the active MEMS region;
- a solder seal ring on the seal ring wetting layer;
- solder bonding pad interconnects on the bonding pads;
- a lid coupled to the solder seal ring and to the solder bonding pad interconnects;
- a plurality of vias extending through the lid and positioned in alignment with the solder bonding pad interconnects; and
- an electrically conductive material in the vias that is electrically coupled to the solder bonding pad interconnects.
2. An electronic assembly as in claim 1, wherein the bonding pads and the seal ring wetting layer are formed from the same material.
3. An electric assembly as in claim 1, further comprising a wetting layer formed on a portion of the lid, the wetting layer on the lid being in contact with the seal ring and with the solder bonding pad interconnects.
4. The electronic assembly of claim 1, wherein the substrate and the lid each comprise silicon.
5. The electronic assembly of claim 1, wherein the solder material comprises gold and tin.
6. An electronic assembly comprising:
- an electronic device on a substrate;
- a plurality of bonding pads electrically coupled to the electronic device;
- a seal ring wetting layer on the substrate, the seal ring wetting layer surrounding the electronic device;
- a solder layer positioned on the seal ring wetting layer surrounding the electronic device;
- a solder layer positioned on the bonding pads; and
- a lid positioned to cover the electronic device;
- wherein the seal ring wetting layer and the bonding pads are formed from the same material.
7. The electronic assembly of claim 6, wherein the lid is coupled to the solder layer positioned on the seal ring wetting layer.
8. The electronic assembly of claim 6, wherein the solder layer positioned on the seal ring wetting layer and the solder layer positioned on the bonding pads are formed from the same solder material, and wherein the lid is coupled to the solder layer positioned on the seal ring wetting layer and to the solder layer positioned on the bonding pads.
9. The electronic assembly of claim 6, wherein the substrate and the lid each comprise silicon.
10. The electronic assembly of claim 8, wherein the solder material comprises gold and tin.
11. The assembly of claim 6, wherein the electronic device is a MEMS device.
Type: Application
Filed: Jun 20, 2007
Publication Date: Oct 18, 2007
Inventors: Leonel Arana (Phoenix, AZ), John Heck (Berkeley, CA)
Application Number: 11/765,969
International Classification: H01L 23/12 (20060101);