Method for forming Barrier Layer and the Related Damascene Structure
A method for forming barrier layers comprises steps of forming a first metal barrier layer covering a first dielectric layer and contacting a conductive layer through a via of the first dielectric layer, forming a barrier layer of metalized materials on the first metal layer, optionally forming a second metal barrier layer on the barrier layer of metalized materials, removing portions of the barrier layer of metalized materials above the via bottom in the first dielectric layer, and leaving the barrier layer of metalized materials remaining on the via sidewall in the first dielectric layer; and forming a second metal layer covering the barrier layer of metalized materials. The accomplished barrier layers will have lower resistivity on the via bottom in the first dielectric layer and they are capable of preventing copper atoms from diffusing into the dielectric layer.
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This application is a continuation-in-part of U.S. patent application Ser. No. 11/646,387 filed on Dec. 28, 2006, which is a continuation of U.S. patent application Ser. No. 10/841,562, filed on May 10, 2004, which is a divisional of U.S. patent application Ser. No. 10/461,346, filed Jun. 16, 2003, all of which are commonly assigned.
BACKGROUND1. Field of the Invention
The present invention relates to a method for the manufacture of semiconductor devices and more particularly to the method for forming a barrier layer in a damascene structure.
2. Description of the Prior Art
In the processes for the manufacture of semiconductor devices, when the active elements of these semiconductor devices are constructed, the following work will be the manufacture of the metal conductive layers above these active elements to complete the electrical interconnection inside the semiconductor devices. The processes for the manufacture of the metal conductive layers are usually as follows: first forming a metal layer above the active regions of the semiconductor devices, second proceeding with photoresist coating, developing, and etching to complete the manufacture of the first metal layer, third depositing a dielectric layer on the first metal layer, and finally proceeding with the manufacture of multiple metal layers dependent on the needs of the different semiconductor devices.
For many years, materials of metal conductive layers of semiconductors are mainly aluminum and aluminum alloys. However, as sizes of semiconductor devices get more and more smaller, operating speeds of semiconductor devices get more and more faster, and power consumptions of semiconductor devices get more and more lower, it is necessary to use metal materials of lower resistivity and dielectric materials of low dielectric constant to complete the electrical interconnection inside semiconductor devices. U.S. Pat. No. 6,489,240 B1 cites using copper and dielectric materials of dielectric constant lower than 4 to complete the electrical interconnection inside semiconductor devices. When copper is used as the material of metal conductors of semiconductors, as shown in
In order to prevent copper atoms from diffusing into dielectric layers in the prior art, titanium nitride (TiN) or tantalum nitride (TaN) is usually used to form a barrier layer. U.S. Pat. No. 6,541,374 B1 mentions details of forming a barrier layer with TiN. Practically, when the barrier layer 190 is deposited, as a result of the direction of depositing is about perpendicular to the wafer surface, the thickness of the sidewall of the dual damascene structure 10 will be about one-fifth to a half of the thickness above the via bottom in the first dielectric layer 160 and above the trench bottom in the second dielectric layer 180, easily causing that the deposition of the sidewall of the dual damascene structure 10 is incomplete and copper atoms formed later in the dual damascene structure 10 diffuse into surrounding dielectric layers. Consequently the electric property of the surrounding dielectric layers will be affected and then the semiconductor devices will be damaged. Accordingly there is a need for completely depositing a barrier layer of the sidewall of a dual damascene structure 10 to prevent copper atoms from diffusing into surrounding dielectric layers.
In the other hand, the resistivity of nitrided metal materials in the prior art is far more higher than the resistivity of metal materials. Hence if TiN or TaN is used as the material of the barrier layer 190 in the dual damascene structure 10, the resistivity between metals in the dual damascene structure 10 will be so high that the operating speed and the power consumption of the semiconductor devices will be influenced. Therefore there is a need for reducing the resistivity of the barrier layer 190 above the via bottom in the first dielectric layer 160.
BRIEF SUMMARYOne main purpose of the present invention is to use the barrier layer formed by at least two metal layers and a barrier layer of metalized materials to fully prevent copper atoms from diffusing into surrounding dielectric layers.
The other main purpose of the present invention is to reduce the resistivity of the barrier layer above the via bottom in the dielectric layer of a dual damascene structure and to make a good ohmic contact between the barrier layer and the copper layer below the barrier layer and the copper layer later formed above the barrier layer.
From one aspect of the present invention, a method for forming a barrier layer is disclosed. First, a conductive layer is provided. Subsequently, a first dielectric layer is formed on the conductive layer. The first dielectric layer has a via therein. Next, a first barrier metal layer covering the first dielectric layer and the conductive layer is formed. Furthermore, a barrier layer of metalized materials is formed on the first barrier metal layer. Next, portions of the barrier layer of metalized materials above the first barrier metal layer on the via bottom in the first dielectric layer are removed without removing the first barrier metal layer on the via bottom. Portions of the barrier layer of metalized materials remain on the via bottom and the whole via sidewall in the first dielectric layer. Following that, a second barrier metal layer covering the barrier layer of metalized materials is formed. The first barrier metal layer, the barrier layer of metalized materials and the second barrier metal layer are disposed on the via bottom and the whole via sidewall.
From another aspect of the present invention, a method for forming a barrier layer is disclosed. First, a conductive layer is provided. Subsequently, a first dielectric layer is formed on the conductive layer, and the first dielectric layer has a via therein. Next, a first barrier metal layer covering the first dielectric layer and the conductive layer is formed. Furthermore, a barrier layer of metalized materials is formed on the first barrier metal layer. Next, a second barrier metal layer covering the barrier layer of metalized materials is formed. Furthermore, portions of the second barrier metal layer and portions of the barrier layer of metalized materials above the first barrier metal layer on the via bottom in the first dielectric layer are removed. Thus, the second barrier metal layer and the barrier layer of metalized materials remain on the whole via sidewall in the first dielectric layer without removing the first barrier metal layer on the via bottom. Following that, a third barrier metal layer covering the second barrier metal layer is formed. The first barrier metal layer and the third barrier metal layer are disposed on the via bottom. The first barrier metal layer, the barrier layer of metalized materials, the second barrier metal layer and the third barrier metal layer are disposed on the whole via sidewall.
From still another aspect of the present invention, a damascene structure is disclosed. The damascene structure includes a conductive layer, a first dielectric layer, a first barrier metal layer, a barrier layer of metalized materials, a second barrier metal layer and a third barrier metal layer. The first dielectric layer is disposed on the conductive layer, and the first dielectric layer has a via therein. The first barrier metal layer is disposed on the via bottom and the via sidewall in the first dielectric layer. The first barrier metal layer covers the conductive layer on the via bottom. The barrier layer of metalized materials covers the first barrier metal layer on the via sidewall, and exposes the first barrier metal layer on the via bottom. The second barrier metal layer covers the barrier layer of metalized materials on the via sidewall, and exposes the first barrier metal layer on the via bottom. The third barrier metal layer covers the second barrier metal layer on the via sidewall, and covers the first barrier metal layer on the via bottom.
The present invention uses chemical vapor deposition processes or physical vapor deposition processes to form a barrier layer on a conductive layer of a semiconductor device and then uses ion-bombardment to remove metalized materials of higher resistivity to reduce the resistivity of the barrier layer neighboring to the conductive layer.
These and other features and advantages of the various embodiments disclosed herein will be better understood with respect to the following description and drawings, in which like numbers refer to like parts throughout, and in which:
Some embodiments of the invention will be described exquisitely as below. Besides, the invention can also be practiced extensively in other embodiments. That is to say, the scope of the invention should not be restricted by the proposed embodiments. The scope of the invention should be based on the claims proposed later.
In the first preferred embodiment of the present invention, as shown in
As shown in
As shown in
As a result of the resistivity of the tantalum nitride layer 320 varies with the proportion of the nitrogen atoms within the tantalum nitride layer 320, the resistivity is about between 95 micro-ohms centimeter and 14800 micro-ohms centimeter. The resistivity of the tantalum nitride layer 320 is far more than the resistivity of a tantalum layer. The resistivity of the α-phase tantalum layer is about between 15 micro-ohms centimeter and 30 micro-ohms centimeter and the resistivity of the β-phase tantalum layer is about between 150 micro-ohms centimeter and 220 micro-ohms centimeter. However, the resistivity of a copper layer is about 1.7 micro-ohms centimeter. Accordingly in order to reduce the resistivity above the via bottom in the first dielectric layer 260, the tantalum nitride layer 320 above the via bottom in the first dielectric layer 260 has to be removed.
As shown in
After the tantalum nitride layer 320 above the via bottom in the first dielectric layer 260 is removed by the method of ion-bombardment, the structure above the metal layer 200 will be as shown in
After completing the aforementioned steps, the barrier layers of the dual damascene structure 20 will be as shown in
In the other preferred embodiment of the present invention, as shown in
As shown in
As shown in
As a result of the resistivity of the tantalum nitride layer 480 varies with the proportion of the nitrogen atoms within the tantalum nitride layer 480, the resistivity is about between 95 micro-ohms centimeter and 14800 micro-ohms centimeter. The resistivity of the tantalum nitride layer 480 is far more than the resistivity of a tantalum layer. The resistivity of the α-phase tantalum layer is about between 15 micro-ohms centimeter and 30 micro-ohms centimeter and the resistivity of the β-phase tantalum layer is about between 150 micro-ohms centimeter and 220 micro-ohms centimeter. However, the resistivity of a copper layer is about 1.7 micro-ohms centimeter. Accordingly in order to reduce the resistivity above the via bottom in the dielectric layer 440, the tantalum nitride layer 480 above the via bottom in the dielectric layer 440 has to be removed.
As shown in
After the tantalum nitride layer 480 above the via bottom in the dielectric layer 440 is removed by the method of ion-bombardment, the structure above the metal layer 400 will be as shown in
After completing the aforementioned steps, the barrier layers of the damascene structure 40 will be as shown in
It is noted that the barrier layer of metalized materials disposed on the via bottom may be punched through in the above-mentioned embodiments, and may just be thinned in other embodiments. Please refer to
As shown in
As shown in
The ion-bombardment process without punching through the tantalum nitride layer may also be applied to a damascene structure. Please refer to
As shown in
As shown in
Moreover, the multi-barrier layers formed on the damascene structure or on the dual damascene structure may include more than three barrier layers in other embodiments. Please refer to
As shown in
As shown in
As shown in
It can be understood that portions of the tantalum nitride layer 320 and/or portions of the second tantalum layer 340 may still remain on the via bottom in other embodiments, as shown in
The four-barrier layers may also be applied to a damascene structure. Please refer to
As shown in
As shown in
As shown in
It can be understood that portions of the second tantalum layer 500 and portions of the tantalum nitride layer 480 may still remain on the via bottom in other embodiments, as shown in
The above description is given by way of example, and not limitation. Given the above disclosure, one skilled in the art could devise variations that are within the scope and spirit of the invention disclosed herein, including configurations ways of the recessed portions and materials and/or designs of the attaching structures. Further, the various features of the embodiments disclosed herein can be used alone, or in varying combinations with each other and are not intended to be limited to the specific combination described herein. Thus, the scope of the claims is not to be limited by the illustrated embodiments. As with the operating sequence of the present invention, many variations are possible, and any rearrangement of the operating sequence for achieving same functionality is still within the spirit and scope of the invention.
Claims
1. A method for forming a barrier layer, comprising:
- providing a conductive layer;
- forming a first dielectric layer on the conductive layer, the first dielectric layer having a via therein;
- forming a first barrier metal layer covering the first dielectric layer and the conductive layer;
- forming a barrier layer of metalized materials on the first barrier metal layer;
- removing portions of the barrier layer of metalized materials on the via bottom; and
- forming a second barrier metal layer covering the barrier layer of metalized materials.
2. The method for forming a barrier layer according to claim 1, wherein the step of removing portions of the barrier layer of metalized materials comprises leaving portions of the barrier layer of metalized materials on the via bottom and the barrier layer of metalized materials on the via sidewall.
3. The method for forming a barrier layer according to claim 1, wherein the first barrier metal layer, the barrier layer of metalized materials and the second barrier metal layer are disposed on the via bottom and the whole via sidewall after the second barrier metal layer is formed.
4. The method for forming a barrier layer according to claim 1, wherein the barrier layer of metalized materials on the via bottom in the first dielectric layer is removed by an ion-bombardment process.
5. The method for forming a barrier layer according to claim 4, wherein metal atoms are bombarded out from the barrier layer of metalized materials toward the via sidewall.
6. The method for forming a barrier layer according to claim 4, wherein the ion-bombardment process employs argon ions.
7. The method for forming a barrier layer according to claim 1, further comprising forming a second dielectric layer on the first dielectric layer before forming the first barrier metal layer wherein a trench is in the second dielectric layer and the trench in the second dielectric layer is connected to the via in the first dielectric layer.
8. The method for forming a barrier layer according to claim 1, wherein the first and the second barrier metal layers are tantalum layers, the barrier layer of metalized materials is a tantalum nitride layer, and the conductive layer is a copper layer.
9. The method for forming a barrier layer according to claim 1, wherein the portions of the barrier layer of metalized materials disposed on the via bottom are thinner than the portions of the barrier layer of metalized materials disposed on the via sidewall.
10. A method for forming a barrier layer, comprising;
- providing a conductive layer;
- forming a first dielectric layer on the conductive layer, the first dielectric layer having a via therein;
- forming a first barrier metal layer covering the first dielectric layer and the conductive layer;
- forming a barrier layer of metalized materials on the first barrier metal layer;
- forming a second barrier metal layer covering the barrier layer of metalized materials;
- removing the second barrier metal layer and at least portions of the barrier layer of metalized materials on the via bottom; and
- forming a third barrier metal layer covering the second barrier metal layer.
11. The method for forming a barrier layer according to claim 10, wherein the step of removing the second barrier metal layer and the portions of the barrier layer of metalized materials comprises leaving the second barrier metal layer and the barrier layer of metalized materials remaining on the whole via sidewall.
12. The method for forming a barrier layer according to claim 10, wherein the first barrier metal layer and the third barrier metal layer are disposed on the via bottom, and the first barrier metal layer, the barrier layer of metalized materials, the second barrier metal layer and the third barrier metal layer are disposed on the whole via sidewall.
13. The method for forming a barrier layer according to claim 10, wherein the step of removing the second barrier metal layer and the portions of the barrier layer of metalized materials comprises leaving portions of the barrier layer of metalized materials on the via bottom and the second barrier metal layer and the barrier layer of metalized materials remaining on the whole via sidewall.
14. The method for forming a barrier layer according to claim 10, wherein the first barrier metal layer, the barrier layer of metalized materials and the third barrier metal layer are disposed on the via bottom, and the first barrier metal layer, the barrier layer of metalized materials, the second barrier metal layer and the third barrier metal layer are disposed on the whole via sidewall.
15. The method for forming a barrier layer according to claim 10, wherein the second barrier metal layer and the barrier layer of metalized materials on the via bottom in the first dielectric layer is removed by an ion-bombardment process.
16. The method for forming a barrier layer according to claim 15, wherein metal atoms are bombarded out from the barrier layer of metalized materials toward the via sidewall.
17. The method for forming a barrier layer according to claim 15, wherein the ion-bombardment process employs argon ions.
18. The method for forming a barrier layer according to claim 10, further comprising forming a second dielectric layer on the first dielectric layer before forming the first barrier metal layer wherein a trench is in the second dielectric layer and the trench in the second dielectric layer is connected to the via in the first dielectric layer.
19. A damascene structure, comprising:
- a conductive layer;
- a first dielectric layer disposed on the conductive layer, the first dielectric layer having a via therein;
- a first barrier metal layer disposed on the via bottom and the via sidewall in the first dielectric layer, the first barrier metal layer covering the conductive layer on the via bottom;
- a barrier layer of metalized materials covering the first barrier metal layer on the via sidewall, exposing the first barrier metal layer on the via bottom;
- a second barrier metal layer covering the barrier layer of metalized materials on the via sidewall, exposing the first barrier metal layer on the via bottom; and
- a third barrier metal layer covering the second barrier metal layer on the via sidewall, and covering the first barrier metal layer on the via bottom.
20. The damascene structure according to claim 19, wherein the first and the second barrier metal layers are tantalum layers, the barrier layer of metalized materials is a tantalum nitride layer, and the conductive layer is a copper layer.
Type: Application
Filed: Nov 29, 2009
Publication Date: Mar 25, 2010
Applicant:
Inventors: Yu-Ru YANG (I-Lan), Chien-Chung HUANG (Taichung)
Application Number: 12/626,925
International Classification: H01L 21/768 (20060101); H01L 23/532 (20060101);