METHOD OF FABRICATION POLYMER WAVEGUIDE
A method of fabricating a waveguide device is disclosed. The method includes providing a substrate having an elector-interconnection region and a waveguide region and forming a patterned dielectric layer and a patterned redistribution layer (RDL) over the substrate in the electro-interconnection region. The method also includes bonding the patterned RDL to a vertical-cavity surface-emitting laser (VCSEL) through a bonding stack. A reflecting-mirror trench is formed in the substrate in the waveguide region, and a reflecting layer is formed over a reflecting-mirror region inside the waveguide region. The method further includes forming and patterning a bottom cladding layer in a wave-tunnel region inside the waveguide region and forming and patterning a core layer and a top cladding layer in the waveguide region.
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Manufacturing of waveguide devices has experienced exponential growth. In general, an optical wave is confined inside a waveguide device by a total internal reflection from the waveguide walls. Among various waveguides, polymer optical waveguides have attracted a lot of attentions because of its process availability and manufacturing feasibility. Traditional method of forming a polymer waveguide over a printed circuit board (PCB) or other carriers is to employ a mold to imprint polymer together with a temperature curing process. However, imprinting process raises challenges to keep an adequate uniformity on whole imprinting area. Moreover, life time of the mold brings another concern.
The present disclosure is best understood from the following detailed description when read with the accompanying figures. It is emphasized that, in accordance with the standard practice in the industry, various features are not drawn to scale and are used for illustration purposes only. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
It is understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. Moreover, the performance of a first process before a second process in the description that follows may include embodiments in which the second process is performed immediately after the first process, and may also include embodiments in which additional processes may be performed between the first and second processes. Various features may be arbitrarily drawn in different scales for the sake of simplicity and clarity. Furthermore, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact.
The method 100 begins at step 102 by providing a semiconductor substrate 210. The substrate 210 includes silicon. Alternatively, the substrate may include germanium, silicon germanium, gallium arsenide or other appropriate semiconductor materials. Also alternatively, the semiconductor substrate 210 may include an epitaxial layer. For example, the substrate 210 may have an epitaxial layer overlying a bulk semiconductor. Further, the substrate 210 may be strained for performance enhancement. For example, the epitaxial layer may include a semiconductor material different from those of the bulk semiconductor such as a layer of silicon germanium overlying bulk silicon or a layer of silicon overlying a bulk silicon germanium formed by a process including selective epitaxial growth (SEG). Furthermore, the substrate 210 may include a semiconductor-on-insulator (SOI) structure such as a buried dielectric layer. Also alternatively, the substrate may include a buried dielectric layer such as a buried oxide (BOX) layer, such as that formed by a method referred to as separation by implantation of oxygen (SIMOX) technology, wafer bonding, SEG, or other appropriate method. In the present embodiment, the substrate 210 includes silicon with (100) crystal orientation.
In
Referring to
In the electro-interconnection region 215, a patterned conductive layer 230, referred to as a patterned redistribution layer (RDL) 230, is formed over the dielectric layer 220 by depositing, patterning and etching techniques. The patterned RDL 230 may contain conductive materials such as aluminum, aluminum/silicon/copper alloy, copper, titanium, titanium nitride, tungsten, metal silicide, or combinations thereof. The patterned RDL 230 may be deposited by a process including PVD, CVD, ALD, or combinations thereof. The patterned RDL 230 is patterned to form a plurality of conductive pads to electrically couple to one or more electronic components of the waveguide device 200 to an external device. The patterning process includes photolithography, etch and photoresist stripping processes. For example, the dry etching process may implement an oxygen-containing gas, fluorine-containing gas (e.g., CF4, SF6, CH2F2, CHF3, and/or C2F6), chlorine-containing gas (e.g., C12, CHC13, CC14, and/or BC13), bromine-containing gas (e.g., HBr and/or CHBR3), iodine-containing gas, other suitable gases and/or plasmas, and/or combinations thereof.
Still referring to
The method 100 proceeds to step 104 to form a reflecting-mirror trench 310 in the waveguide region 216 by etching the substrate 210, as shown in
The method 100 proceeds to step 106 by forming a reflecting layer 320 over the substrate 210, as shown in
The method 100 proceeds to step 108 by forming a patterned bottom cladding layer 330 in the wave-tunnel region 316, as shown in
In the depicted embodiment, the patterned bottom cladding layer 330 includes a negative photo-sensitive polymer material such as Ormoclad (from Micro Resist Technology), which is siloxane based inorganic-organic hybrid material. Alternatively, the photo-sensitive polymer may include a positive photo-sensitive polymer. The patterned bottom cladding layer 330 is formed over the substrate 210 by a spin-on coating process. The formation of the patterned bottom layer 330 in the wave-tunnel region 316 does not require an etching process. Rather, a photolithography process is used to directly transfer a desired pattern from a photomask (not illustrated) to the bottom cladding layer 330 to form the patterned bottom cladding layer 330 in the wave-tunnel region 316. An exposure process is performed on the bottom cladding layer 330 (a photo-sensitive layer). The exposure process includes introducing a radiation beam to the bottom cladding layer 330. The radiation beam may be ultraviolet and/or can be extended to include other radiation beams such as ion beam, x-ray, extreme ultraviolet, deep ultraviolet, and other proper radiation energy. For a negative type of photo-sensitive polymer, the exposed portions of the polymer become insoluble upon exposure, while the unexposed portions remain soluble.
Continuing in step 108, the exposed bottom cladding layer 330 is developed (e.g., a developer is applied to the exposed bottom cladding layer 330 to remove the soluble portions of the layer). The substrate 210 may be immersed in a developer liquid for a predetermined amount of time during which a portion of the bottom cladding layer 330 is dissolved and removed. A separate, additional rinse may also be applied. The composition of the developer solution is dependent on the composition of the bottom cladding layer 330. For example, a base solution of 2.38% (TMAH) is used. However, other compositions suitable compositions now known or later developed are also within the scope of the disclosure. A surfactant may also be included. The surfactant may be selected from surfactants such as, 3M Novec fluid HFE-7000, and/or other surfactants known in the art. The developer may be applied by a puddling process, immersion, spray, and/or other suitable methods.
The method 100 proceeds to step 110 by forming and patterning a core layer 340 in the waveguide region 216, as shown in
Still continuing in step 110, the processes of patterning the core layer 340 is similar in many respects to those discussed above in association with the patterning process of the patterned bottom cladding layer 330. The patterned core layer 340 is formed over the reflecting layer 320 in the reflecting-mirror region 315 and over patterned bottom cladding layer 330 in the wave-tunnel region 316, as shown in
The method 100 proceeds to step 112 by forming and patterning a top cladding layer 350 in the waveguide region 216, as shown in
Referring also to
Refractive indexes among the patterned bottom cladding layer 330, the patterned core layer 340 and the patterned top cladding layer 350 are configured to obtain a total wave reflection, for a target wavelength or wavelength range, from interfaces of the patterned core layer and the patterned bottom/top cladding layers. Thus a wave propagates inside the patterned core layer 340 in a “zigzag” way along the waveguide tunnel. In the depicted embodiment, the refractive index of the patterned core layer 340 is at least 0.025 larger than those of the patterned cladding layers 330 and 350. The patterned core layer 340 and the patterned cladding layers 330/350 are selected to be transparent to communication wavelength (600 nm-1600 nm) and have less than 2% volume and thickness variation during a subsequent bonding process, which will be described later.
In another embodiment, a waveguide structure 370 is formed in the reflecting-mirror region 315 and the wave-tunnel region 316, as shown in
The method 100 proceeds to step 114 by bonding the waveguide device 200 with an external device through a bonding stack 405. The bonding stack 405 may include solder balls or solder bumps. The bonding stack 405 may also include multiple bonding metals, such as gold (Au), gold tin (AuSn), gold indium (AuIn), or other suitable metal to achieve eutectic boding or other wafer bonding mechanism. The bonding stack 405 allows external devices to be electrically coupled to (or gain electrical access to) the waveguide device 200. The bonding stack 450 may be formed by evaporation, electroplating, printing, jetting, stud bumping, or other suitable techniques. The external device may include laser diodes, photo detectors, integrated optical circuits, or other optical components. In the present embodiment, the external device includes a vertical-cavity surface-emitting laser (VCSEL) 410.
The bonding process may involve techniques such as a flip-chip or a wire bonding. In the depicted embodiment, a flip-chip technique is applied during the bonding process to bond the VCSEL 410 to the waveguide device 200 together to form a device pair 450, as shown in
Referring to
Referring to
Based on the discussions above, it can be seen that the present disclosure offers the method 100 to fabricate a polymer waveguide on a semiconductor substrate by using photo-sensitive polymer with designed refractive index contrast and thickness. The waveguide tunnel is formed by well-known techniques, such as spin-on coating and photolithography patterning. It has been demonstrated that a uniform coverage of the patterned core layer and the patterned top cladding layers in the reflecting-mirror region, will enhance the efficiency of coupling light into the waveguide tunnel. The method 100 provides a bump-less deposition (coating) process to form the patterned core layer and the patterned top/bottom cladding layers, which significantly simplifies the fabrication process to avoid a further planarization process. The method 100 provides robust waveguide processes without imprinting by using mold. It improves waveguide device reliability and life-time.
The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present invention. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
Claims
1. A method of fabricating a polymer waveguide device, the method comprising:
- providing a substrate having an elector-interconnection region and a waveguide region;
- forming a patterned dielectric layer and a patterned redistribution layer (RDL) over the substrate in the electro-interconnection region;
- bonding the patterned RDL to a vertical-cavity surface-emitting laser (VCSEL) through a bonding stack;
- forming a reflecting-mirror trench in the substrate in the waveguide region, wherein the waveguide region has a reflecting-mirror region and a wave-tunnel region;
- forming a reflecting layer at least over the reflecting-mirror region;
- forming a patterned bottom cladding layer in the wave-tunnel region; and
- forming a patterned core layer and a patterned top cladding layer over the reflecting layer in the reflecting-mirror region and over the bottom cladding layer in the wave-tunnel region.
2. The method of claim 1, wherein the substrate includes Si with a (100) crystal orientation.
3. The method of claim 1, wherein the reflecting-mirror trench is formed with a 45° inclined slope sidewall profile in the Si (100) substrate.
4. The method of claim 3, wherein the 45° inclined slope sidewall reflecting-mirror trench is formed with a larger than 30 um depth by a wet etch process including etchants from the group consisting of ethylene diamine pyrocatechol (EDP), potassium hydroxide (KOH), and tetramethyl ammonium hydroxide (TMAH).
5. The method of claim 1, wherein the bottom and top cladding layers and the core layer each include a photo-sensitive polymer.
6. The method of claim 1, wherein the core layer is configured to have a thickness of half or larger than the depth of the reflecting-mirror trench and have a refractive index 0.025 or more larger than the refractive index of the bottom/top cladding layers.
7. The method of claim 1, wherein the bottom and top cladding layers and the core layer are selected to be transparent to a wavelength from 600 nm to 1600 nm.
8. The method of claim 1, wherein the bottom and top cladding layers and the core layer are selected to have a less than 2% volume and thickness variation during the bonding process.
9. The method of claim 1, wherein the bottom and top cladding layers and the core layer are deposited by a spin-on coating technique.
10. The method of claim 9, wherein the spin-on coating technique contains a multiple-step process, wherein the multiple-step process includes an initial spin step, a main spin step and a waiting step, wherein a spin speed of the initial spin step is slower than the main spin step.
11. The method of claim 9, wherein a spin speed of the waiting step is slower than the spin speed of the main spin step, further wherein, the spin speed of the waiting step is zero.
12. The method of claim 1, wherein the bottom and top cladding layers and the core layer are patterned by a photolithography technique, wherein the bottom cladding layer is patterned to be formed at the wave-tunnel region only, and the core layer and the top cladding layer are patterned to be formed at the reflecting-mirror region and the wave-tunnel region.
13. The method of claim 1, wherein a flip-chip technique is performed during bonding process to bond the VCSEL to the waveguide device.
14. A method of fabricating a polymer waveguide device, the method comprising:
- providing a substrate having an elector-interconnection region and a waveguide region;
- forming a patterned dielectric layer and a patterned redistribution layer (RDL) over the substrate in the electro-interconnection region;
- bonding the patterned RDL to a vertical-cavity surface-emitting laser (VCSEL) through a bonding stack;
- forming a 45° inclined sidewall reflecting-mirror trench in the substrate in the waveguide region, wherein the waveguide region having a reflecting-mirror region and a wave-tunnel region;
- forming a reflecting layer over the reflecting-mirror region;
- performing spin-on coating and lithography patterning techniques to form a patterned bottom cladding layer in the wave-tunnel region;
- performing spin-on coating and lithography patterning processes to form a patterned core layer and a patterned top cladding layer in the waveguide region.
15. The method of claim 15, wherein a vacancy space is formed above the reflecting layer in the reflecting-mirror region.
16. The method of claim 15, wherein a functionary element is built in the vacancy space.
17. A polymer waveguide device comprising:
- a substrate having an electro-interconnection region and a waveguide region;
- a patterned dielectric layer disposed over the substrate in the electro-interconnection region;
- a patterned redistribution metal layer (RDL) disposed over the dielectric layer;
- a patterned passivation layer disposed over the patterned RDL;
- a bond stack over the patterned RDL, through which a wave source connects to the patterned RDL;
- a reflecting-mirror trench in the substrate, with a 45° inclined sidewall in a reflecting-mirror region and a flat bottom in a wave-tunnel region;
- a reflecting layer disposed over the reflecting-mirror region;
- a patterned bottom cladding layer disposed over the wave-tunnel region by spin-on coating and photolithography techniques;
- a patterned core layer and a patterned top cladding layer disposed over reflecting-mirror region and the wave-tunnel region by spin-on coating and photolithography techniques.
18. The polymer waveguide device of claim 17, wherein the patterned core layer has a refractive index of about 0.025 larger than a refractive index of the patterned bottom and top cladding layers.
19. The polymer waveguide device of claim 17, wherein the patterned bottom and top cladding layers and the patterned core layer are transparent to a wavelength from 600 nm to 1600 nm.
20. The polymer waveguide device of claim 17, configured such that a light beam from the wave source passes through the patterned top cladding layer and the patterned core layer, reflect 90° on a surface of the reflecting-mirror region, and passes within the patterned core layer in the wave-tunnel region.
Type: Application
Filed: Feb 17, 2012
Publication Date: Aug 22, 2013
Patent Grant number: 9036956
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Hsin-Chu)
Inventors: Chun-Hao Tseng (Taichung City), Wan-Yu Lee (Taipei City), Hai-Ching Chen (Hsinchu City), Tien-I Bao (Dayuan Township)
Application Number: 13/399,098
International Classification: G02B 6/122 (20060101); B32B 38/10 (20060101); B32B 37/02 (20060101);