Method of manufacturing a semiconductor structure and separating the semiconductor from a substrate
A method of manufacturing a semiconductor structure is disclosed, which includes providing a substrate comprising a bottom surface and a growth surface opposite to the bottom surface; forming a buffer layer comprising a first surface which is not a C-plane substantially parallel with the bottom surface on the growth surface; forming a semiconductor structure on the buffer layer; forming at least one cavity in the buffer layer; extending the cavity along a main extending direction; separating the substrate and the semiconductor structure; wherein the main extending direction is substantially not parallel with the normal direction of the first surface.
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The disclosure relates to a manufacturing method in accordance with a semiconductor structure, especially relates to a method in accordance with separating a semiconductor structure and a sapphire substrate by wet etching.
REFERENCE TO RELATED APPLICATIONThis application claims the right of priority based on TW application Serial No. 099142037, filed on Dec. 2, 2010, and the content of which is hereby incorporated by reference in its entirety.
DESCRIPTION OF BACKGROUND ARTAs the technology improves day by day, the semiconductor optoelectronic device makes large contribution in data transmission and in energy conversion. Take the systematic application as an example, the semiconductor optoelectronic device can be applied to the optical-fiber communication, the optics storage, and the military affairs. Classified by the way of conversion of the energy, the semiconductor optoelectronic device can be separated into three types: converting the electrical power into the light emission, such as the light-emitting diode and the laser diode; converting the light signal into the electrical power, such as the light detector; converting the light radiation energy into the electrical power, such as the solar cell.
For the semiconductor optoelectronic devices, the growth substrate plays a very important role. The essential semiconductor epitaxial structures which are used to form the semiconductor optoelectronic device are formed on the growth substrate. Therefore, how to choose a suitable growth substrate often becomes an important issue which could determine the quality of the semiconductor optoelectronic device.
However, sometimes a substrate suitable for device growth thereon is not a suitable substrate for device operation. Take the light emitting diode device for example, in the conventional red light emitting diode device manufacturing process, in order to improve the device growth quality, the opaque GaAs substrate which has the lattice constant close to that of the semiconductor epitaxial structure is often chosen to be the growth substrate. However, for the light emitting diode device which is operated to emit light, the opaque growth substrate degrades the light emitting efficiency during operation. In order to satisfy the different requirements for the growth substrate and the operating substrate of the semiconductor optoelectronic device, the substrate transferring technology is developed. In other words, the semiconductor epitaxial structure grows from the growth substrate first, and the semiconductor epitaxial structure is transferred to the operating substrate for later device operation later. After adhering the semiconductor epitaxial structure to the operating substrate, the removal of the original growth substrate becomes the key of the transferring technology.
The conventional methods of removing the growth substrate mainly include dissolving the growth substrate by the etchant, cutting away the substrate by the physical method, or forming a sacrificial layer between the growth substrate and the semiconductor epitaxial structure in advance, and separating the growth substrate and the semiconductor epitaxial structure by etching away the sacrificial layer and so on. However, no matter what method mentioned above is adopted, it damages the growth substrate so the growth substrate could not be reused, and therefore cause a waste.
SUMMARY OF THE DISCLOSUREIn accordance with the description above, the present disclosure provides a manufacturing method of a semiconductor structure, especially relates to a method of separating a semiconductor structure and a sapphire substrate by wet etching.
A method of manufacturing a semiconductor structure in accordance with one embodiment of the disclosure is disclosed, which includes providing a substrate comprising a bottom surface and a growth surface opposite to the bottom surface; forming a buffer layer comprising a first surface which is not a C-plane substantially parallel with the bottom surface on the growth surface; forming a semiconductor structure on the buffer layer; forming at least one cavity in the buffer layer; extending the cavity along a main extending direction; separating the substrate and the semiconductor structure; wherein the main extending direction is substantially not parallel with the normal direction of the first surface.
Referring to
Then, as shown in
As shown in
Then, referring to
Wherein, the factors that influence the profile of the inner surfaces 13a can include but are not limited to the composition of the etchant, the crystalline orientation of the exposed surface of the cavities 13, the geometric arrangement, and the crystal defect and the structure deficiency of the GaN buffer layer 14. In general, when extending the cavities by etchant, because the etchant has different etching rates in different directions, the cavities have many extending directions. In the present embodiment, the etching rates of the KOH solution along different crystalline surfaces of the GaN buffer layer 14 are:
−C-plane>M-plane>A-plane>+C-plane
Because the first surface F of GaN buffer layer 14 is A-plane {11-20}, the right side in the figure (perpendicular to the normal of the first surface F) is +C direction of GaN buffer layer 14 and the surface on the right hand side is −C surface. When the direction the cavities 13 have the largest extension rate is the main extending direction, the cavities 13 perpendicular to the first surface F of GaN buffer layer 14 extends along +C direction (right side in the figure, perpendicular to the normal of the first surface F) as the main extending direction until the inner surface 13a close to or become a specific surface group, and the etching rate becomes very slow in the present embodiment. In other words, the specific surface group could be regarded as an etching stop surface. For GaN structure, the specific surface group is the {11-22} surface group or the {10-11} surface group. As shown in
As mentioned above, the width of the cavities 13 and the distance between the cavities 13 can be adjusted to have the nearest inner surfaces 13a of the adjacent cavities 13 contacted to each other after being etched. In the present embodiment, by controlling the etching rate and the duration, the inner surfaces 13a of the adjacent cavities 13 could be close enough to almost or totally contact to each other and the weak connection between the semiconductor structure 15 and the sapphire substrate 10 could be broken or have been broken. Meanwhile, as shown in
Besides the methods mentioned above, the cavities 13 can also be formed by dry etching such as photolithography method or inductive coupling plasma (ICP) method. The GaN buffer layer 14 and the semiconductor structure 15 thereon can be formed by metal-organic chemical vapor deposition (MOCVD), hydride vapour phase epitaxy (HVPE), or other applicable method.
Then, other embodiments are disclosed. Take the direction of the first surface F as an example, the first surface F of GaN buffer layer could be one M-plane {10-10} or R-plane {01-12} crystalline surface which is not parallel with C plane. By extending +C direction of the inner surfaces of the cavities in GaN buffer layer, a gradually connected separating part could be formed in the buffer layer. Therefore, the semiconductor structure and the substrate could be separated and the separated substrate could be intact for reuse.
Besides, the distance between the cavities 13 could be adjusted. As the embodiment mentioned above, when the buffer layer structure is etched by etchant to an etching stop surface, the etching rate becomes very slow. Take the present embodiment as an example, when taking the inner surfaces of the cavities perpendicular to GaN buffer layer (+C direction) as the bottom sides of the triangles, the etching process achieves the etching stop surfaces when the cavities become the equilateral triangles which have the included angles of 58° or 62° with the bottom sides. As shown in
D=0.5L*tan 58° or D=0.5L*tan 62°
Referring to the formula mentioned above, in order to have a faster separating rate, the distances between the cavities equal to or smaller than D are preferred. In other words, before achieving the etching stop surface, the cavities could extend along +C direction which has the faster etching rate. Besides, the cavities are not limited to rectangular shape as shown in the embodiment. Therefore, as shown in
D′≦0.5L′*tan 58° or D′≦0.5L*tan 62°
For the same reason, it is preferred to arrange the cavities satisfying the relationship to have the faster etching rate.
The embodiments mentioned above are used to describe the technical thinking and the characteristic of the invention and to make the person with ordinary skill in the art to realize the content of the invention and to practice, which could not be used to limit the claim scope of the present application. Any modification or variation according to the spirit of the present application should also be covered in the claim scope of the present disclosure.
Claims
1. A method of manufacturing a semiconductor structure, comprises:
- providing a substrate comprising a bottom surface and a growth surface opposite to the bottom surface;
- forming a buffer layer comprising a first surface which is not a C-plane substantially parallel with the bottom surface;
- forming a semiconductor structure on the first surface of the buffer layer;
- forming at least one cavity in the buffer layer;
- extending the cavity along a main extending direction; and
- separating the substrate and the semiconductor structure;
- wherein the main extending direction is substantially not parallel with the normal direction of the first surface.
2. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the main extending direction is the direction that the cavity has the largest extending rate.
3. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the main extending direction is substantially perpendicular to the normal direction of the first surface.
4. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein a plurality of cavities are arranged regularly in the buffer layer.
5. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the cavity is extended by wet etching and the etchant comprises potassium hydroxide (KOH).
6. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the material of the substrate is a poly crystal material or a single crystal material.
7. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the buffer layer is a hexagonal crystalline group system.
8. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the cavity located in the buffer layer comprises a second crystalline surface and the second crystal surface is a {11-22} surface group or a {10-11} surface group.
9. The method of manufacturing a semiconductor structure as claimed in claim 1, further comprising forming a plurality of nano-scale pillars on the substrate.
10. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the method of forming the semiconductor structure further comprising:
- forming a p-type semiconductor layer; and
- forming a n-type semiconductor layer on the p-type semiconductor layer.
11. The method of manufacturing a semiconductor structure as claimed in claim 1, wherein the substrate and the semiconductor structure are separated by providing an external force to separate the substrate and the semiconductor structure from the cavity.
12. The method of manufacturing a semiconductor structure as claimed in claim 6, wherein the material of the substrate is selected from the material of sapphire, silicon (Si), silicon carbide (SiC), zinc oxide (ZnO), lithium tantalite (LAO), or aluminum nitride (AlN).
13. The method of manufacturing a semiconductor structure as claimed in claim 7, wherein the buffer layer is a nitride semiconductor epitaxial layer.
14. The method of manufacturing a semiconductor structure as claimed in claim 13, wherein the buffer layer is a gallium nitride (GaN) semiconductor epitaxial layer.
15. The method of manufacturing a semiconductor structure as claimed in claim 10, wherein the method of forming the semiconductor structure further comprising:
- forming an active layer between the p-type semiconductor layer and the mi-type semiconductor layer.
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Type: Grant
Filed: Dec 2, 2011
Date of Patent: Mar 4, 2014
Patent Publication Number: 20120142142
Assignee: EPISTAR Corporation (Hsinchu)
Inventors: Shih-Pang Chang (Hsinchu), Hung-Chi Yang (Hsinchu), Yu-Jiun Shen (Hsinchu)
Primary Examiner: William D Coleman
Application Number: 13/310,342
International Classification: H01L 21/30 (20060101); H01L 21/46 (20060101);