Integrated circuit device

- Fuji Electric Co., Ltd.
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Description

FIG. 1 is a perspective view of the top, front and left side of an integrated circuit device showing our new design;

FIG. 2 is a top plan view thereof;

FIG. 3 is a bottom plan view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a right side elevational view thereof;

FIG. 6 is a front elevational view thereof; and,

FIG. 7 is a rear elevational view thereof.

Referenced Cited
U.S. Patent Documents
D317592 June 18, 1991 Yoshizawa
D345731 April 5, 1994 Owens et al.
D358806 May 30, 1995 Siegel et al.
D359028 June 6, 1995 Siegel et al.
D362258 September 12, 1995 Izumi et al.
D362259 September 12, 1995 Izumi et al.
4868349 September 19, 1989 Chia
5220298 June 15, 1993 Nagase
5221859 June 22, 1993 Kobayashi et al.
5585670 December 17, 1996 Isshiki et al.
Patent History
Patent number: D396211
Type: Grant
Filed: Mar 3, 1997
Date of Patent: Jul 21, 1998
Assignee: Fuji Electric Co., Ltd. (Kanagawa)
Inventors: Yoshinari Enomoto (Kanagawa), Satomi Kajiwara (Kanagawa)
Primary Examiner: Brian N. Vinson
Law Firm: Sughrue, Mion, Zinn, Macpeak & Seas, PLLC
Application Number: 0/68,462
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;