Wafer boat for use in a semiconductor wafer heat processing apparatus
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Description
FIG. 1 a perspective view of a wafer boat for use in a semiconductor wafer heat processing apparatus.
FIG. 2 a front elevational view thereof.
FIG. 3 a cross-sectional view taken along line III--III in FIG. 2.
FIG. 4 a cross-sectional view taken along line IV--IV in FIG. 2.
FIG. 5 a rear elevational view thereof.
FIG. 6 a right side view thereof.
FIG. 7 a top plan view thereof; and,
FIG. 8 a bottom plan view thereof.
Referenced Cited
U.S. Patent Documents
Patent History
Patent number: D411176
Type: Grant
Filed: Feb 5, 1998
Date of Patent: Jun 22, 1999
Assignee: Tokyo Electron Limited (Tokyo-To)
Inventor: Tomohisa Shimazu (Shiroyama-Machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/83,421
Type: Grant
Filed: Feb 5, 1998
Date of Patent: Jun 22, 1999
Assignee: Tokyo Electron Limited (Tokyo-To)
Inventor: Tomohisa Shimazu (Shiroyama-Machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/83,421
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;
International Classification: 1303;