Semiconductor element
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Description
FIG. 1 is a perspective view of a semiconductor element showing my new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 is a left side elevational view thereof;
FIG. 5 is a right side elevational view thereof;
FIG. 6 is a top plan view thereof; and,
FIG. 7 is a bottom plan view thereof.
Claims
The ornamental design for a semiconductor element, as shown and described.
Referenced Cited
U.S. Patent Documents
Other references
D298327 | November 1, 1988 | Kimura |
D356291 | March 14, 1995 | Kawamura |
5548485 | August 20, 1996 | Bethurum et al. |
D375937 | November 26, 1996 | Mergenthaler et al. |
D376133 | December 3, 1996 | Kerklaan |
D379350 | May 20, 1997 | Kerklaan |
D421597 | March 14, 2000 | Oba et al. |
D421967 | March 28, 2000 | Oba et al. |
D427159 | June 27, 2000 | Oba |
D432505 | October 24, 2000 | Oba et al. |
6166913 | December 26, 2000 | Fun et al. |
- What's SD Memory Card? PANASONIC SD TM 64MB Sep. 30, 2000.
- Sony http://www.world.sony.com/JP/News/Press/200004/00-020/Nov. 24, 2000.
Patent History
Patent number: D458907
Type: Grant
Filed: Jan 24, 2001
Date of Patent: Jun 18, 2002
Assignee: Sony Corporation (Tokyo)
Inventor: Yuji Morimiya (Tokyo)
Primary Examiner: Ted Shooman
Assistant Examiner: Selina Sikder
Attorney, Agent or Law Firm: Rader, Fishman & Grauer, PLLC
Application Number: 29/136,003
Type: Grant
Filed: Jan 24, 2001
Date of Patent: Jun 18, 2002
Assignee: Sony Corporation (Tokyo)
Inventor: Yuji Morimiya (Tokyo)
Primary Examiner: Ted Shooman
Assistant Examiner: Selina Sikder
Attorney, Agent or Law Firm: Rader, Fishman & Grauer, PLLC
Application Number: 29/136,003
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;
International Classification: 1303;