Semiconductor

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a top, front and left side perspective view of a semiconductor showing our new design,

FIG. 2 is a front elevational view thereof,

FIG. 3 is a rear elevational view thereof,

FIG. 4 is a right side elevational view thereof, a left side elevational view being identical thereto

FIG. 5 is a top plan view thereof; and,

FIG. 6 is a bottom plan view thereof.

Claims

The ornamental design for a semiconductor, as shown and described.

Referenced Cited
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Foreign Patent Documents
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982886 June 1997 JP
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D106269 September 2005 TW
Patent History
Patent number: D539761
Type: Grant
Filed: Oct 4, 2006
Date of Patent: Apr 3, 2007
Assignee: Kabushiki Kaisha Toshiba
Inventors: Ichiro Takahashi (Tokyo), Tadayuki Nishikawa (Yokohama)
Primary Examiner: Daniel Bui
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/267,014