Semiconductor

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a bottom, front and right side perspective view of a semiconductor showing my new design,

FIG. 2 is a front elevational view thereof,

FIG. 3 is a rear elevational view thereof,

FIG. 4 is a left side elevational view thereof,

FIG. 5 is a right side elevational view thereof,

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom plan view thereof.

Claims

The ornamental design for a semiconductor, as shown and described.

Referenced Cited
U.S. Patent Documents
D288922 March 24, 1987 Olla
D357462 April 18, 1995 Terasawa et al.
D358806 May 30, 1995 Siegel et al.
D359028 June 6, 1995 Siegel et al.
5557504 September 17, 1996 Siegel et al.
D397092 August 18, 1998 Sano et al.
D401912 December 1, 1998 Majumdar et al.
D448739 October 2, 2001 Iwasaki et al.
D505399 May 24, 2005 Yoshida et al.
D505400 May 24, 2005 Kawafuji et al.
20030042584 March 6, 2003 Yamaguchi
Foreign Patent Documents
D801093 November 1990 JP
D946124 February 1996 JP
D982886 June 1997 JP
D106269 September 2005 TW
Patent History
Patent number: D548202
Type: Grant
Filed: Aug 22, 2006
Date of Patent: Aug 7, 2007
Assignee: Kabushiki Kaisha Toshiba
Inventor: Ichiro Takahashi (Suginami-ku)
Primary Examiner: Daniel Bui
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/264,891