Portion of a substrate for an electronic circuit
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Description
The uneven spaced broken lines define the bounds of the claimed design and form no part thereof. The even spaced broken line showing of the substrate for an electronic circuit is for illustrative purpose only and forms no part of the claimed design.
Claims
The ornamental design for a portion of a substrate for an electronic circuit, as shown and described.
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Patent History
Patent number: D673922
Type: Grant
Filed: Jun 10, 2011
Date of Patent: Jan 8, 2013
Assignee: Kabushiki Kaisha Toshiba
Inventors: Takakatsu Moriai (Honjo), Isao Ozawa (Chigasaki), Toyokazu Eguchi (Inagi)
Primary Examiner: Selina Sikder
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/393,921
Type: Grant
Filed: Jun 10, 2011
Date of Patent: Jan 8, 2013
Assignee: Kabushiki Kaisha Toshiba
Inventors: Takakatsu Moriai (Honjo), Isao Ozawa (Chigasaki), Toyokazu Eguchi (Inagi)
Primary Examiner: Selina Sikder
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/393,921
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)