Substrate for an electronic circuit

- Kabushiki Kaisha Toshiba
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Description

The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application with color drawings(s) will be provided by the Office upon request and payment of the necessary fee.

FIG. 1 is a perspective view of a substrate for an electronic circuit showing our new design;

FIG. 2 is a rear perspective view thereof;

FIG. 3 is a front elevational view thereof;

FIG. 4 is a rear elevational view thereof;

FIG. 5 is a right side elevational view, a left side elevational view being a mirror image thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom plan view thereof.

The black circles shown in FIGS. 2 and 4 are flat on the surface of the electronic circuit.

The even dashed broken lines shown in the drawings represent portions of the substrate for an electronic circuit that form no part of the claimed design. The dashed-dot-dashed broken lines define the boundaries of the claimed design.

Claims

The ornamental design for a substrate for an electronic circuit, as shown and described.

Referenced Cited
U.S. Patent Documents
D68316 September 1925 Lader
4165584 August 28, 1979 Scherrer
D264963 June 15, 1982 McComas
D459706 July 2, 2002 Ebihara et al.
6500059 December 31, 2002 Chang et al.
D471524 March 11, 2003 Ebihara et al.
D526972 August 22, 2006 Egawa et al.
D531139 October 31, 2006 Egawa et al.
D637193 May 3, 2011 Andre et al.
8177993 May 15, 2012 Seah et al.
D670917 November 20, 2012 Blackford
D674759 January 22, 2013 Chang et al.
D686175 July 16, 2013 Gurary et al.
D686582 July 23, 2013 Krishnan et al.
D690671 October 1, 2013 Gurary et al.
D699201 February 11, 2014 Petsch
D702445 April 15, 2014 Boyle
D704155 May 6, 2014 Chang et al.
20020027762 March 7, 2002 Yamaguchi
20040179323 September 16, 2004 Litman et al.
Foreign Patent Documents
488834 May 2002 CN
1104233 March 2001 JP
1287854 December 2006 JP
1426168 October 2011 JP
1479369 September 2013 JP
1479370 September 2013 JP
30-0470075 November 2007 KR
Patent History
Patent number: D730304
Type: Grant
Filed: Aug 29, 2014
Date of Patent: May 26, 2015
Assignee: Kabushiki Kaisha Toshiba (Tokyo)
Inventors: Manabu Matsumoto (Yokosuka), Isao Ozawa (Yokosuka)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/500,867