Space transformers employing wire bonds for interconnections with fine pitch contacts

- FormFactor, Inc.

Method and apparatus for electrical testing of a device under test (DUT) that employs a connection board with signal contacts for applying test signals and a space transformer that has low pitch contacts arranged on one or more circumferential shelves that define an enclosure in the space transformer. The apparatus has a substrate with fine pitch contacts positioned such that these are within the enclosure. A set of wire bonds is used for pitch reduction by interconnecting the fine pitch contacts with the low pitch contacts arranged on the shelves. The probes are connected to the fine pitch contacts and are used to apply the test signals to a DUT by contacting its pads. In some embodiments, the fine pitch contacts may be embodied by plugs or by blind metal vias.

Skip to: Description  ·  Claims  ·  References Cited  · Patent History  ·  Patent History
Description
FIELD OF THE INVENTION

This invention relates generally to apparatus and method using wire bonds for making electrical connections between low pitch signal contacts and fine pitch contacts to probes used for applying test signals to a device under test.

BACKGROUND ART

The testing of semiconductor wafers and other types of integrated circuits (ICs), collectively known as devices under test (DUTs), needs to keep pace with technological advances. Each IC has to be individually tested, typically before dicing, in order to ensure that it is functioning properly. The demand for testing products is driven by considerations of new chip designs and higher volumes.

In particular, chips are getting smaller and they have more tightly spaced contact pads. The pads are no longer located about the circuit perimeter, but in some designs may be found within the area occupied by the circuit itself. As a result, the spacing or pitch of probe arrays required to establish electrical contact with the pads or bumps is decreasing. In addition, the requirements on planarity are increasing.

To address the increasingly fine pitch of the pads, several prior art solutions have resorted to using more effective space transformers for achieving pitch reduction and improved probe performance. Several examples of recent space transformers for probe contact assemblies are found in the patent literature, including U.S. Pat. Nos. 6,676,438 and 6,917,102 to Zhou et al. These teachings include several contact structures and production methods, including an embodiment using the flip-chip bonding process to attach the space transformer. Still other prior art, such as U.S. application Ser. No. 2006/0033516 to Rincon et al. teaches a probe and universal tester contact assemblage that is capable of testing multiple chips. This assemblage employs a wire bond between the end of a trace that is connected to a probe and a fan-out trace that belongs to an intermediate element or interposer made of a dielectric material to step up from low pitch contacts to fine pitch contacts.

In addition to the finer pitch of the pads to be tested, there has also been a move to increase the test signal frequencies. Some prior art probe devices address the coupling and noise problems arising at such higher frequencies. For example, U.S. Pat. No. 6,714,034 discusses the inclusion of an inductive (magnetic) filter to suppress AC noise on the DUT ground and U.S. application Ser. No. 2005/0012513 to Cheng et al. teaches a probe card assembly with a stiffener ring and a set of coaxial transmitters. Furthermore, U.S. application Ser. No. 2005/0099191 talks about the design of a multi-GHz probe structure for optimizing the signal path to improve bandwidth. Unfortunately, this probe structure can only address a limited number of pads and is thus only suitable for devices with a small number of pads located along the die perimeter. Devices that have a large number of fine pitch pads located along the perimeter or arranged in an array cannot be tested with such probe structure.

Clearly, as more complicated arrays of pads having a fine pitch are to be tested at high frequencies the prior art space transformers and high-frequency handling can not be integrated to produce suitable solutions. In particular, the high-frequency performance of typical wired space transformers that employ via holes and copper wires that use heads equipped with buckling beam or similar probes is insufficient. Even though probe cards employing such space transformers can be made cheaply and relatively quickly, they experience unacceptably high levels of electrical cross-talk and self-inductance with an upper bound on test frequency of about 0.9 GHz at a 3 dB bandwidth. Furthermore, such probe cards can only be made with up to about 1,500 connections, since the wiring process becomes too cumbersome at higher connection counts.

Some probe cards avoid the use of wires and employ instead a space transformer made of an organic substrate (e.g., MLC or MLD) with solder reflow connections to a connection board (typically a printed circuit board to which the test signals are applied). Such probe cards exhibit much improved high frequency performance, typically up to 3 GHz at a 3 dB bandwidth, but are hard to make and require expensive lithographic processing.

Employing wire bonding techniques and wire bonds is in general a very low-cost and mature method of making electrical connections and is used in various related contexts including interposers, probes and space transformers. For example, U.S. application Ser. No. 2002/0125584 discusses using wire bonding to ensure high bond strength between the bonding pads and conducting wires when wire-bonding chips to carriers. Specifically, the weak bonding strength problem is solved by designating a separate section of the IC pad for probing and a separate section for wire-bonding. U.S. application Ser. No. 2002/0194730 teaches how to repair probes mounted on a space transformer that were shaped and made using wire-bonding. U.S. application Ser. No. 2003/0116346 shows how to use a wire-bonding machine to make stud-bumped probes.

Although the prior art solutions individually address some of the problems associated with pitch step up and reliable connections, there is no apparatus or method that combines the requisite characteristics in a single space transformer that can be used in a probe card or testing apparatus. Specifically, what is needed is a space transformer that is compatible with high frequency test signals, easy to make, low cost and can address densely packed pads or bumps arranged in arrays.

OBJECTS AND ADVANTAGES

In view of the above prior art limitations, it is an object of the invention to provide a low-cost method and apparatus for electrically testing devices under test (DUTs) that have densely spaced arrays of contact pads or bumps. More precisely, the object is to provide such apparatus with a space transformer that takes advantage of low-cost wire bonding for interconnections with the fine pitch contacts.

It is another object of the invention, to ensure that the space transformer is capable of handling high-frequency test signals.

It is still another object of the invention to ensure that the method and apparatus can be easily integrated with any conventional head designs to take advantage of any available probe geometry.

These and other objects and advantages of the invention will become apparent from the ensuing description.

SUMMARY OF THE INVENTION

The objects and advantages of the invention are secured by a method and an apparatus for electrical testing of a device under test (DUT). The apparatus has a connection board that has signal contacts for applying test signals and a space transformer with intermediate contacts connected to the signal contacts. The space transformer has low pitch contacts that are connected to the intermediate contacts. The low pitch contacts are arranged on one or more circumferential shelves that define an enclosure. A substrate with fine pitch contacts is positioned such that the fine pitch contacts are within the enclosure. A set of wire bonds is used for pitch reduction by interconnecting the fine pitch contacts with the low pitch contacts on the shelves by any suitable wire bonding or wedge bonding including ribbon bonding for power/ground technique. The probes are connected to the fine pitch contacts and are used to apply the test signals to a DUT by contacting its pads.

In a preferred embodiment, the fine pitch contacts are made of contact plugs that are lodged or secured by epoxy in corresponding vias made in the substrate. The vias can be etched or laser machined, depending on the material of which the substrate is made. The plugs are preferably mico-electro machined, i.e., they are MEMs plugs. The substrate itself, can be made of any suitable material including ceramics, organics such as MLC or MLD, or, preferably Al2O3.

The space transformer has a lower circumferential shelf bearing a lower set of low pitch contacts and at least one upper circumferential shelf bearing an upper set of the low pitch contacts. In accordance with the invention, the one or more upper circumferential shelves are recessed or inset from the lower circumferential shelf. The lower set of low pitch contact arranged on the lower shelf usually includes a ground contact.

The wire bonds are made between the lower set of low pitch contacts and the fine pitch contacts and also between the upper set of low pitch contacts and the fine pitch contacts. In particular, the wire bonds include a short set of wire bonds interconnecting a set of the fine pitch contacts proximal the lower shelf with the lower set of low pitch contacts arranged on the lower shelf. Since this set contains the shortest wire bonds it is preferable that the ground contact be included in this set, as mentioned above. The wire bonds further include a long set of wire bonds interconnecting a set of the fine pitch contacts remote from the lower shelf with the upper set of low pitch contacts arranged on the one or more upper shelves. It is preferable for high-frequency operation that the longest wire bonds in the long set of wire bonds be at most a few millimeters in length.

In the fully assembled space transformer according to the invention, the enclosure is preferably filled with a dielectric material. This is done after all the wire bonds have been made in order to ensure stability and insulation.

The step down or pitch reduction from the intermediate contacts to the fine pitch contacts is preferably about ten to one. In numerical terms the intermediate contacts are at a pitch of about 1 mm and the fine pitch contacts are at a pitch of about 0.1 mm or 100 μm.

The apparatus of the invention is preferably employed in a probe card for testing a DUT by delivering the test signals to the pads of the DUT when the pads are contacted by the probes. The DUT is typically an integrated circuit.

The method of invention for electrically testing the DUT includes the steps of providing the connection board with signal contacts and providing the space transformer. The space transformer has intermediate contacts and low pitch contacts connected to the intermediate contacts. The low pitch contacts are arranged on one or more circumferential shelves that define the enclosure, and the signal contacts are connected to the intermediate contacts. Furthermore, a substrate with fine pitch contacts is provided and positioned such that the fine pitch contacts are within the enclosure. The fine pitch contacts are interconnected with the low pitch contacts by a set of wire bonds and the probes are connected to the fine pitch contacts. Then, the test signals are applied to the signal contacts and the probes are contacted with the pads of the DUT for performing the electrical test.

Preferably, the fine pitch contacts are made by producing vias in the substrate and lodging contact plugs in the vias. The vias can be laser machined and the plugs can be made by a micro-electro machining technique. The space transformer has a lower circumferential shelf bearing a lower set of low pitch contacts and one or more upper circumferential shelves bearing an upper set of low pitch contacts. The one or more upper circumferential shelves are recessed or inset from the lower circumferential shelf, and a set of fine pitch contacts proximal the lower shelf is interconnected with the lower set of low pitch contacts by a short set of wire bonds. A set of fine pitch contacts remote from the lower shelf is interconnected with the upper set of the low pitch contacts by a long set of wire bonds. After the interconnections are made, the enclosure is filled with the dielectric material.

A detailed description of the preferred embodiments of the invention is presented below in reference to the appended drawing figures.

BRIEF DESCRIPTION OF THE DRAWING FIGURES

FIG. 1 is a partial three-dimensional diagram illustrating an apparatus of the invention.

FIG. 2 is cross-sectional side view of a portion of the apparatus of FIG. 1.

FIG. 3 is a side cross-sectional view of an assembled apparatus according to the invention.

FIG. 4 is a cross-sectional side view of a portion of another apparatus according to the invention.

FIG. 5 is a top plan view illustrating interconnections in a space transformer according to the invention.

 DETAILED DESCRIPTION

The present invention will be best understood by first reviewing an apparatus 10 of the invention as shown in a partial three-dimensional diagram of FIG. 1. Apparatus 10 has a space transformer 12 with intermediate contacts 14 located on a ledge 16. Space transformer also has low pitch contacts 18 that are arranged on a lower circumferential shelf 20 and an upper circumferential shelf 22. Specifically, a lower set 18A of low pitch contacts 18 is located on lower circumferential shelf 20 and an upper set 18B of low pitch contacts 18 is located on upper circumferential shelf 22. Furthermore, upper shelf 22 is recessed or inset from lower shelf 20 to enable easy access by wire bonding equipment to low pitch contacts 18 on both shelves.

Ledge 16 and shelves 20, 22 extend circumferentially (only partially shown in FIG. 1) to define a structure 24 that has an internal enclosure 26. Any suitable, mechanically stable dielectric material or materials can be used to construct structure 24 that includes ledge 16 and shelves 20, 22. For example, structure 24 can be made layer-by-layer, thus defining lower shelf 20 first, then upper shelf 22 and finally ledge 16. During the formation of the structure, embedded electrical connections 28 are made to connect intermediate contacts 14 with corresponding low pitch contacts 18.

Space transformer 12 has a substrate 30 with a number of fine pitch contacts 32. Substrate 30 is positioned below structure 24 such that fine pitch contacts 32 are within enclosure 26. Substrate 30 can be permanently attached to structure 24 by any suitable bonding method. It should be noted that in some embodiments it is useful when structure 24 is removable. For example, this is of value when substrate 30 is a mini printed circuit board and the contacts 32 are blind metal vias.

A set of wire bonds 34 is used for pitch reduction by interconnecting fine pitch contacts 32 with low pitch contacts 18 on shelves 20, 22. Wire bonding is a technique well known in the art and typically involves one of the following three major techniques: thermocompression bonding, ultrasonic bonding, and thermosonic bonding. In general, ultrasonic bonding will be preferred for Aluminum wire bonding, and thermosonic bonding will be preferred for Au wire bonding. In order to accrue the full benefit of the invention including low electric cross-talk and low self-inductance, the maximum length of any particular wire bond 34 should not exceed a few millimeters and preferably be at most 5 millimeters. The specific techniques for bonding to low pitch contacts 18 include wire bonding or wedge bonding, including ribbon bonding used for power/ground technique.

In the preferred embodiment, fine pitch contacts 32 are made of contact plugs 36 that are lodged or secured by epoxide in corresponding vias 38 in substrate 30. Vias 38 can be etched or laser machined, depending on the material of which substrate 30 is made. For example, substrate 30 can be made of a ceramic or an organic such as MLC or MLD in which case the “plugs” equivalent would be electroplated vias. In this case there would be no need for MEMS plugs and epoxide. Preferably, however, substrate 30 is made of Al2O3 so that it lends itself well to laser machining, which is the preferred technique due to its high accuracy and speed. Plugs 36 are preferably mico-electro machined, i.e., they are MEMs plugs made of a nickel and cobalt alloy plated with gold. In an alternative embodiment, vias 38 are filled with metal and thus themselves constitute fine pitch contacts 32. In other words, vias 38 are blind metal vias and serve as fine pitch contacts 32.

A number of probes 40 are connected to fine pitch contacts 32. Specifically, probes 40 are connected to the bottoms of plugs 36 or blind metal vias 38, depending on the embodiment. Although in the embodiment shown, probes 40 are non-linear, it will be appreciated by one skilled in the art that they can be of any variety, including buckling beam probes. Moreover, probes 40 can be held together in any suitable mechanical retention device or be otherwise configured in a suitable head unit. Such head unit can be removable or permanently attached to space transformer 12, depending on application.

Referring now to the partial cross-sectional side view of FIG. 2 for more detail, we see that apparatus 10 also has a connection board 42 with signal contacts 44. Typically, connection board 42 is a printed circuit board (PCB) with appropriate primary contacts 46 for applying test signals 48. Primary contacts 46 are electrically connected to corresponding signal contacts 44 for delivering test signals 48. Test signals 48 are usually generated by a testing circuit (not shown) and applied to primary contacts 46 with the aid of spring pins or other suitable mechanism.

Intermediate contacts 14 of space transformer 12 are connected to signal contacts 44. In the present embodiment, this is accomplished with solder reflow junctions 50. Thus, primary contacts 46 are in electrical communication with corresponding low pitch contacts 18 on shelves 20, 22. More specifically, lower set of low pitch contacts 18A arranged on lower circumferential shelf 20 and upper set of low pitch contacts 18B arranged on upper circumferential shelf 22 are in electrical communication with primary contacts 46 via signal contacts 44, intermediate contacts 14 and embedded electrical connections 28. Therefore, test signals 48 can be delivered directly to the appropriate low pitch contacts 18 of space transformer 12.

Wire bonds 34 between lower set of low pitch contacts 18A and fine pitch contacts 32 and also between the upper set of low pitch contacts 18B and fine pitch contacts 32 are made in accordance with a certain scheme. In particular, wire bonds 34 include a short set of wire bonds 34A interconnecting a set of fine pitch contacts 32A proximal lower shelf 20 with lower set of low pitch contacts 18A arranged on lower shelf 20. Since this set contains the shortest wire bonds it is preferable that the ground contact be included in this set.

Wire bonds 34 further include a long set of wire bonds 34B interconnecting a set of the fine pitch contacts 32B remote from lower shelf 20 with upper set of low pitch contacts 18B arranged on upper shelf 22. It is preferable for high-frequency operation that the longest wire bonds in long set of wire bonds 32B be at most 5 millimeters in length. This is done in order to reduce cross-talk between wire bonds 34 and self-inductance to permit the application of high frequency test signals 48, e.g., test signals in the range of several GHz.

In FIG. 2, reference Δ denotes the pitch of intermediate contacts 14 and reference δ denotes the pitch of fine pitch contacts 32. In accordance with the invention, the step down or pitch reduction from pitch Δ of intermediate contacts 14 to pitch δ of fine pitch contacts 32 is preferably about ten to one. In numerical terms Δ is on the order of about 1 mm and δ is on the order of about 0.1 mm or 100 μm. For peripheral IC pad test application the pitch is as small as 35 μm today. For full grid array flip-chip bump test the minimum pitch is about 140 μm today.

FIG. 3 is a cross-sectional side view of a fully assembled apparatus 10. In this fully assembled state, space transformer 12 has its enclosure 26 filled with a dielectric material 52. This is done after all wire bonds 34 have been made in order to ensure stability and insulation. Of course, the wires used in bonds 34 can be already insulated, e.g., with a non-conductive ink or by other means, thus making the presence of material 52 unnecessary. However, non-insulated wires can also be used, and in this case material 52 must be used to avoid shorts. Material 52 also provides mechanical stability to space transformer 12 and apparatus 10 as a whole. This is especially important, to sustain the aggregate forces acting on probes 40 and apparatus 10 during normal operation due to the deflection of probes 40. Such forces can be quite large—for example, with 2000 probes 40 each exerting 10 grams of force the total force pushing on the assembly of apparatus 10 is about 20 kg. It should be noted that at the present time, as many as 5,000 probes 40 can be used in one apparatus 10.

Apparatus 10 is used for electrical testing of a device under test (DUT) 54. DUT 54 has a number of pads or bumps 56, which have to be contacted by probes 40 to apply test signals 48 thereto and thus conduct the test. Apparatus 10 is preferably employed in a probe card for testing integrated circuits with high-frequency test signals 48. For example, DUT 54 is an integrated circuit on a wafer that requires testing prior to dicing. Alternatively, DUT 54 is an electronic device or circuit that is already mounted and whose functionality needs to be verified by applying test signals 48 to a number of its bumps or pads 56.

FIG. 4 is a cross-sectional side view of a portion of an apparatus 100 according to the invention. Apparatus 100 employs a space transformer 102 with a structure 104 that has three circumferential shelves 106, 108, 110 bearing low pitch contacts 112. A ledge 114 of structure 104 bears connection intermediate contacts 116 that are connected to corresponding low pitch contacts 112. A connection board 118 with signal contacts 120 that are reflow soldered to intermediate contacts 116 is used to deliver test signals to low pitch contacts 112.

Space transformer 102 employs a mini printed circuit board 122 as a substrate. Board 122 is attached to structure 104 as shown and positioned such that its set of fine pitch contacts 124 is contained within an enclosure 126 defined by shelves 106, 108, 110. Board 122 has a set of blind metal vias 128 that serve as fine pitch contacts. A set of wire bonds 130 interconnects fine pitch contacts 124 or the tops of blind vias 128 with low pitch contacts 112. As before, any suitable wire bonding technique can be employed to accomplish this connection. In this embodiment, the probes (not shown) are attached to the bottoms of vias 128.

As in the previous embodiment, it is preferable to keep the lengths of wire bonds 130 as short as possible, and most preferably under 5 mm. This limitation places the toughest restrictions on wire bonds 130 interconnecting low pitch contacts 112 from top shelf 110 and vias 128 that are remote from bottom shelf 106. In addition, in this embodiment it is essential to use insulated wire for wire bonds 130 to further counteract any possibility of shorts.

As before, a dielectric material 132 is used for potting wire bonds 130. Preferably, the potting is performed sequentially by first interconnecting and potting the shortest wire bonds 130 between lowest shelf 106 and vias 128 closest to structure 104. Then repeating the process for the second shelf 108 wire bonds and finally for third shelf 110 wire bonds.

In any of the above embodiments, or in still other embodiments, it is important to optimize the localization of low pitch contacts and fine pitch contacts. One approach involves staggering of contacts, as shown in the top plan view of FIG. 5. In this example a space transformer 140 has a structure 142 with three circumferential shelves 144, 146, 148. Low pitch contacts 150 are staggered with respect to each other and with respect to fine pitch contacts 152. Thus, interconnections performed with wire bonds 154 are non-overlapping because the wires from different shelves 144, 146, 148 tend to fall in-between each other. It should be noted that appropriate potting can be employed in this embodiment to further aid in accommodating more shelves and making more secure over-arching wire bonds 154.

A person skilled in the art will recognize that the above are merely a few exemplary embodiments and that many other embodiments of the apparatus and method are possible. Therefore, the scope of the invention should be judged by the appended claims and their legal equivalents.

Claims

1. An apparatus for electrical testing, comprising:

a) a connection board having signal contacts for applying test signals;
b) a space transformer having intermediate contacts connected to said signal contacts, said space transformer further having low pitch contacts connected to said intermediate contacts and arranged on at least one circumferential shelf, said at least one circumferential shelf defining an enclosure;
c) a substrate having fine pitch contacts and positioned such that said fine pitch contacts are within said enclosure;
d) a set of wire bonds interconnecting said fine pitch contacts with said low pitch contacts;
e) probes connected to said fine pitch contacts.

2. The apparatus of claim 1, wherein said fine pitch contacts comprise contact plugs lodged in corresponding vias in said substrate.

3. The apparatus of claim 2, wherein said vias are laser machined and said plugs are made by a micro-electro machining technique.

4. The apparatus of claim 2, wherein said substrate comprises a material selected from the group consisting of ceramics, organics and Al2O3.

5. The apparatus of claim 1, wherein said fine pitch contacts comprise blind metal vias.

6. The apparatus of claim 1, wherein said space transformer comprises a lower circumferential shelf bearing a lower set of said low pitch contacts and at least one upper circumferential shelf bearing an upper set of said low pitch contacts, said at least one upper circumferential shelf being inset from said lower circumferential shelf.

7. The apparatus of claim 6, wherein said lower set of said low pitch contacts comprises a ground contact.

8. The apparatus of claim 6, wherein said set of wire bonds comprises a short set of wire bonds interconnecting a set of said fine pitch contacts proximal said lower shelf with said lower set of said low pitch contacts.

9. The apparatus of claim 6, wherein said set of wire bonds comprises a long set of wire bonds interconnecting a set of said fine pitch contacts remote said lower shelf with said upper set of said low pitch contacts.

10. The apparatus of claim 9, wherein said long set of wire bonds comprises wire bonds of at most 5 millimeters in length.

11. The apparatus of claim 1, wherein said enclosure is filled with a dielectric material.

12. The apparatus of claim 1, wherein a pitch reduction from said intermediate contacts to said fine pitch contacts is about ten to one.

13. The apparatus of claim 1, employed in a probe card for testing a device under test by delivering said test signals to pads of said device under test by contacting said pads with said probes.

14. The apparatus of claim 13, wherein said device under test comprises an integrated circuit.

15. A method for electrically testing a device under test, said method comprising:

a) providing a connection board having signal contacts;
b) providing a space transformer having intermediate contacts and low pitch contacts connected to said intermediate contacts, said low pitch contacts being arranged on at least one circumferential shelf, said at least one circumferential shelf defining an enclosure;
c) connecting said signal contacts to said intermediate contacts;
d) providing a substrate having fine pitch contacts and positioned such that said fine pitch contacts are within said enclosure;
e) interconnecting said fine pitch contacts with said low pitch contacts by a set of wire bonds;
f) connecting probes to said fine pitch contacts;
g) applying test signals to said signal contacts; and
h) contacting said probes with pads of said device under test for electrically testing said device under test.

16. The method of claim 15, wherein said fine pitch contacts are made by producing vias in said substrate and lodging contact plugs in said vias.

17. The method of claim 16, wherein said vias are laser machined and said plugs are made by a micro-electro machining technique.

18. The method of claim 15, wherein said space transformer comprises a lower circumferential shelf bearing a lower set of said low pitch contacts and at least one upper circumferential shelf bearing an upper set of said low pitch contacts, said at least one upper circumferential shelf being inset from said lower circumferential shelf, and wherein said method further comprises interconnecting a set of said fine pitch contacts proximal said lower shelf with said lower set of said low pitch contacts by a short set of wire bonds, and interconnecting a set of said fine pitch contacts remote said lower shelf with said upper set of said low pitch contacts by a long set of wire bonds.

19. The method of claim 15, further comprising filling said enclosure with a dielectric material.

20. An apparatus for electrical testing comprising:

a layered space transformer;
a first layer of said layered space transformer comprising a substrate;
said substrate comprising a plurality of fine pitch contacts;
a second layer of said layered space transformer comprising a structure disposed around an outside circumference of said substrate;
said structure comprising at least one shelf, said shelf comprising a plurality of low pitch contacts;
said structure further comprising a ledge disposed above said shelf;
said ledge comprising a plurality of intermediate contacts;
said intermediate contacts electrically connected to corresponding said low pitch contacts via electrical connections embedded within said structure; and
a plurality of bonds interconnecting said fine pitch contacts with corresponding said low pitch contacts.

21. The apparatus of claim 20 further comprising an enclosure defined by said shelf.

22. The apparatus of claim 21 wherein said fine pitch contact is within said enclosure.

23. The apparatus of claim 21 further comprising a dielectric material filling the enclosure.

24. The apparatus of claim 20 comprising a pitch reduction from said intermediate contact to said fine pitch contact of about ten to one.

25. The apparatus of claim 20 further comprising at least one signal contact and wherein said signal contact is connected to said intermediate contact.

26. The apparatus of claim 25 wherein said connection between said signal contact and said intermediate contact comprises a solder reflow junction.

27. The apparatus of claim 25 further comprising a connection board connected to said signal contact.

28. The apparatus of claim 27 wherein said connection board comprises a printed circuit board.

29. The apparatus of claim 27 wherein said connection board comprises a primary contact connected to said signal contact.

30. The apparatus of claim 27 further comprising a probe connected to said fine pitch contact.

31. The apparatus of claim 20 wherein said shelf comprises a circumferential shelf.

32. The apparatus of claim 20 comprising an upper shelf and a lower shelf.

33. The apparatus of claim 32 comprising a lower set of low pitch contacts located on said lower shelf and an upper set of low pitch contacts located on said upper shelf.

34. The apparatus of claim 33 comprising a short set of wire bonds interconnecting a set of said fine pitch contacts proximal to said lower shelf with said lower set of low pitch contacts.

35. The apparatus of claim 33 wherein said lower set of low pitch contacts comprises a ground contact.

36. The apparatus of claim 33 comprising a long set of wire bonds interconnecting a set of said fine pitch contacts remote to said lower shelf with said upper set of said low pitch contacts.

37. The apparatus of claim 32 wherein said upper shelf is recessed from said lower shelf.

38. The apparatus of claim 32 wherein said shelves are made layer-by-layer.

39. The apparatus of claim 20 wherein said substrate is positioned below said shelf.

40. The apparatus of claim 39 wherein said substrate is permanently attached to said shelf.

41. The apparatus of claim 39 wherein said substrate is removably attached to said shelf.

42. The apparatus of claim 20 wherein said substrate comprises a circuit board.

43. The apparatus of claim 20 wherein said fine pitch contact comprises a via.

44. The apparatus of claim 43 wherein said via comprises a blind via.

45. The apparatus of claim 44 wherein said blind via comprises a blind metal via.

46. The apparatus of claim 20 wherein said wire bond is equal to or less than 5 millimeters.

47. The apparatus of claim 20 wherein said at least one fine pitch contact comprising a contact plug.

48. The apparatus of claim 47 further comprising a via, wherein said contact plug is secured in said substrate by said via.

49. The apparatus of claim 47 wherein said plug is micro-electro machined.

50. The apparatus of claim 20 wherein said substrate comprises aluminum oxide.

51. The apparatus of claim 20 wherein said substrate comprises ceramic.

52. The apparatus of claim 20 wherein said substrate comprises organics.

53. The apparatus of claim 20 wherein said wire bond comprises a short wire bond for bonding.

54. The apparatus of claim 20 wherein said apparatus is employed in a probe card.

55. The apparatus of claim 20 comprising three shelves.

56. The apparatus of claim 20 comprising a plurality of low pitch contacts staggered with respect to a plurality of fine pitch contacts.

57. The apparatus of claim 20 wherein said bond comprises a wire bond.

58. A method for testing a device under test comprising:

providing a layered space transformer comprising a first layer of the layered space transformer having a substrate, a second layer of the layered space transformer having a structure disposed around an outside circumference of the substrate, the structure comprising at least one shelf, the shelf comprising a plurality of low pitch contacts, the structure further comprising a ledge disposed above the shelf, the ledge comprising a plurality of intermediate contacts;
disposing a plurality of fine pitch contacts on the substrate;
interconnecting the low pitch contacts to corresponding intermediate contacts via electrical connections embedded within the structure;
interconnecting the fine pitch contacts with corresponding low pitch contacts by at least one wire bond; and
applying a high frequency test signal to a device under test.

59. The method of claim 58 further comprising connecting the intermediate contact to a signal contact located on a connection board.

60. The method of claim 59 further comprising applying a test signal to the signal contact.

61. The method of claim 58 further comprising connecting at least one probe to the fine pitch contact.

62. The method of claim 61 further comprising contacting the probe with a pad of the device under test for electrically testing the device under test.

63. The method of claim 58 wherein said fine pitch contact comprises producing a via in said substrate and lodging a contact plug in the via.

64. The method of claim 63 further comprising laser-machining the via.

65. The method of claim 63 further comprising micro-electro machining the plug.

66. The method of claim 58 wherein the space transformer comprises a lower shelf bearing a lower set of low pitch contacts and at least one upper shelf bearing an upper set of the low pitch contacts.

67. The method of claim 66 further comprising interconnecting a set of fine pitch contacts proximal to the lower shelf with the lower set of low pitch contacts by a short set of wire bonds.

68. The method of claim 66 further comprising interconnecting a set of fine pitch contacts remote to the lower shelf with the upper set of low pitch contacts by a long set of wire bonds.

Referenced Cited
U.S. Patent Documents
3518612 June 1970 Dunman et al.
3599093 August 1971 Oates
3710251 January 1973 Hagge et al.
3812311 May 1974 Kvaternik
4027935 June 7, 1977 Byrnes et al.
4115736 September 19, 1978 Tracy
4116523 September 26, 1978 Coberly et al.
4423376 December 27, 1983 Byrnes et al.
4525697 June 25, 1985 Jones et al.
4532423 July 30, 1985 Tojo et al.
4567433 January 28, 1986 Ohkubo et al.
4593961 June 10, 1986 Cosmo
4618767 October 21, 1986 Smith et al.
4618821 October 21, 1986 Lenz
4706019 November 10, 1987 Richardson
4730158 March 8, 1988 Kasai et al.
4747698 May 31, 1988 Wickramasinghe et al.
4757255 July 12, 1988 Margozzi
4772846 September 20, 1988 Reeds
4773877 September 27, 1988 Kruger et al.
4807159 February 21, 1989 Komatsu et al.
4901013 February 13, 1990 Benedetto et al.
4967148 October 30, 1990 Doemens et al.
4973903 November 27, 1990 Schemmel
5015947 May 14, 1991 Chism
5026291 June 25, 1991 David
5030318 July 9, 1991 Reche
5061192 October 29, 1991 Chapin et al.
5067007 November 19, 1991 Otsuka et al.
5145384 September 8, 1992 Asakawa et al.
5205739 April 27, 1993 Malo et al.
5207585 May 4, 1993 Byrnes
5225771 July 6, 1993 Leedy
5230632 July 27, 1993 Baumberger et al.
5237743 August 24, 1993 Busacco et al.
5354205 October 11, 1994 Feigenbaum et al.
5399982 March 21, 1995 Driller
5422574 June 6, 1995 Kister
5430614 July 4, 1995 Difrancesco
5436571 July 25, 1995 Karasawa
5468994 November 21, 1995 Pendse
5476211 December 19, 1995 Khandros
5531022 July 2, 1996 Beaman et al.
5576631 November 19, 1996 Stowers et al.
5632631 May 27, 1997 Fjelstad et al.
5635846 June 3, 1997 Beaman et al.
5642056 June 24, 1997 Nakajima et al.
5644249 July 1, 1997 Kister
5676599 October 14, 1997 Ricks et al.
5701085 December 23, 1997 Malladi et al.
5720098 February 24, 1998 Kister
5742174 April 21, 1998 Kister et al.
5751157 May 12, 1998 Kister
5764070 June 9, 1998 Pedder
5764072 June 9, 1998 Kister
5764409 June 9, 1998 Colvin
5767691 June 16, 1998 Verkuil
5772451 June 30, 1998 Dozier, II et al.
5773987 June 30, 1998 Montoya
5802699 September 8, 1998 Fjelstad et al.
5806181 September 15, 1998 Khandros et al.
5821763 October 13, 1998 Beaman et al.
5829128 November 3, 1998 Eldridge et al.
5832601 November 10, 1998 Eldridge et al.
5847936 December 8, 1998 Forehand et al.
5852871 December 29, 1998 Khandros
5864946 February 2, 1999 Eldridge et al.
5884395 March 23, 1999 Dabrowiecki et al.
5892539 April 6, 1999 Colvin
5914613 June 22, 1999 Gleason et al.
5917707 June 29, 1999 Khandros et al.
5923178 July 13, 1999 Higgins et al.
5926951 July 27, 1999 Khandros et al.
5932323 August 3, 1999 Throssel
5934914 August 10, 1999 Fjelstad et al.
5936421 August 10, 1999 Stowers et al.
5945836 August 31, 1999 Sayre et al.
5952843 September 14, 1999 Vinh
5969533 October 19, 1999 Takagi
5970167 October 19, 1999 Colvin
5974662 November 2, 1999 Eldridge et al.
5994152 November 30, 1999 Khandros et al.
6027630 February 22, 2000 Cohen
6029344 February 29, 2000 Khandros et al.
6031282 February 29, 2000 Jones et al.
6064215 May 16, 2000 Kister
6066957 May 23, 2000 Van Loan et al.
6071630 June 6, 2000 Tomaru et al.
6086386 July 11, 2000 Fjelstad et al.
6133072 October 17, 2000 Fjelstad
6184576 February 6, 2001 Jones et al.
6204674 March 20, 2001 Dabrowiecki et al.
6205660 March 27, 2001 Fjelstad et al.
6215320 April 10, 2001 Parrish
6218203 April 17, 2001 Khoury et al.
6246245 June 12, 2001 Akram et al.
6246247 June 12, 2001 Eldridge et al.
6247228 June 19, 2001 Distefano et al.
6255126 July 3, 2001 Mathieu et al.
6259261 July 10, 2001 Engelking et al.
6278284 August 21, 2001 Mori et al.
6292003 September 18, 2001 Fredrickson et al.
6334247 January 1, 2002 Beaman et al.
6336259 January 8, 2002 Eldridge et al.
6344753 February 5, 2002 Takada et al.
6411112 June 25, 2002 Das et al.
6414502 July 2, 2002 Sayre et al.
6419500 July 16, 2002 Kister
6420887 July 16, 2002 Kister et al.
6424164 July 23, 2002 Kister
6433571 August 13, 2002 Montoya
6437584 August 20, 2002 Gleason et al.
6441315 August 27, 2002 Eldridge et al.
6443784 September 3, 2002 Kimoto
6482013 November 19, 2002 Eldridge et al.
6483328 November 19, 2002 Eldridge et al.
6486689 November 26, 2002 Nishikawa
6496026 December 17, 2002 Long et al.
6525552 February 25, 2003 Kister
6529021 March 4, 2003 Yu et al.
6530148 March 11, 2003 Kister
6538336 March 25, 2003 Secker et al.
6566898 May 20, 2003 Theissen et al.
6570396 May 27, 2003 Kister
6573738 June 3, 2003 Matsuo et al.
6575767 June 10, 2003 Satoh et al.
6576485 June 10, 2003 Zhou et al.
6586955 July 1, 2003 Fjelstad et al.
6615485 September 9, 2003 Eldridge et al.
6624648 September 23, 2003 Eldridge et al.
6633176 October 14, 2003 Takemoto et al.
6641430 November 4, 2003 Zhou et al.
6646455 November 11, 2003 Maekawa et al.
6676438 January 13, 2004 Zhou et al.
6677245 January 13, 2004 Zhou et al.
6690185 February 10, 2004 Khandros et al.
6707311 March 16, 2004 Hohenwarter
6727719 April 27, 2004 Liao et al.
6731123 May 4, 2004 Kimoto
6765228 July 20, 2004 Lin et al.
6768331 July 27, 2004 Longson et al.
6825422 November 30, 2004 Eldridge et al.
6842023 January 11, 2005 Yoshida et al.
6847221 January 25, 2005 Kimoto et al.
6853208 February 8, 2005 Okubo et al.
6881974 April 19, 2005 Wood et al.
6890185 May 10, 2005 Kister et al.
6897666 May 24, 2005 Swettlen et al.
D507198 July 12, 2005 Kister
6917102 July 12, 2005 Zhou et al.
6917525 July 12, 2005 Mok et al.
D510043 September 27, 2005 Kister
6945827 September 20, 2005 Grube et al.
6956389 October 18, 2005 Mai
6965244 November 15, 2005 Miller
6965245 November 15, 2005 Kister et al.
6970005 November 29, 2005 Rincon et al.
7015707 March 21, 2006 Cherian
7036221 May 2, 2006 Higashida et al.
7046021 May 16, 2006 Kister
7059865 June 13, 2006 Kister et al.
7064564 June 20, 2006 Kister et al.
7068057 June 27, 2006 Tervo et al.
D525207 July 18, 2006 Kister et al.
7071715 July 4, 2006 Shinde et al.
7073254 July 11, 2006 Eldridge et al.
7078921 July 18, 2006 Haga et al.
7088118 August 8, 2006 Liu et al.
7091729 August 15, 2006 Kister
7108546 September 19, 2006 Miller et al.
7109731 September 19, 2006 Gleason et al.
7143500 December 5, 2006 Byrd
7148709 December 12, 2006 Kister
7150658 December 19, 2006 Chien
7173441 February 6, 2007 Kister et al.
7189078 March 13, 2007 Kister et al.
7202682 April 10, 2007 Cooper et al.
7217138 May 15, 2007 Kister et al.
7218127 May 15, 2007 Cooper et al.
7218131 May 15, 2007 Tanioka et al.
7225538 June 5, 2007 Eldridge et al.
7227371 June 5, 2007 Miller
7265565 September 4, 2007 Chen et al.
7274195 September 25, 2007 Takemoto et al.
7281305 October 16, 2007 Iyer
7285966 October 23, 2007 Lee et al.
7312617 December 25, 2007 Kister
7345492 March 18, 2008 Kister
7417447 August 26, 2008 Kister
7436192 October 14, 2008 Kister
7511523 March 31, 2009 Chen et al.
7514948 April 7, 2009 Kister
7649367 January 19, 2010 Kister
7659739 February 9, 2010 Kister
7671610 March 2, 2010 Kister
7733101 June 8, 2010 Kister
7759949 July 20, 2010 Kister
7786740 August 31, 2010 Kister
8230593 July 31, 2012 Kister
20010012739 August 9, 2001 Grube et al.
20010040460 November 15, 2001 Beaman et al.
20020070743 June 13, 2002 Felici et al.
20020125584 September 12, 2002 Umehara et al.
20020153913 October 24, 2002 Okubo et al.
20020190738 December 19, 2002 Beaman et al.
20020194730 December 26, 2002 Shih et al.
20030027423 February 6, 2003 Zhou et al.
20030116346 June 26, 2003 Forster et al.
20040036493 February 26, 2004 Miller
20040046579 March 11, 2004 Chraft et al.
20040104737 June 3, 2004 Haga et al.
20040119485 June 24, 2004 Koch et al.
20040239352 December 2, 2004 Mizoguchi
20050012513 January 20, 2005 Cheng et al.
20050179458 August 18, 2005 Chen et al.
20050184743 August 25, 2005 Kimura
20050189955 September 1, 2005 Takemoto et al.
20060033516 February 16, 2006 Rincon et al.
20060040417 February 23, 2006 Eldridge et al.
20060073712 April 6, 2006 Suhir
20060082380 April 20, 2006 Tanioka et al.
20060170440 August 3, 2006 Sudin
20060171425 August 3, 2006 Lee et al.
20060186905 August 24, 2006 Kohashi et al.
20060208752 September 21, 2006 Tanioka et al.
20060261828 November 23, 2006 Cram et al.
20070145989 June 28, 2007 Zhu et al.
20070167022 July 19, 2007 Tsai et al.
20070229100 October 4, 2007 Miller
20080074132 March 27, 2008 Fan et al.
20090201041 August 13, 2009 Kister
20100109691 May 6, 2010 Kister
20100176832 July 15, 2010 Kister
20100182030 July 22, 2010 Kister
20100182031 July 22, 2010 Kister
20100289512 November 18, 2010 Kister
20110006796 January 13, 2011 Kister
20110062978 March 17, 2011 Kister
20110273198 November 10, 2011 Kister
20110273199 November 10, 2011 Kister
Foreign Patent Documents
4237591 May 1994 DE
0144682 June 1985 EP
0764352 May 2004 EP
63-307678 December 1988 JP
01128535 May 1989 JP
7-021968 January 1995 JP
7-333232 December 1995 JP
10-506238 June 1998 JP
10-221374 August 1998 JP
11241690 August 1999 JP
WO 8704568 July 1987 WO
WO 92/10010 June 1992 WO
WO 96/15458 May 1996 WO
WO 96/37332 November 1996 WO
WO 09743653 November 1997 WO
WO 01/09623 February 2001 WO
Other references
  • Sporck, Nicholas , “A New Probe Card Technology Using Compliant Microsprings”, Proceedings 1997 IEEE International Test Conference Nov. 1, 1997 , 527-532.
  • Levy, Larry, “Water Probe TM System”, Southwest Workshop formfactor inc. Jun. 1997, 1-19.
Patent History
Patent number: RE44407
Type: Grant
Filed: Dec 23, 2009
Date of Patent: Aug 6, 2013
Assignee: FormFactor, Inc. (Livermore, CA)
Inventor: January Kister (Portola Valley, CA)
Primary Examiner: Arleen M Vazquez
Application Number: 12/646,661
Classifications
Current U.S. Class: Probe Contact Enhancement Or Compensation (324/754.11); Integrated Circuit Die (324/762.03); Contact Probe (324/754.03); Probe Card (324/756.03)
International Classification: G01R 31/20 (20060101);