Patents Issued in September 20, 2001
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Publication number: 20010023055Abstract: Firing process and apparatus for uniformly heat-treating a substrate having a film-forming composition thereon, wherein the substrate is subjected to a first soaking step in which the substrate is held for a predetermined time in a first heating chamber whose temperature is maintained at a first value, so that the temperature within the substrate is held at the first value evenly throughout an entire mass of the substrate, and after feeding of the substrate into a second heating chamber whose temperature is maintained at a predetermined second value which is different from the first value by a predetermined difference, the substrate is subjected to a second soaking step in which the substrate is held for a second predetermined time in the second heating chamber, so that the temperature within the substrate is held at the second value evenly throughout the entire mass of the substrate.Type: ApplicationFiled: May 22, 2001Publication date: September 20, 2001Applicant: Noritake Co., Ltd. and Kyushu Noritake Co., Ltd.Inventors: Susumu Sakamoto, Hiroshi Oshima, Hiroyuki Mori, Hironobu Ichihara, Yoji Sato
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Publication number: 20010023056Abstract: A dental device intended for performing a dental process with a program control that controls at least one parameter curve of the dental device during the process. It includes a cut-off apparatus that turns the dental device off at some time after the beginning of the process when the process has concluded. The device includes a pager that is connected to the program control, and the pager is activateable near the end of the process or directly upon conclusion of the process. Preferably, the pager is a wireless pager.Type: ApplicationFiled: March 16, 2001Publication date: September 20, 2001Applicant: Ivoclar Vivadent AGInventors: Robert Grunenfelder, Johanner Lorunser, Gottfried Rohner
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Publication number: 20010023057Abstract: In the case of a device for identifying caries, plaque, bacterial infection, concretions, tartar and other fluorescent substances on teeth, having means (2) for generating stimulating radiation (A) which is to be directed onto a tooth-tissue region that is to be investigated, and detection means (7) and evaluation means for detecting and evaluating fluorescent radiation (F) that is generated by the irradiated tooth-tissue region in response to the irradiation, a beam splitter, which is arranged in the optical path between the means (2) for generating the stimulating radiation (A) and the tooth-tissue region to be investigated and which reflects the stimulating radiation (A) in the direction of the tooth-tissue region and substantially lets through the fluorescent radiation (F), is formed by the planar rear side (4) of a substantially hemispherical lens (3). In this way a clearly more compact optical diagnostic device is rendered possible.Type: ApplicationFiled: March 16, 2001Publication date: September 20, 2001Inventor: Hack Alexander
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Publication number: 20010023058Abstract: Color measuring systems and methods such as for determining the color or other characteristics of teeth are disclosed. Perimeter receiver fiber optics are spaced apart from a central source fiber optic and receive light reflected from the surface of the object/tooth being measured. Light from the perimeter fiber optics pass to a variety of filters. The system utilizes the perimeter receiver fiber optics to determine information regarding the height and angle of the probe with respect to the object/tooth being measured. Under processor control, the color measurement may be made at a predetermined height and angle. Various color spectral photometer arrangements are disclosed. Translucency, fluorescence and/or surface texture data also may be obtained. Audio feedback may be provided to guide operator use of the system. The probe may have a removable or shielded tip for contamination prevention. A method of producing dental prostheses based on measured data also is disclosed.Type: ApplicationFiled: May 25, 2001Publication date: September 20, 2001Inventors: Wayne D. Jung, Russell W. Jung, Alan R. Loudermilk
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Publication number: 20010023059Abstract: An educational system server connected to a network comprises a student database for storing student ID, proficiency level, status of payment of tuition and the like of students. The educational system server checks the ability level of the student based on data of the student stored in the student database and, based on the results, selects a course suitable for the student. Further, a next course step suitable for the student is selected according to the current proficiency level of the student. Finally, whether or not the course is to be completed is judged based on the results of grading. By virtue of this constitution, an educational system can be realized wherein a student can select a course, which matches the current proficiency level of the student, and, during taking of the course, can change the course level and can cancel the course.Type: ApplicationFiled: March 16, 2001Publication date: September 20, 2001Inventor: Nozomi Toki
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Publication number: 20010023060Abstract: A method for cryoconservation of Zebrafish sperm, and Zebrafish sperm obtained by said method.Type: ApplicationFiled: December 19, 2000Publication date: September 20, 2001Inventors: Brigitte Walderich, Renate Nordin
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Publication number: 20010023061Abstract: A spontaneously immortalized human kerazinocyte cell line is disclosed. In a preferred embodiment, this cell line is ATCC 12191. In another embodiment of the invention, a method of assaying the effect of a test tumor cell modulation agent is disclosed. The method comprises the steps of obtaining a human stratified squamous epithelial cell culture, wherein the culture comprises human malignant squamous epithelial cells and spontaneously immortalized human keratinocytes, wherein the culture forms a reconstituted epidermis. One then treats the epidermis with a test tumor cell modulation agent and evaluates the growth of the malignant cells within the epidermis.Type: ApplicationFiled: January 24, 2001Publication date: September 20, 2001Inventors: B. Lynn Allen-Hoffmann, Sandra J. Schlosser, Michael A. Pickart
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Publication number: 20010023062Abstract: A method for screening compounds for their ability to bind a receptor and/or the screening of compounds that antagonize the binding of a ligand to a receptor. The invention provides an easy and powerful screening method in eukaryotic cells (other than yeast cells), such as insect cells, plant cells or mammalian cells, for ligands of orphan receptors, preferably of the multimerizing receptor type, for unknown ligands of known receptors, preferably multimerizing receptors, and for the genes encoding these ligands.Type: ApplicationFiled: January 26, 2001Publication date: September 20, 2001Inventors: Xaveer Van Ostade, Joel S. Vandekerckhove, Annick Verhee, Jan Tavernier
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Publication number: 20010023063Abstract: This invention pertains to the general field of chemical and biological assays which employ electrochemiluminscence (ECL), also referred to as electrogenerated chemiluminescence. More particularly, the present invention pertains to certain classes of chemical moieties which strongly quench ECL, and the use of these ECL quenchers in combination with ECL labels, for example, in ECL assay methods which employ an ECL quencher and an ECL label. One class of such quenching moieties are those which comprise at least one benzene moiety. Sub-classes of such quenching moieties are those which comprise at least one phenol moiety, quinone moiety, benzene carboxylic acid, and/or benzene carboxylate moiety.Type: ApplicationFiled: May 7, 1998Publication date: September 20, 2001Inventors: MARK M. RICHTER, MICHAEL J. POWELL, CHRISTOPHER M. BELISLE
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Publication number: 20010023064Abstract: The invention provides yfjO polypeptides and polynucleotides encoding yfjO polypeptides and methods for producing such polypeptides by recombinant techniques. Also provided are methods for utilizing yfjO polypeptides to screen for antibacterial compounds.Type: ApplicationFiled: December 13, 2000Publication date: September 20, 2001Inventors: Sanjoy Biswas, Alexander Bryant, James Raymond Brown, Alison Francis Chalker, David John Holmes, Karen Anne Ingraham, Chi Young So, Stephanie Van Horn, Richard Lloyd Warren, Magdalena Zalacain
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Publication number: 20010023065Abstract: A method for detecting Mycobacterium tuberculosis by the polymerase chain reaction (PCR) amplification of the REP13E12 repeated sequence, and more particularly, to a method for detecting Mycobacterium tuberculosis in clinical specimen by the PCR amplification of all or some of the REP1 3E1 2 repeated sequence is provided. Since the Mycobacterium tuberculosis detecting method by the PCR amplification for amplifying the REP13E12, which is the repeated sequence cloned from the microbial cells of Mycobacterium tuberculosis, which are separated from Korea, shows excellent sensitivity and specificity, it is possible to effectively detect Mycobacterium tuberculosis in specimen using the method.Type: ApplicationFiled: February 16, 2001Publication date: September 20, 2001Inventors: Tae-Yoon Lee, Sung-Kwang Kim, Jong-Seok Lee, Jai-Youl Lee
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Publication number: 20010023066Abstract: Methods of screening for cancers or treating cancers or autoimmune disorders are disclosed. In an aspect of the present invention, the screening methods are based on the detection of complement C3 or C3 related protein, or a nucleic acid molecule encoding the same, found to be associated with the presence of cancer. Additional screening methods are based on the use of complement regulators Factor I or DAF, or complement receptors 1 or 3. Preferred embodiments to the methods include detection based on immunological properties, physical properties, enzymatic properties and combinations thereof, or detection of a nucleic acid molecule encoding antigen based on nucleic acid amplification.Type: ApplicationFiled: March 5, 2001Publication date: September 20, 2001Inventors: Robert J. Kinders, David L. Enfield, G. Michael Hass
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Publication number: 20010023067Abstract: Described are nucleic acid molecules encoding polypeptides having the enzymatic activity of an RNA-directed RNA polymerase (RdRP). Vectors comprising said nucleic acid molecules, wherein the nucleic acid molecules are operatively linked to regulatory elements allowing expression In prokaryotic and/or eukaryotic host cells are provided. Additionally, polypeptides encoded by said nucleic acid molecules and methods for the production of said polypeptides are described. Described are also pharmaceutical and diagnostic compositions as well as kits comprising the aforementioned nucleic acid molecules and/or comprising a nucleic acid molecule which is complementary to such a nucleic acid molecule. Said compositions and kits may further comprise polypeptides encoded by the described nucleic acid molecules. Furthermore, antagonists and inhibitors of the aforesaid polypeptides and/or antibodies specifically recognizing such polypeptides are described.Type: ApplicationFiled: February 8, 2001Publication date: September 20, 2001Applicant: Michael Wassenegger and Leonhard RiedelInventors: Michael Wassenegger, Leonhard Riedel, Winfried Schiebel, Heinz L. Sanger
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Publication number: 20010023068Abstract: SVP4b polypeptides and polynucleotides and methods for producing such polypeptides by recombinant techniques are disclosed. Also disclosed are methods for utilizing SVP4b polypeptides and polynucleotides in therapy, and diagnostic assays for such.Type: ApplicationFiled: March 9, 2001Publication date: September 20, 2001Inventor: Lisa Patel
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Publication number: 20010023069Abstract: Novel insulin precursors and insulin precursor analogs having a mini C-peptide comprising at least one aromatic amino acid residue have an increased folding stability. The novel insulin precursors and insulin precursor analogs can be expressed in yeast in high yields and are preferably not more 15 amino acid residues in length. Also provided are polynucleotide sequences encoding the claimed precursors or precursor analogs, and vectors and cell lines containing such polynucleotide sequences.Type: ApplicationFiled: December 14, 2000Publication date: September 20, 2001Inventors: Thomas Borglum Kjeldsen, Svend Ludvigsen, Niels C. Kaarsholm
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Publication number: 20010023070Abstract: The present invention relates to novel human proteins designated Interleukin-21 (IL-21) and Interleukin-22 (IL-22), and isolated polynucleotides encoding these proteins. Also provided are vectors, host cells, antibodies, and recombinant methods for producing these human proteins. The invention further relates to diagnostic and therapeutic methods useful for diagnosing, treating, and/or preventing disorders related to these novel human proteins.Type: ApplicationFiled: December 8, 2000Publication date: September 20, 2001Inventors: Reinhard Ebner, Steven M. Ruben
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Publication number: 20010023071Abstract: A cyclododecanone compound is produced in a high reaction rate, with a high conversion of the starting compound, and with a high selectivity to and a high yield of the target compound by isomerizing an epoxycyclododecane compound in the presence of a catalyst comprising lithium bromide and/or lithium iodide, without using a solvent or in a non-polar solvent, in an inert gas atmosphere, while substantially no polymeric compounds having a high boiling temperature is produced.Type: ApplicationFiled: February 15, 2001Publication date: September 20, 2001Applicant: Ube Industries, Ltd.Inventors: Ryoji Sugise, Shuji Tanaka, Kohichi Kashiwagi, Takashi Doi, Masayuki Nishio, Sadao Niida, Tsunao Matsuura
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Publication number: 20010023072Abstract: A method for the enrichment of dendritic cells from the peripheral blood of a mammal is described. Peripheral blood having mononuclear cells from a mammal is provided. The mononuclear cells are separated from the peripheral blood. The mononuclear cells are separated into a first cell population having substantially lymphocytes and a second cell population having substantially myeloid cells. The myeloid cells are separated into a third cell population having substantially monocytes and a fourth cell population having substantially dendritic cells. Also described are purified dendritic cell populations, vaccine compositions and methods for the treatment of cancer using dendritic cells, and kits useful for the enrichment of dendritic cells from blood.Type: ApplicationFiled: January 31, 2001Publication date: September 20, 2001Applicant: The Center For Blood Research, Inc.Inventors: Keith D. Crawford, Chester A. Alper
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Publication number: 20010023073Abstract: Disclosed are methods for producing co-cultures of cells in which at least two cell types are present in a micropattern configuration.Type: ApplicationFiled: April 23, 2001Publication date: September 20, 2001Applicant: Massachusetts Institute of TechnologyInventors: Sangeeta Bhatia, Martin Yarmush, Mehmet Toner
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Publication number: 20010023074Abstract: This invention is directed to probes that are removably insertable into mass spectrometers. The probes have sample presenting surfaces, at least, that contain non-metallic materials. The probes are useful in methods of desorbing analytes from the probe surface. The invention also is directed to detection systems that include the probes and methods of detecting analytes using the system.Type: ApplicationFiled: July 27, 1998Publication date: September 20, 2001Inventors: T. WILLIAM HUTCHENS, TAI-TUNG YIP
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Publication number: 20010023075Abstract: A device for assaying biological fluids for molecules contained therein comprising a container, material situated in the container for absorbing fluid and in communication with an antibody or antigen impregnated matrix, wherein the matrix is accessible to the exterior of the container through a funnel shaped aperture in the roof of the container. Further features include a chemical drying agent associated with the container for absorbing moisture, thereby preventing inactivation of the assay reagents, and a filter situated above the antibody or antigen impregnated matrix, and in communication with the matrix through the aperture in the roof of the container. The filter removes interfering substances present in the biological fluids, and provides protein blocking agents to the matrix material for decreasing the background of the assay.Type: ApplicationFiled: August 12, 1997Publication date: September 20, 2001Inventors: SIU-YIN WONG, FON-CHIU MIA CHEN, EUGENE FAN
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Publication number: 20010023076Abstract: Assay devices, kits, and methods for detection of one or more analytes in a sample are provided. The assay device features the controlled release of reagents and hence is particularly suitable for binding assays such as immunoassays. The assay device achieves greater sensitivity than conventional rapid test assays, leading to stronger and/or more stable visual signals than those produced by conventional devices, easier interpretation of results, and reduced occurrence of indeterminate results. The device can be used for detecting analyte in a variety of biological samples without the need for conventional sample filtration techniques, and thus is suitable for use by untrained personnel without specialized equipment. In addition, the device can be used to simultaneously analyze a number of analytes using a single sample.Type: ApplicationFiled: January 25, 2001Publication date: September 20, 2001Inventors: Ming Guan, Hsiao Ying Chen, Theresa Puifun Chow, Adrian Rennie Pereira, Ping Kuen Mun
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Publication number: 20010023077Abstract: A method and apparatus for measuring binding between a plurality of molecules of a first type and a plurality of molecules of a second type is presented. Apparatus utilizes a sensor possessing a waveguide to which have been attached in close proximity to its surface, features resembling molecules of said first type. Light is injected into said waveguide so as to produce an evanescent field at its surface. Molecules of said second type are tagged with a tag belonging to that class of chemicals which alters a characteristic of light, when said light passes through said chemical tag. Apparatus utilizes a rapid means of monitoring the change in optical signal coming from said waveguide as binding proceeds between tagged molecules of type 2 and the feature resembling molecules of type 1 on said waveguide. This allows direct measurement of binding and dissociation rates between the two types of molecules.Type: ApplicationFiled: April 12, 2001Publication date: September 20, 2001Inventors: Judith L. Erb, James G. Downward, John R. Erb-Downward, Otho Ulrich
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Publication number: 20010023078Abstract: The present invention provides a composition comprising fluorescent semiconductor nanocrystals associated to a compound, wherein the nanocrystals have a characteristic spectral emission, wherein said spectral emission is tunable to a desired wavelength by controlling the size of the nanocrystal, and wherein said emission provides information about a biological state or event.Type: ApplicationFiled: April 12, 2001Publication date: September 20, 2001Applicant: Massachusetts Institute of TechnologyInventors: Moungi G. Bawendi, Vikram C. Sundar, Frederic V. Mikulec
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Publication number: 20010023079Abstract: In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the invention encompasses a method of treating a plurality of substrates. A treating member is provided proximate a first substrate, and an initial layer of frozen material is formed over a surface of the treating member. A surface of the first substrate is treated by moving at least one of the treating member and the first substrate relative to the other of the treating member and the first substrate. After the surface of the first substrate is treated, the initial layer of frozen material is removed from over the surface of the treating member.Type: ApplicationFiled: May 22, 2001Publication date: September 20, 2001Inventors: Scott E. Moore, Trung Tri Doan
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Publication number: 20010023080Abstract: An integrated circuit ferroelectric capacitor is fabricated by forming on an integrated circuit substrate, a lower electrode adjacent the substrate, an upper electrode remote from the substrate and a ferroelectric layer therebetween, and forming a first low temperature oxide layer on the upper electrode, opposite the ferroelectric layer. The low temperature oxide may be annealed in oxygen. A second low temperature oxide layer may be formed on the first low temperature oxide layer, opposite the upper electrode, and the second low temperature oxide layer may be annealed in oxygen. The first and second low temperature oxide layers preferably comprise at least one of Plasma Enhanced Tetraethoxysilane (PE-TEOS), undoped silicon glass (USG) and Electron Cyclotron Resonance oxide (ECR-OX). An electrical contact to the lower electrode may be formed between the steps of forming a first low temperature oxide layer and a second low temperature oxide layer.Type: ApplicationFiled: March 30, 1999Publication date: September 20, 2001Inventor: BON-JAE KOO
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Publication number: 20010023081Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.Type: ApplicationFiled: May 29, 2001Publication date: September 20, 2001Inventors: Roy Yu, Kamalesh S. Desal, Peter A. Franklin, Suryanatayana Kala, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelll, Thomas A. Wassick
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Publication number: 20010023082Abstract: The present invention provides systems and methods for grinding wafers for use in manufacturing semiconductor devices. The methods include grinding a semiconductor wafer such that the grind pattern on the wafer is less than ten (10) microns deep. Then, the wafer is etched using an acid etchant. During the etch, less than twenty (20) microns of semiconductor material is removed from a combination of the front and the back of the wafer. In addition, metallic contamination is removed from the wafer. The system includes an integrated grinder and etcher for processing single wafers.Type: ApplicationFiled: March 15, 2001Publication date: September 20, 2001Inventors: Krishna Vepa, Duncan Dobson
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Publication number: 20010023083Abstract: A test method provides a sample of wafer level defects most likely to cause yield loss on a semiconductor wafer subdivided into a plurality of integrated circuits (IC's). Defect size and location data from an inspection tool is manipulated in an algorithm based on defect sizes and geometry parameters. The defects are classified by defect size to form size based populations. The contribution of each size range of defect population to yield loss is calculated and random samples for review are selected from each defect size population. The number of samples from each size defect population is proportional to the predicted yield impact of each sample. The method is rapid and permits on-line process modification to reduce yield losses.Type: ApplicationFiled: May 2, 2001Publication date: September 20, 2001Inventor: Steven J. Simmons
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Publication number: 20010023084Abstract: A method of manufacturing a piezoelectric filter with a resonator comprising a layer of a piezoelectric material (1) which is provided with an electrode (2,3) on either side, which resonator is situated on an acoustic reflector layer (4) formed on a surface (6) of a carrier substrate (7). In the method, the layer of piezoelectric material (1) is provided on a surface (8) of an auxiliary substrate (9), after which a first electrode (2) is formed on the layer of piezoelectric material (1). The acoustic reflector layer (4) is provided on and next to the first electrode (2), and the structure thus formed is secured with the side facing away from the auxiliary substrate (9) on the carrier substrate (7). The auxiliary substrate (9) is removed and a second electrode (3) situated opposite the first electrode (2) is provided.Type: ApplicationFiled: February 21, 2001Publication date: September 20, 2001Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas
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Publication number: 20010023085Abstract: The present invention discloses a method of manufacturing an array substrate for use in a reflective liquid crystal display device, including: providing a thin film transistor array substrate; depositing a metal layer on the substrate using a shadow mask having a plurality of holes; and patterning the metal layer into a reflective electrode for connecting to the thin film transistor.Type: ApplicationFiled: December 20, 2000Publication date: September 20, 2001Inventor: Joo-Soo Lim
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Publication number: 20010023086Abstract: A method for fabricating a CMOS image sensor having a characteristic of a reduced dark current includes the steps of: a) providing a semiconductor structure, wherein the semiconductor structure includes a photodiode and peripheral elements formed on a semiconductor substrate; b) forming an insulating layer on the semiconductor structure; c) forming a hydrogen containing dielectric layer on the insulting layer; d) diffusing hydrogen ions contained in the hydrogen containing dielectric layer into a surface of the photodiode, thereby removing a dangling bond; and e) removing the hydrogen containing dielectric layer.Type: ApplicationFiled: December 21, 2000Publication date: September 20, 2001Inventors: Ki-Nam Park, Oh-Bong Kwon
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Publication number: 20010023087Abstract: There is disclosed a method for housing sensors in a package and, in particular, housing chemical sensors, flow sensors or optical sensors in a synthetic package. In a first step, the active sensor surface of a semiconductor or IC sensor is provided with a cap forming a hollow space above the active sensor surface and the sensor is connected with contacts and bond wires. In a second method step, the package is formed by molding, in particular injection molding. In a third method step, or simultaneously with the second method step, the hollow space formed above the active sensor surface is opened.Type: ApplicationFiled: March 13, 2001Publication date: September 20, 2001Inventor: Manfred Brandl
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Publication number: 20010023088Abstract: A semiconductor device comprising a resin mold, two semiconductor chips positioned inside the resin mold and having front and back surfaces and external terminals formed on the front surfaces, and leads extending from the inside to the outside of the resin mold, wherein each of said leads is branched into two branch leads in at least the resin mold, the one branch lead is secured to the surface of the one semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, the other branch lead is secured to the surface of the other semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, and the two semiconductor chips are stacked one upon the other, with their back surfaces opposed to each other.Type: ApplicationFiled: May 15, 2001Publication date: September 20, 2001Inventors: Masachika Masuda, Tamaki Wada, Michiaki Sugiyama, Hirotaka Nishizawa, Toshio Sugano, Yasushi Takahashi, Masayasu Kawamura
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Publication number: 20010023089Abstract: A method for improving the reliability and yield of a thin film transistor by controlling the crystallinity thereof. The method comprises the steps of forming a gate electrode on an island amorphous silicon film, injecting an impurity using the gate electrode as a mask, forming a coating film containing at least one of nickel, iron, cobalt, platinum and palladium so that it adheres to parts of the impurity regions, and annealing it at a temperature lower than the crystallization temperature of pure amorphous silicon to advance the crystallization starting therefrom and to crystallize the impurity regions and channel forming region.Type: ApplicationFiled: May 4, 2001Publication date: September 20, 2001Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
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Publication number: 20010023090Abstract: The present invention relates to a thin film transistor and a fabricating method thereof wherein a source/drain region and a gate electrode are formed in the same layer, which improves the degree of planarization. Because source/drain electrodes and a gate electrode are formed by patterning the same layer with a single mask, the invention reduces the number of fabrication steps. The TFT includes an insulated substrate which is transparent, a source electrode and a drain electrode on the insulated substrate. The source and drain electrodes are separated each other, and a gate electrode is between the source and drain electrodes on the insulated substrate. A gate insulating layer covers the source and drain electrodes and the gate electrodes on the gate insulating layer. An active layer is then formed on the gate insulating layer. Source and drain regions are formed at each end of the active layer corresponding to the gate electrode and a channel region is formed between the source and drain regions.Type: ApplicationFiled: April 9, 2001Publication date: September 20, 2001Inventor: Sang-Gul Lee
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Publication number: 20010023091Abstract: In producing a semiconductor device such as a thin film transistor (TFT), a silicon semiconductor film is formed on a substrate having an insulating surface, such as a glass substrate, and then a silicon nitride film is formed on the silicon semiconductor film. After that, a hydrogen ion, fluorine ion, or chlorine ion is introduced into the silicon semiconductor film through the silicon nitride film, and then the silicon semiconductor film into which an ion is introduced is heated in an atmosphere containing hydrogen, fluorine, chlorine or these mixture, to neutralize dangling bonds in the silicon semiconductor film and reduce levels in the silicon semiconductor film.Type: ApplicationFiled: December 19, 2000Publication date: September 20, 2001Inventors: Naoaki Yamaguchi, Hongyong Zhang, Satoshi Teramoto, Hideto Ohnuma
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Publication number: 20010023092Abstract: A method of manufacturing a semiconductor device which has a crystalline silicon film comprises the steps of forming crystal nuclei in a surface region of an amorphous silicon film and then growing the crystals from the nuclei by a laser light. Typically the crystal nuclei are silicon crystals or metal suicides having an equivalent structure as silicon crystal.Type: ApplicationFiled: April 24, 2001Publication date: September 20, 2001Inventors: Hisashi Ohtani, Akiharu Miyanaga, Junichi Takeyama
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Publication number: 20010023093Abstract: A semiconductor memory device having a plurality of cell blocks includes: a fuse box group, coupled to the cell blocks, for generating a repair signal in response to a row address signal; a repair signal summation unit for generating a repair summation signal for controlling a repair operation in response to the repair signal; a block selection signal generation unit for generating a block selection signal for selecting a cell block to be repaired in response to the repair summation signal and a block selection address signal; and a repair row decoding unit for driving a redundant word line in response to the repair signal and a block selection signal.Type: ApplicationFiled: March 12, 2001Publication date: September 20, 2001Inventors: Chang-Ho Do, Jung-Won Suh
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Publication number: 20010023094Abstract: A method for fabricating a silicon-on-insulator (SOI) wafer that includes a monocrystalline silicon substrate with a doped region buried therein is provided. The method includes forming a plurality of trench-like openings extending from a surface of the substrate to the doped buried region, and selectively etching through the plurality of trench-like openings to change the doped buried region into a porous silicon region. The porous silicon region is oxidized to obtain an insulating region for the SOI wafer.Type: ApplicationFiled: December 29, 2000Publication date: September 20, 2001Applicant: STMicroelectronics S.r.l.Inventors: Giuseppe D'Arrigo, Corrado Spinella, Salvatore Coffa, Giuseppe Arena, Marco Camalleri
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Method and structure for reducing leakage currents of active area diodes and source/drain diffusions
Publication number: 20010023095Abstract: A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure.Type: ApplicationFiled: May 22, 2001Publication date: September 20, 2001Inventors: Thomas Edward Kopley, Dietrich W. Vook, Thomas Dungan -
Publication number: 20010023096Abstract: In a complete CMOS SRAM having a memory cell composed of six MISFETs formed over a substrate, a capacitor element having a stack structure is formed of a lower electrode covering the memory cell, an upper electrode, and a capacitor insulating film (dielectric film) interposed between the lower electrode and the upper electrode. One electrode (the lower electrode) of the capacitor element is connected to one storage node of a flip-flop circuit, and the other electrode (the upper electrode) is connected to the other storage node. As a result, the storage node capacitance of the memory cell of the SRAM is increased to improve the soft error resistance.Type: ApplicationFiled: April 17, 2001Publication date: September 20, 2001Inventors: Naotaka Hashimoto, Yutaka Hoshino, Shuji Ikeda
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Publication number: 20010023097Abstract: A method and novel DRAM cell design are described for making DRAM devices with more than a Gigabit memory cells. After forming the FETs and polycide word lines with a cap oxide and sidewall spacers, a thin diffusion protection oxide is deposited and openings are formed for contacts to the substrate. A conductively doped first polysilicon layer is deposited and polished back to the cap oxide. The first polysilicon remaining in the recesses between word lines is patterned to form first plug that are auto self-aligned (zero alignment error) to the word lines to achieve a very high density (Gigabit) memory. A planar first insulating layer with openings for bit lines is formed. Polycide bit lines are formed having a Si3N4 cap layer and sidewall spacers. Contact openings are selectively etched to first in the first insulating layer to first plugs and self-aligned aligned to the bit lines.Type: ApplicationFiled: May 18, 2001Publication date: September 20, 2001Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANYInventor: Jenn Ming Huang
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Publication number: 20010023098Abstract: Certain embodiments of the present invention relate to a method for manufacturing a semiconductor device, in which, when a cell capacitor of a DRAM and a capacitor element in an analog element region are mix-mounted on the same chip, the manufacturing steps can be simplified. First, the lower electrodes 55a and 55b of the capacitor elements 600a and 600b, and the storage nodes 53a and 53b of the cell capacitors 700a and 700b are simultaneously formed. Next, a dielectric layer (ON layer 61) of the capacitor elements 600a and 600b, and a dielectric layer (ON layer 61) of the cell capacitors 700a and 700b are simultaneously formed. Then, the upper electrodes 69a and 69b of the capacitor elements 600a and 600b and the cell plate 67 of the cell capacitors 700a and 700b are simultaneously formed.Type: ApplicationFiled: January 13, 2001Publication date: September 20, 2001Inventors: Hiroaki Tsugane, Hisakatsu Sato
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Publication number: 20010023099Abstract: In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta2O5 (tantalum oxide) film 46, the portions of bit lines BL and first-layer interconnect lines 23 to 26 of a peripheral circuit which are in contact with at least an underlying silicon oxide film 28 are formed of a W film, the bit lines BL and the interconnect lines 23 to 26 being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines 23 to 26 and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.Type: ApplicationFiled: April 9, 2001Publication date: September 20, 2001Inventors: Masayoshi Saito, Yoshitaka Nakamura, Hidekazu Goto, Keizo Kawakita, Satoru Yamada, Toshihiro Sekiguchi, Isamu Asano, Yoshitaka Tadaki, Takuya Fukuda, Masayuki Suzuki, Tsuyoshi Tamaru, Naoki Fukuda, Hideo Aoki, Masayoshi Hirasawa
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Publication number: 20010023100Abstract: A method for manufacturing a semiconductor device can form a thick lower electrode made of Pt. The method begins with the preparation of an active matrix provided with at least one diffusion region and an insulating layer formed thereon. Thereafter, the insulating layer is patterned into a predetermined configuration, thereby exposing the diffusion region and a metal silicide film is formed on the exposed diffusion region. And then, a barrier metal is formed on the metal silicide and a seed layer is formed on the active matrix including the barrier metal. In an ensuing step, a dummy oxide layer is formed on the seed layer and a dummy oxide layer is patterned into a preset configuration, thereby exposing portions of the seed layer which are located above the barrier metal. Next, the exposed portions of the seed layer are filled with a conductive material to a predetermined thickness.Type: ApplicationFiled: December 21, 2000Publication date: September 20, 2001Inventors: Kwon Hong, Yong-Sik Yu
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Publication number: 20010023101Abstract: A semiconductor processing method of forming a capacitor construction includes, a) providing a pair of electrically conductive lines having respective electrically insulated outermost surfaces; b) providing a pair of sidewall spacers laterally outward of each of the pair of conductive lines; c) etching material over the pair of conductive lines between the respective pairs of sidewall spacers selectively relative to the sidewall spacers to form respective recesses over the pair of conductive lines relative to the sidewall spacers, the etching leaving the outermost conductive line surfaces electrically insulated; d) providing a node to which electrical connection to a capacitor is to be made between the pair of conductive lines, one sidewall spacer of each pair of sidewall spacers being closer to the node than the other sidewall spacer of each pair; e) providing an electrically conductive first capacitor plate layer over the node, the one sidewall spacers, and within the respective recesses; and f) providing aType: ApplicationFiled: April 20, 2001Publication date: September 20, 2001Inventors: James E. Green, Darwin Clampitt
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Semiconductor memory device using hemispherical grain silicon and method for the manufacture thereof
Publication number: 20010023102Abstract: A semiconductor device for use in a memory cell including an active matrix provided with a silicon substrate, at least one transistor formed on the silicon substrate, a number of bottom electrodes formed over the transistors, a plurality of conductive plugs to electrically connect the bottom electrodes to the transistors, respectively, and an insulating layer formed around the conductive plugs. In the device, by carrying out a carbon treatment to top surface portions of the bottom electrode structure, it is possible to secure enough space to prevent the formation of bridges between the bottom electrodes.Type: ApplicationFiled: December 20, 2000Publication date: September 20, 2001Inventors: Se-Min Lee, Dong-Hwan Kim, Keun-Il Lee -
Publication number: 20010023103Abstract: A method for manufacturing a ferroelectric random access memory (FeRAM) device which includes the steps of preparing an active matrix provided with a transistor, diffusion regions, an isolation region, a bit line, a first insulating layer and a second insulating layer; forming a first conductive layer and then a dielectric layer on the active matrix; carrying out a rapid thermal annealing (RTA) for producing nuclei in the dielectric layer; forming a second conductive on top of the dielectric layer; carrying out a thermal annealing in a furnace; forming a capacitor structure provided with a top electrode, a capacitor thin film and a bottom electrode by patterning the second conductive, the dielectric and the first conductive layers into a first predetermined configuration; carrying out a first recovery; forming a third insulating layer on the capacitor structure and the second insulating layer; patterning the third insulating layer to form a first opening and a second opening; and carrying out a second recoverType: ApplicationFiled: December 26, 2000Publication date: September 20, 2001Inventors: Woo-Seok Yang, Deuk-Soo Pyun
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Publication number: 20010023104Abstract: A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.Type: ApplicationFiled: May 9, 2001Publication date: September 20, 2001Inventor: Brian Sze-Ki Mo