Abstract: An exciting coil is constructed by winding a winding in a groove formed on the outer circumference of a circular ring member, and a detecting coil in the shape of a polygon (such as a triangle and a pentagon) when seen from the front is positioned. One side of the detecting coil is placed in a diameter direction of the exciting coil, inside the exciting coil, and the vertex opposite to the one side is placed apart from the exciting coil so that the detecting coil is orthogonal to the exciting coil. A side surface of the exciting coil on the side opposite to the vertex is placed to face the surface of a test material, and used as a flaw detection surface.

Abstract: A magnetic detection device and a manufacturing method for the same that allows effective control of the magnetization of a free magnetic layer in a design with narrower tracks. A second antiferromagnetic layer is deposited on a free magnetic layer, and a thin nonmagnetic layer formed from an element such as Ru or the like is deposited on the second antiferromagnetic layer. Third antiferromagnetic layers are deposited on both end portions of the free magnetic layer. Both end portions of the second antiferromagnetic layer exhibit antiferromagnetic properties so that the magnetization of both end portions of the free magnetic layer is firmly fixed. A central portion of the second antiferromagnetic layer is non-antiferromagnetic. A central portion of the free magnetic layer is formed into a weak single domain so it permits inverted magnetization in response to an external magnetic field.

Abstract: In a magnetic resonance imaging apparatus, a main magnet assembly (12) produces a uniform magnetic field through an imaging region (14). An imaging region is defined within a subject by selecting gradient magnetic fields spatially encode the main magnetic field. A whole body birdcage radio frequency coil (26) excites magnetic resonance in dipoles of the subject. The resonance signals are received by the whole body coil (26) and by a second, local birdcage radio frequency coil (16). The first radio frequency coil (26) produces and is sensitive to a uniform radio frequency field in the imaging region (14) while the second radio frequency coil (28) is sensitive to a field that varies sinusoidally in space. From one radio frequency excitation, the two birdcage coils (26, 16) receive different sets of data with which to fill k-space, accelerating data collection.

Abstract: In a reception coil, a carrier signal is frequency-modulated around a carrier frequency with a modulation signal corresponding to an analog magnetic resonance signal. The frequency-modulated carrier signal is wirelessly transmitted from the reception coil to a reception circuit that is spatially separated from the reception coil. The frequency-modulated carrier signal is demodulated in the reception circuit in order to reacquire the modulation signal.

Abstract: A method and apparatus for detecting displacement of an object using navigator echoes is presented. For motion that is linear in 3D, a linear regression on k-space data is performed by fitting a straight line to the motion-induced phase shift using a k-space weighted least squares minimization to find the displacement. For general motion due to rotation, dilation, and displacement, a rotation angle and dilation scaling factors are determined from the magnitude k-space data by a weighted least squares minimization. A displacement vector is then obtained from the phase data in k-space using a weighted least squares minimization. The weighting factor takes into account that the noise in k-space is inversely proportional to the signal to noise ration. For motion of coronary arteries, the k-space data is acquired in one embodiment using selective volumetric excitation and sampling the resulting excited signal with a trajectory sensitized to the motion of interest.

Abstract: A probehead for an electron spin resonance (ESR) dosimeter comprises a resonator and an insert extending into the resonator. The insert has a guide channel for bringing a sample into the resonator. The sample comprises a dosimeter substance. The guide channel is configured for receiving and guiding a test strip. The insert is provided with a first machine-readable code imprint. The insert is provided with at least one reference sample. A pressurized air unit is provided for blowing the sample out of the resonator after completion of a measurement. The insert has an opening on an upper side of the resonator. The opening is openly accessible for manually inserting dosimeter pills thereinto. The insert, further, is provided on the upper side with a pressurized air connector. The pressurized air connector is connected to an orifice via a pressurized air channel within the insert. The orifice is located within a lower, otherwise closed bottom of the guide channel.

Abstract: An MR system isolation impedance mismatch apparatus (12) includes an impedance mismatch layer (24). The impedance mismatch layer (24) performs as a mechanical notch filter and isolates an MR system component (14) from a surrounding structure (18). A method of tuning the impedance mismatch apparatus (12) includes determining a default notch filter frequency range. The impedance mismatch apparatus (12) is formed and performs as a notch filter having the default notch filter frequency range. The impedance mismatch apparatus (12) is installed and tested between the MR system component (14) and the surrounding structure (18). Vibrations are detected in the MR system component (14) and in the surrounding structure (18). The impedance mismatch apparatus is adjusted in response to the detected vibrations.

Abstract: A novel NMR detector of the present invention comprises a radio frequency (RF) resonance circuit. The RF resonance circuit includes a principal detector element and a sample chamber. The principal detector element defines an inductor of the electronic resonance circuit. In one embodiment of the invention the sample chamber containing the inductor is a stainless steel sample chamber. The stainless steel sample chamber is a modified toroid cavity detector (TCD). The inductor is formed by an atomically flat metallic disk, such as, a mercury pool, with a predefined surface area, such as a surface area of 7.5 cm2. Liquid mercury is incorporated into a toroid cavity detector as the inductor of the resonance circuit, and as the base of the cavity. Self-assembled molecular structures (monolayers and multilayers) are formed using long-chain alkane thiols, which are known to chemically react with silver, gold, platinum, palladium, and mercury surfaces.

Abstract: A method for reducing the calibration time of magnetic imaging resonance systems at fields of 1 Tesla or higher utilizing silicone oil type phantom tanks. A small amount of a non-ionic paramagnetic compound such as gadolinium beta-diketonate (a common metallocomplex) is added to the silicone oil to reduce the spin-lattice relaxation time of the silicone oil in magnetic resonance phantoms. The amount of reduction of the spin lattice relaxation time is inversely proportional to the amount of paramagnetic compound added to the silicone oil in a given phantom tank and thus can be controlled in a precise manner.

Abstract: A radio frequency (RF) coil assembly for imaging a subject volume using a very high field Magnetic Resonance Imaging (MRI) system operable at substantially high frequencies includes a plurality of conductors arranged cylindrically and disposed about a patient bore of the MRI system, a plurality of capacitive elements disposed between and connecting respective ends of the conductors, the plurality of conductors and plurality of capacitive elements forming a high band pass birdcage configuration, and a plurality of dynamic disabling switches, each dynamic disabling switch electrically coupled in parallel with a respective capacitive element to form a parallel resonant circuit.

Abstract: A metal detector system including a chassis for supporting electromagnetic sensor components above a medium such as soil or water. A transmitter coil and two receiver coils are attached to the chassis. A propulsion system is attached to the chassis between or adjacent to the receiver coils. The location of the propulsion system causes electromagnetic interference signals emanating from the propulsion system to be received at a nominally equal magnitude by each of the receiver coils.

Abstract: An apparatus and method for determining resistivity of a formation surrounding a borehole comprises a housing, at least first and second transmitting antennas affixed to the housing for transmitting electromagnetic waves to the formation, and at least first and second receiving antennas for detecting the electromagnetic waves. The first receiving antenna is affixed to the housing at a position longitudinally located above the first and second transmitting antennas, and the second receiving antenna is longitudinally located below the first and second transmitting antennas. The measurements needed to calculate the resistivity of the formation may be determined while drilling the borehole.

Abstract: An electromagnetic tomography system for determining properties of geological formation penetrated by at least one borehole lined with a conductive tubular includes a transmitter disposed in a first borehole and adapted to induce a magnetic field, a first receiver disposed in the first borehole and adapted to detect a magnetic field induced in the conductive tubular by the transmitter, and a second receiver adapted to detect a magnetic field induced in the geological formation by the transmitter.

Abstract: An alternator testing system is disclosed that includes a current source, a motor, and a drive belt. The drive belt couples the motor to an alternator, which operates outside of a motor vehicle, and the current source and the motor enable diodes of the alternator to output a current that is not limited by input power to the motor. Accordingly, defective diodes may be detected.

Abstract: An oil condition sensor detects a condition of oil in response to the potential difference between electrodes. The electrodes include at least a first and second electrodes coaxially arranged. The electrodes have projections being arranged to face each other in an opposed manner. Therefore, the projections provide wide surface area that performs as electrodes. It is possible to provide compact oil condition sensor that is easy to install into an oil tank or oil pan.

Abstract: In a sample assembly for a thermoelectric analyzer, typically TSC (Thermally Stimulated Current) analyzer, a sample is fixed to an electrically-insulating substrate via an adhesive layer. The material of the adhesive layer is indium or gold-tin alloy. The substrate has a pair of junction electrode layers formed thereon and a pair of electrode layers formed on the same plane of the sample. One of the electrode layers is connected with one of the junction electrode layers by electrically-conductive wire, while the other of the electrode layers is connected with the other of the junction electrode layers by another electrically-conductive wire. The substrate is made of preferably made of a highly electrically-insulating and highly thermally-conductive material which may be, for example, aluminum nitride (AlN), boron nitride (BN), beryllium oxide (BeO) or aluminum oxide (Al2O3). The sample may preferably be a compound semiconductor such as GaAs.

Abstract: A portable and easy to use tester for validating the accuracy of wiring diagram manuals and for testing modifications and new installations for proper wiring. The invention also provides an easy way to create a wire list describing all the interconnections between attached connectors. The tester can also be used as a troubleshooting tool without having a previously learned cable reference. The invention further tests wiring insulation in a wiring harness and identifies poor wire to wire and wire to ground insulation. Finally the present invention provides a system for generating a wiring diagram based upon the results of a wiring validation series of checks/tests.

Abstract: A portable, hand-held meter used to measure direct current (DC) attenuation in low impedance electrical signal cables and signal attenuators. A DC voltage is applied to the signal input of the cable and feedback to the control circuit through the signal cable and attenuators. The control circuit adjusts the applied voltage to the cable until the feedback voltage equals the reference voltage. The “units” of applied voltage required at the cable input is the system attenuation value of the cable and attenuators, which makes this meter unique. The meter may be used to calibrate data signal cables, attenuators, and cable-attenuator assemblies.

Abstract: A gated nanoscale switch operates as a resonant tunneling device. A conductive channel is formed of a pair of conductive molecular wires and a conductive nanoparticle. Each molecular wire is bound, at one end, to the conductive nanoparticle and, at the opposed end, to one of a pair of electrodes. The structure is located upon a dielectric layer that overlies a conductive substrate. The device may be arranged to operate as a switch with the conductive substrate acting as a gate electrode. Alternatively, the device may be employed to measure the electrical (current versus voltage) characteristics of the molecular wires.

Abstract: An apparatus for contactless measurement of carrier concentration and mobility includes a microwave source, a circular waveguide for transmitting microwave radiation to a sample, such as a semiconductor wafer or panel for flat panel displays, at a measurement location, a first detector for detecting the forward microwave power, a second detector for detecting the microwave power reflected from the sample, and a third detector for detecting the Hall effect power. A circular waveguide, carrying only the TE11 mode, is terminated by the sample behind which a short is located. Perpendicular to the plane of the sample (and along the axis of the circular waveguide), a magnetic field is applied. In this configuration, a given incident TE11 wave will cause two reflected waves. One is the ordinary reflected wave in the same polarization as the incident one. A detector is provided to measure this reflected radiation. The other reflected wave is caused by the Hall effect.

Abstract: A device for the comparison of two resistors is based upon analog information carried by currents. The device includes a measurement circuit for extracting the currents from the two resistors to be compared, and copies the currents to a parallel analog-digital converter that carries out the division of the extracted currents. The device converts the ratio of the extracted currents into a digital code that is the image of the ratio of the two resistors. The ratio is constantly re-updated as a function of environmental parameters of the circuit, such as the operating temperature. Also disclosed is a system for correcting the value of integrated compensated resistors. The system implements a device of this kind that does not use a reference voltage generator.

Abstract: A system and method for detecting, measuring, and reporting a time derivate of a current signal (di/dt). A sensing element detects current from a load. The sensing element includes an inductor. The inductor is located in series with the load and includes associated parasitic resistance. A differential potential develops across the inductor and the parasitic resistance. The differential potential is amplified and converted to a single-ended value. The single-ended value is then fed to an analog to digital converter that provides an output representative of di/dt.

Abstract: In an electrostatic capacitance sensor, an electrode is formed on a base board. The electrode is covered with a resist. A conductive rubber includes a first face and a second face. The first face has a fist area and is opposed to the resist. The second face is opposed to the first face. The second face has a second area which is larger that the first area. A flexible click rubber is attached to the second face of the conductive rubber for providing pressure contact of the conductive rubber with respect to the resist.

Abstract: A method is contemplated. According to the method, capacitances in a first resistance/capacitance (RC) extraction corresponding to a circuit are modified. Each capacitance is modified to estimate Miller effect on that capacitance. A ratio of a total capacitance on a first wire after the modification in the first RC extraction to a total capacitance on the first wire before the modification in the first RC extraction is calculated. Capacitances in a second RC extraction that are coupled to the first wire are modified according to the ratio. The second RC extraction is a reduced extraction as compared to the first RC extraction. A timing analysis is performed for the circuit using the second RC extraction with capacitances modified to estimate Miller effect.

Abstract: A system (10) for and method of testing a device under test (DUT) (12) having a plurality of probe pads (14) utilizing a dual probe technique to overcome contact resistance that may be present. The system comprises a plurality of sensing probes (30) and a plurality of forcing probes (32) arranged in pairs consisting of one sensing probe and one forcing probe. Each pair of sensing and forcing probes is provided for contacting one of the probe pads on the DUT. Each forcing probe is in electrical communication with a power supply (20) via a switching matrix (24), and each sensing probe is in electrical communication with a voltage meter (52) via the switching matrix. During testing, at least one of the power supplies provides a voltage to a corresponding forcing probe in contact with a particular probe pad.

Abstract: A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.

Abstract: A method and apparatus for handling small semiconductor devices in the testing of these devices. Multiple devices are mounted within a device strip carrier and are positioned in the testing position. This positioning of the device strip carriers is performed using device strip carrier alignment tools; the device strip carrier can readily be repositioned with respect to the test head/probe card for testing of multiple devices contained within the device strip carrier.

Abstract: A probe card is used for a burn-in screening or inspection applied to a semiconductor wafer. The probe includes a pressure substrate. An elastic member is disposed on the pressure substrate. A wiring substrate is disposed on the elastic member. A spacer is disposed on the pressure substrate and spaced radially outward from a periphery of the wiring substrate. A plurality of bumps are formed on a membrane disposed on the wiring substrate, with electric connection between the bumps and a wiring of the wiring substrate. A ceramic ring is disposed on the spacer for tightly holding a periphery of the membrane.

Abstract: An integrated circuit having a charge pump is tested for excessive current draw by counting the number of times the charge pump cycles in a test interval, storing the result in a register that is used for another purpose during operation and comparing the result with a reference number representing acceptable leakage, thereby identifying latent defects that may become a cause of failure as well as short circuits.

Abstract: An electrical component contains a pad formed of an electrically conductive material. The pad serves for the application of a contact element and is complemented by an electrically conductive edge strip. The pad and the edge strip are isolated from one another. The component which includes the pad on which misalignments or deformations of contact elements which occur in a functionality test can be detected easily and directly without additional analytical devices.

Abstract: Disclosed are an inspection method for a disconnection of a storage capacitor line and an inspection device for the same in an inspection of an array substrate used in a liquid crystal display apparatus. An inspection method for an array substrate is constituted, in which a quantity of charges stored in the storage capacitor becomes C (Vd1−Vcs1) by supplying simultaneously a pulse signal Vd and a pulse signal Vcs to the storage capacitor from a signal line and a Cs line on a TFT array substrate, and an influence of the disconnection of the Cs line is taken into consideration when the above-described quantity of charges is detected in a reading circuit. Note that the above-described inspection is performed not for all the storage capacitors, but for one storage capacitor in each Cs line. Thus, the inspection for all the Cs lines in liquid crystal panels from 14 inch diagonal to 18 inch diagonal is terminated in about 1 to 2 seconds.

Abstract: An electromagnetic generator inspection system that employs a plurality of excitation frequencies and comprises one or more pickup coils that monitor a portion of the interior of a stator core to provide an output that identifies the location, severity and radial depth of any flaw in the insulation covering the laminations that are monitored.

Abstract: In a first aspect, an apparatus is provided that is adapted to multiplex debug signals of an integrated circuit. The apparatus includes at least a first multiplexing circuit and a second multiplexing circuit. The first multiplexing circuit is adapted to receive first debug signals from the integrated circuit and to selectively multiplex at least a first portion of the first debug signals onto a first bus. The second multiplexing circuit is adapted to receive second debug signals from the integrated circuit and to selectively multiplex at least a first portion of the second debug signals onto a second bus. The apparatus further includes a logic circuit adapted to combine any debug signals of the first and second buses onto a third bus. An output stage of the apparatus is adapted to selectively output debug signals of the third bus. Numerous other aspects are provided, as are systems and methods.

Abstract: An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same integrated circuit. A circuit interface provides communication between the field programmable gate array, the mask-programmable gate array and the integrated circuit I/O.

Abstract: A plurality of switching transistors is provided, each connects power supply terminals of a plurality of first circuit blocks to a power supply line, respectively. Among the first circuit blocks, the power supply terminals of the first circuit blocks operating at different timings are connected by an internal power supply line. A power supply control circuit simultaneously turns on the switching transistors connected to the internal power supply line, in response to operation(s) of at least any one of the first circuit blocks connected to the internal power supply line. Since the switching transistors can be shared among the first circuit blocks not operating simultaneously, operation speed of the first circuit blocks can be increased. Since a total size of the switching transistors can be made small, standby current can be decreased. Accordingly, a semiconductor integrated circuit operating at a high speed can be constituted without increasing the standby current.

Abstract: A fully self-sufficient configurable spare gate cell that has two types of inputs: a functional input bus and an equation input bus, whereby the spare gate cell can be transformed into any sum of product operator by the assertion of certain signals to the equation input bus. In a spare state, the functional input buses are connected to an area of pre-defined logic where the need for bug fixes are high. Thus, the spare cell would be automatically placed close to the bug-fix area during the place-and-route phase of chip design, thereby reducing the need to look for routing channels.

Abstract: A simultaneous bidirectional port coupled to a bus combines a synchronization circuit and a clock circuit. The synchronization and clock circuit synchronizes the port with another simultaneous data port coupled to the same bus. A clock driver circuit is provided that is capable of being turned on and off. Prior to synchronization, the clock driver is off, and after synchronization, the clock driver is on. A clock receiver circuit includes a clock detection circuit to detect the presence of an input clock signal. When an integrated circuit is ready to communicate, the output clock driver is turned on and the clock detection circuit is monitored to determine when an input clock signal is received. When both the output clock driver is turned on, and an input clock signal is being received, the simultaneous bidirectional port is synchronized, and communication between integrated circuits can take place.

Abstract: The invention relates to an integrated bus signal hold cell that is coupled with a bus line via a common input/output, and that has at least two inverters for holding the last state of the bus line. The outputs of the inverters are coupled with each other's inputs, respectively. The input of the first inverter is coupled with the input/output. The output of the second inverter is coupled with the input/output. An additional input is provided via which the bus signal hold cell can be charged with a defined test signal. The invention also relates to an integrated bus system and a method for driving a bus signal hold cell and a bus system.

Abstract: A circuit configuration has a transmitter unit connected to a first signal line and a receiver unit connected to a second signal line and is coupled to the transmission unit via a third signal line and a control line. The transmission unit receives and transmits a first bit group to be transmitted and a subsequent, second bit group to be transmitted. The transmission unit respectively identifies a signal state change between bits in the transmitted first bit group and corresponding bits in the received second bit group and determines the number of signal state changes. On the basis of the number thereof, the transmission unit transmits the second bit group to the receiver unit in unaltered or altered form, with altered transmission being indicated by a control signal. By influencing the number of charge reversal operations during signal transmission, the circuit configuration permits an overall reduction in current drawn.

Abstract: An electronic structure for passing signals across voltage differences includes a signal bus segment that includes at least one circuit element. Circuitry connected to the signal bus segment is operatively connected to a voltage source. Signal bus segments and the associated circuitry can be stacked and connected to corresponding stacked voltage sources. This allows a signal to be passed to a particular circuit, regardless of the voltage difference between the source circuit and the desired circuit.

Abstract: A source synchronous interface determines an amount of delay for an incoming data signal and a phase offset for a latch device that latches the incoming data signal. A delay locked loop may be a dual loop delay locked loop, in which case, the loops may use a low jitter, local clock signal and an input clock signal that was transmitted with the data signal. The low jitter, local clock signal may provide a stable source from which to derive good clock signal edge transitions. The input clock signal may be used to determine the long term clock signal drift. A finite state machine within the dual loop delay locked loop may provide the necessary information for the amount of delay and the phase offset. The delay of the incoming data signal is produced by a digital delay line.

Abstract: A method and circuit for mitigating gate leakage during a sleep state. An input pattern may be applied to one or more of a plurality of devices in a circuit, e.g., static circuit, dynamic circuit, during a sleep state. In response to the application of the input pattern, a majority of the devices in the circuit may have a substantially identical voltage at each of its terminals, i.e., the source, gate and drain terminal, thereby mitigating gate leakage.

Abstract: A system and method for hardening an asynchronous combinational logic circuit against Single Event Upset (SEU) is presented. The asynchronous combinational logic circuit is located between two asynchronous registers. A fault detector is used to detect a fault at an output of the asynchronous combinational logic circuit caused by SEU. If the fault detector detects a fault, a first asynchronous register is prevented from clearing stored data and a second asynchronous register is prevented from loading data from the asynchronous combinational logic circuit until the fault is cleared. Further, a timer circuit is used to ensure enough time elapses to allow the asynchronous combinational logic circuit to reevaluate itself. The asynchronous combinational logic circuit reevaluates itself by first propagating a NULL wave front to clear the fault and then propagating the data stored in the first asynchronous register to its outputs.

Abstract: According to one form of the invention, an apparatus includes first timing circuitry, at least one stage of logic circuitry and second timing circuitry. The first timing circuitry has a first data input and a latch with a latch data input coupled to the first data input and a latch data output coupled to an input of the least one stage of logic circuitry. The second timing circuitry has a latch and an edge detector with respective latch and edge detector data inputs coupled to a data output of the at least one stage of logic circuitry. The edge detector has an output coupled to a control input of the second timing circuitry latch for triggering capture of an output data signal on the data output of the at least one stage of logic circuitry responsive to detecting a signal transition.

Abstract: A dynamic circuit with a conditional keeper for burn-in. In the described embodiments, a conditional keeper is provided which is active only during the burn-in test, where the conditional keeper is sized larger than the standard keepers so as to compensate for additional leakage currents in the dynamic circuit.

Abstract: A dynamic logic circuit (30). The dynamic logic circuit comprises a precharge node (30PN) to be precharged to a precharge voltage (VDD) during a precharge phase and a conditional discharge path (30L, 30DT) connected to the precharge node. The conditional discharge path is operable, during an evaluate phase, to conditionally couple the precharge node to a voltage different than the precharge voltage. The dynamic logic circuit also comprises an output (OUT3) for providing a signal in response to a state at the precharge node. Lastly, the dynamic logic circuit comprises voltage maintaining circuitry (30KT1, 30KT2), coupled to the output, for coupling the precharge voltage to the precharge node during a portion of an instance of the evaluate phase when the conditional discharge path is not enabled during the instance of the evaluate phase.

Abstract: An apparatus comprising a polarity switch. The polarity switch may comprise a number of transmission gates. An output of the polarity switch may selectably present either (i) a signal that varies in response to a control signal or (ii) a predetermined logic level that is independent of the control signal.

Abstract: The present invention relates to a system and method for increasing the manufacturing yield of a plurality of memory cells used in cell arrays. A programmable fuse, having both hardware and software elements, is used with the plurality of memory cells to indicate that at least one memory cell is unusable and should be shifted out of operation. The software programmable element includes a programmable register adapted to shift in an appropriate value indicating that at least one of the memory cells is flawed. The hardware element includes a fuse gated with the programmable register. Shifting is indicated either by software programmable fuse or hard fuse. Soft fuse registers may be chained together forming a shift register.

Abstract: The present invention discloses a current sensing circuit and method of a high-speed driving stage, which comprises an input stage, a level converting unit, a feedback unit, a current mirror unit and a current shunting unit. The current sensing circuit is capable of linearly detecting the output current of the driving stage transistors, and directly condensing the detected current to an appropriate value using the geometric ratio of the transistors, so as to facilitate the subsequent signal processing circuit to use it for control purposes.

Abstract: Presence or absence of a differential clock is detected. The voltage of each differential clock line is compared to the common-mode voltage and integrated over time by a capacitor. The capacitor is discharged during the portions of the clock cycle that the differential line is over the common-mode voltage. If the clock stops pulsing the capacitor is charged by a current source to activate a clock-loss signal. The clock-loss detector is ideal for high-frequency operation since each differential clock line is applied to only one transistor gate. The common-mode voltage generates a bias voltage for a differential amplifier that receives the true and complement differential clock lines. Diodes prevent capacitor charging by reverse current flow from the differential amplifier when the clock is inactive. The averaged peak voltage or envelope of the differential input signals is detected.