Abstract: A new class of materials for use in electric and electroluminescent devices having one or more phosphine oxide moieties bonded by single bonds to two outer groups. In embodiments having two or more phosphine oxide moieties, the two or more phosphine oxide moieties are further joined by a bridging group. By selecting appropriate bridging and outer groups, the new class of materials of the present invention enables designers to “tune” the electrical and electroluminescent characteristics of the materials. The phosphine oxide moiety restricts electron conjugation between the bridging and outer groups, isolating the bridging and outer groups from each other, and allowing the photophysical properties of the bridging and outer groups to be maintained in the molecule. The lowest energy component (bridging group or particular outer group) thus defines the triplet state, highest occupied molecular orbital and lowest unoccupied molecular energies for the entire molecule.

Abstract: A conductive paste for multilayer electronic components which is to be directly printed on a ceramic green sheet, the conductive paste comprising a conductive powder, a resin and an organic solvent, wherein the organic solvent comprises at least one solvent selected from an alkylene glycol diacetate and an alkylene glycol dipropionate. A multilayer electronic component is obtained by firing at high temperature an unfired laminate prepared by alternately stacking ceramic green sheets and internal electrode paste layers in which each of the internal electrode paste layers is formed by the above conductive paste. The conductive paste has appropriate viscosity characteristics and long-term stability, which allows manufacturing highly reliable multilayer electronic components having excellent electrical characteristics, without causing sheet attack.

Abstract: Active materials of the invention contain at least one alkali metal and at least one other metal capable of being oxidized to a higher oxidation state. Preferred other metals are accordingly selected from the group consisting of transition metals (defined as Groups 4-11 of the periodic table), as well as certain other non-transition metals such as tin, bismuth, and lead. The active materials may be synthesized in single step reactions or in multi-step reactions. In at least one of the steps of the synthesis reaction, reducing carbon is used as a starting material. In one aspect, the reducing carbon is provided by elemental carbon, preferably in particulate form such as graphites, amorphous carbon, carbon blacks and the like. In another aspect, reducing carbon may also be provided by an organic precursor material, or by a mixture of elemental carbon and organic precursor material.

Abstract: Disclosed herein are second order nonlinear optic polyimide polymers comprising repeating units represented by the formula: wherein each of the substituents is given the definition as set forth in the Specification and Claims. Also disclosed are the preparation processes of these polymers, chromophore-forming compounds for synthesis of these polymers, and the intermediate polymers thereof. The second order nonlinear optic polyimide polymers of formula (I) may be used in the manufacture of electro-optic (EO) devices, such as electro-optic waveguide devices.

Abstract: Described is a photochromic polymer composition including the reaction product of at least one polymerizable photochromic material and at least one other copolymerizable material having a glass transition temperature of less than 23° C. upon polymerization. The photochromic polymer composition is adapted to provide an increased Fade Half Life in the Photochromic Polymer Performance Test as compared to the same photochromic compound used in the reaction product, but free of polymerizable groups. Also described are photochromic articles including the photochromic polymer composition.

Abstract: This invention relates to a method of preventing a combustible object from burning and to a method of extinguishing a burning object by applying a degradable or reversible, insulating, superabsorbent polymer material to the combustible object. The invention also relates to articles of manufacture useful for preventing a combustible object from burning, and for insulating a person or object from increased temperature.

Abstract: A device and method for leading objects through conduit are provided. A conduit leader is provided that is adapted to slide through a conduit and accept objects to be fed through a conduit run. The leader has a bore formed therein to accept objects and a securing means to secure the objects to the leader. The leader is preferably formed from a material that is at least as indurate as the conduit into which the objects are to be fed. The method of using the leader enables a single person to feed objects into a conduit and eliminates several steps required by previous processes used in the art.

Abstract: A lift assembly having a drum rotatably mounted to a frame and linearly translatable with respect to the frame. A plurality of head blocks are connected to the frame along a helical mounting path, wherein linear translation of the drum during takeoff or take-up maintains a predetermined fleet angle between a take off point from the drum and the head block. A loft block is disposed within the frame for defining a vertical cable path from within a footprint of the frame.

Abstract: A cable supporting structure for facilitating the operation of mounting a cable to a boat. The cable includes a cable inner, a cable outer for surrounding the cable inner, and a stepped portion provided on the cable outer. The cable supporting structure includes a bracket mounted to the boat and having a U-shaped groove for storing the cable outer. The U-shaped groove of the bracket extends horizontally or obliquely downward toward the inner side. A holder including U-shaped grooves that fit the stepped portions of the cable for clamping the cable outer is mounted to the bracket.

Abstract: The present invention provides a phase change non-volatile memory material comprising a base material and at least one non-metallic light element selected from the group consisting of boron, carbon, nitrogen and oxygen, wherein the base material has a composition which corresponds to either that of congruent melting of the type with a minimum melting point or that of eutectic melting within the range of ±0.15 atomic fraction for each constituent element, thereby having a melting temperature of 600° C. or lower. The phase change non-volatile memory material according to the present invention may be utilized to reduce the electric power needed for reset/set operation and thermal interference between memory cells.

Abstract: In one embodiment, a method of producing an optoelectronic nanostructure includes preparing a substrate; providing a quantum well layer on the substrate; etching a volume of the substrate to produce a photonic crystal. The quantum dots are produced at multiple intersections of the quantum well layer within the photonic crystal. Multiple quantum well layers may also be provided so as to form multiple vertically aligned quantum dots. In another embodiment, an optoelectronic nanostructure includes a photonic crystal having a plurality of voids and interconnecting veins; a plurality of quantum dots arranged between the plurality of voids, wherein an electrical connection is provided to one or more of the plurality of quantum dots through an associated interconnecting vein.

Abstract: A transistor fabrication method includes forming an electrode overlying a channel of a semiconductor on insulator (SOI) substrate. Source/drain structures are formed in the substrate on either side of the channel. The source/drain structures include a layer of a second semiconductor over a first semiconductor. The first and second semiconductors have different bandgaps. The second semiconductor extends under the gate electrode. The source/drain structures may be formed by doping the source/drain regions and etching the doped regions selectively to form voids. A film of the second semiconductor is then grown epitaxially to fill the void. A film of the first semiconductor may be grown to line the void before growing the second semiconductor. Alternatively, the second semiconductor is a continuous layer that extends through the channel body. A capping layer of the first semiconductor may lie over the second semiconductor in this embodiment.

Abstract: A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.

Abstract: A CMOS image sensor includes a substrate including silicon, a silicon germanium (SiGe) epitaxial layer formed over the substrate, the SiGe epitaxial layer formed through epitaxial growth and doped with a predetermined concentration level of impurities, an undoped silicon epitaxial layer formed over the SiGe epitaxial layer by epitaxial growth, and a photodiode region formed from a top surface of the undoped silicon epitaxial layer to a predetermined depth in the SiGe epitaxial layer.

Abstract: A memory cell with one MOS transistor formed in a floating body region in which the lower surface of the source and drain regions, outside of the source extension and drain extension regions, rests on an insulating layer.

Abstract: There is disclosed herein phosphorescent compounds, uses thereof, and devices including organic light emitting diode (OLEDs) including such compounds. Compounds of interest include: wherein A is Os or Ru The anionic chelating chromophores NˆN, which are formed by connecting one pentagonal ring structure containing at least two nitrogen atoms to a hexagonal pyridine type of fragment via a direct carbon-carbon linkage. L is a neutral donor ligand; the typical example includes carbonyl, pyridine, phosphine, arsine and isocyanide; two neutral L's can also combine to produce the so-called chelating ligand such as 2,2?-bipyridine, 1,10-phenanthroline and N-heterocyclic carbene (NHC) ligand, or bidentate phosphorous ligands such as 1,2-bis(diphenylphosphino)ethane, 1,2-bis(diphenylphosphino)benzene. L can occupy either cis or trans orientation.

Abstract: An object of the present invention is to provide nonvolatile, rewritable, easily-manufactured, and inexpensive storage element, storage device, and semiconductor device, which are superior in switching characteristics and which has low operation voltage. In an element including a first conductive layer, a second conductive layer facing the first conductive layer, and a layer containing at least one kind of an organic compound provided between the first conductive layer and the second conductive layer, the organic compound can be electrochemically doped or dedoped. By feeding current in this element, the organic compound provided between the conductive layers is electrochemically doped, i.e., electrons are transported, whereby the conductivity can be increased by about three to ten digits.

Abstract: Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. A first opening and a second opening are formed in a substrate such that the first opening and the second opening are in communication with each other. A portion of the first opening and the second opening are filled with a conductive material. Semiconductor devices, including the vias of the present invention, are also disclosed. A method of forming semiconductor components, semiconductor components and assemblies resulting therefrom, and an electronic system, including the vias of the present invention, are further disclosed.

Abstract: An LCD device and a method for fabricating the same are disclosed. The LCD device includes a substrate having a pixel region. A gate electrode is formed in the pixel region. A gate insulating film is formed on the substrate including the gate electrode. A conducting layer is formed on the substrate including the gate insulating film. A semiconductor layer containing a nanosemiconductor material is formed on the conducting layer above the gate electrode. Source and drain electrodes overlap opposing sides of the semiconductor layer. A passivation layer is formed on the substrate including the source and drain electrodes. A first contact hole in the passivation layer exposes the drain electrode. A pixel electrode in the pixel region is connected to the drain electrode through the first contact hole.

Abstract: A thin film transistor substrate and method of fabrication is presented. The thin film transistor includes gate and data lines forming a pixel area and separated by a gate insulating layer on a LCD substrate. A thin film transistor in the pixel area has a semiconductor pattern which forms a channel. A pixel electrode in the pixel area contains a transparent conductive film. A gate metal film is adjacent to a portion of transparent conductive film in the pixel area. A semiconductor passivation film is formed by exposing the semiconductor in the channel to an oxygen or nitrogen plasma. A gate pad connected with the gate line contains the transparent film in a pad section and the transparent film and the gate film in a connection area connecting the gate pad and the gate line. A data pad connected with the data line contains the transparent film.

Abstract: A means of forming unevenness for preventing specular reflection of a pixel electrode, without increasing the number of process steps, is provided. In a method of manufacturing a reflecting type liquid crystal display device, the formation of unevenness (having a radius of curvature r in a convex portion) in the surface of a pixel electrode is performed by the same photomask as that used for forming a channel etch type TFT, in which the convex portion is formed in order to provide unevenness to the surface of the pixel electrode and give light scattering characteristics.

Abstract: A method for fabricating an LCD device includes providing first and second substrates; forming an active layer on the first substrate and forming first and second ohmic contact layers on the active layer; forming a first insulation film on the first substrate; forming a gate electrode on the first substrate; forming a second insulation film on the first substrate; forming a pixel electrode on the first substrate; forming a third insulation film on the first substrate; removing a portion of the first to third insulation film to form first and second contact holes, wherein the first contact hole exposes a portion of the first ohmic contact layer and the second contact hole exposes a portion of the second ohmic contact layer; forming a source electrode electrically connected with the first ohmic contact layer within the first contact hole; forming a drain electrode electrically connected with the second ohmic contact layer and the pixel electrode within the second contact hole; and attaching the first and second

Abstract: A method of patterning a semiconductor film is described. According to an embodiment of the present invention, a hard mask material is formed on a silicon film having a global crystal orientation wherein the semiconductor film has a first crystal plane and second crystal plane, wherein the first crystal plane is denser than the second crystal plane and wherein the hard mask is formed on the second crystal plane. Next, the hard mask and semiconductor film are patterned into a hard mask covered semiconductor structure. The hard mask covered semiconductor structured is then exposed to a wet etch process which has sufficient chemical strength to etch the second crystal plane but insufficient chemical strength to etch the first crystal plane.

Abstract: A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.

Abstract: Provided is a silicon carbide epitaxial wafer which is formed on a substrate that is less than 1° off from the {0001} surface of silicon carbide having an ?-type crystal structure, wherein the crystal defects in the SiC epitaxial wafer are reduced while the flatness of the surface thereof is improved.

Abstract: An improved termination structure for high field semiconductor devices in silicon carbide is disclosed. The termination structure includes a silicon carbide-based device for high-field operation, an active region in the device, an edge termination passivation for the active region, in which the edge termination passivation includes, an oxide layer on at least some of the silicon carbide portions of the device for satisfying surface states and lowering interface density, a non-stoichiometric layer of silicon nitride on the oxide layer for avoiding the incorporation of hydrogen and for reducing parasitic capacitance and minimizing trapping, and, a stoichiometric layer of silicon nitride on the nonstoichiometric layer for encapsulating the nonstoichiometric layer and the oxide layer.

Abstract: An integrated LED light system (100) including a printed circuit board (110, 410) and a submount (120, 420) mounted on the printed circuit board (110, 410). System (100) further includes an array of LEDs (125, 425) in electrical communication with the submount (120, 420) to receive forward currents. The array of LEDs (125, 425) includes one or more LEDs for emitting one or more color of lights in response to a reception of the forward currents from the submount (120, 420). System (100) additionally includes a heatsink (130, 430) supporting the printed circuit board (110, 410) to conduct and dissipate heat away from the printed circuit board (110, 410), the submount (120, 420), and the LED(s) (125, 425). System (100) further includes a reflector cup (140, 440) mounted on the printed circuit board (110, 410) and in optical communication with the LED(s) (125, 425) to focus the at least one color of light.

Abstract: A light emitting diode (LED) device having a substantially conformal wavelength-converting layer for producing uniform white light and a method of making said LED at both the wafer and individual die levels are provided. The LED device includes a metal substrate, a p-type semiconductor coupled to the metal substrate, an active region coupled to the p-type semiconductor, an n-type semiconductor coupled to the active region, and a wavelength converting layer coupled to the n-type semiconductor.

Abstract: The present invention relates to an III-nitride semiconductor light emitting device in which a single layer or plural layers made of SixCyNz(x?0, y?0, x+y>0, z>0) are inserted into or under an active layer and it is directed to a technology in which Al(x)Ga(y)In(1-x-y)N (0?x?1, 0?y?1, 0?x+y?1) of the hexagonal structure and SixCyNz(x?0, y?0, x+y>0, z>0) of the hexagonal structure are combined together in view of the properties of the SixCyNz(x?0, y?0, x+y>0, z>0) material.

Abstract: A semiconductor light emitting device comprises an element that emits light and a substrate on a main surface of which the element is mounted. The main surface of the substrate composed of two areas, (i) a mount area which is rectangle and on which the element is mounted, and (ii) a pad area that is equipped with a pad for wire bonding. The pad area is contiguous to the mount area on one side of the mount area, and the pad area decreases in width continuously or stepwise in a direction away from the one side.

Abstract: A light emitting diode comprising a semiconductor layer, a first electrode, a second electrode and a diamond-like carbon layer is provided. The semiconductor layer includes a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer. Wherein, the light emitting layer locates between the first type doped semiconductor layer and the second type doped semiconductor layer. The first electrode is electrically connected to the first type doped semiconductor layer. The second electrode is electrically connected to the second type doped semiconductor layer. The diamond-like carbon layer covers on the semiconductor layer and exposes at least a portion of the first electrode. Moreover, the exposed outer surface of the diamond-like carbon layer is a rough surface. Alternatively, other passivation layer with rough surface can be substituted for the diamond-like carbon layer.

Abstract: A phosphor tape article includes a phosphor layer having a phosphor and a polymeric binder material and a structured surface, and a pressure sensitive adhesive layer disposed adjacent the phosphor layer such that light transmitted through the pressure sensitive layer is received by the phosphor layer through the structured surface. The pressure sensitive layer can also have one or more structured surface, which in some cases can be complimentary with the structured surface of the phosphor layer. Light emitting devices including phosphor tape and methods of making such devices are also disclosed.

Abstract: A light-emitting diode is described. The light-emitting diode comprises a sub-mount, a first conductivity type substrate deposed on the sub-mount, a reflector layer deposed between the sub-mount and the first conductivity type substrate, a first conductivity type buffer layer deposed on the first conductivity type substrate, a first conductivity type distributed Bragg reflector (DBR) layer deposed on the first conductivity type buffer layer, an illuminant epitaxial structure deposed on the first conductivity type distributed Bragg reflector layer, and a second conductivity type window layer deposed on the illuminant epitaxial structure.

Abstract: A light-emitting device with a built-in microlens having a microlens integrated with a semiconductor light-emitting device causing no misalignment of an optical axis is provided. This light-emitting device with a built-in microlens comprises a semiconductor light-emitting device and a microlens, integrated with the semiconductor light-emitting device, formed through light emitted from the semiconductor light-emitting device. Thus, the optical axis of the microlens is automatically aligned in formation of the microlens.

Abstract: A LED backlight module including a diffusion plate, at least an optical devices, at least a light-emitting diode and a second reflection surface is provided. The optical device is provided underneath the diffusion plate and has a first reflection surface. The light-emitting diode is provided underneath the optical device, for emitting light to the first reflection surface where first reflection of the light is performed. The second reflection surface is provided underneath the light-emitting diode, for receiving the light of the first reflection and performing second reflection of the received light. By controlling light paths of LED with the optical devices, light emitted from LED may be leaded to a specific direction instead of directly emitting from a front surface of LED, so as to achieve the performance of color-mixing and uniform distribution.

Abstract: An (Al, Ga, In)N and ZnO direct wafer bonded light emitting diode (LED), wherein light passes through electrically conductive ZnO. Flat and clean surfaces are prepared for both the (Al, Ga, In)N and ZnO wafers. A wafer bonding process is then performed between the (Al, Ga, In)N and ZnO wafers, wherein the (Al, Ga, In)N and ZnO wafers are joined together and then wafer bonded in a nitrogen ambient under uniaxial pressure at a set temperature for a set duration. After the wafer bonding process, ZnO is shaped for increasing light extraction from inside of LED.

Abstract: The invention provides a side-view LED having an LED window opened to a side to emit light sideward. A pair of lead frames each act as a terminal. An LED chip is attached to a portion of the lead frame and electrically connected thereto. A package body houses the lead frames and has a concave formed around the LED chip. Also, a high reflective metal layer is formed integrally on a wall of the concave. A transparent encapsulant is filled in the concave to encapsulate the LED chip, while forming the LED window. In addition, an insulating layer is formed on a predetermined area of the lead frames so that the lead frames are insulated from the high reflective metal layer. The side-view LED of the invention enhances light efficiency and heat release efficiency with an improved side-wall reflection structure.

Abstract: A semiconductor light emitting device includes a package (5) having two or more terminals, two or more semiconductor devices (1,2) mounted in the package to emit lights each having a predetermined wavelength, and a molding unit (3) mixed with a phosphor. The phosphor is excited by the lights emitted from the semiconductor devices to emit light having a wavelength different from those of the lights emitted from the semiconductor devices.

Abstract: In the invention, a substrate and fabrication thereof for a package of at least one semiconductor device, such as semiconductor light-emitting devices, are disclosed. In particular, a base together with a frame supporting the base of the substrate according to the invention is formed of a thick-walled metal material, a special-shaped metal plate or a normal-shaped metal plate. The at least one semiconductor device is to mounted on a top surface of the base. Moreover, the base serves as a heat sink.

Abstract: A vertical structure light emitting diode (LED) and a fabricating method thereof is disclosed, wherein a metal support layer is formed on an upper surface of a light emitting structure by way of electrolytic plating method in which no high temperature process is required to obviate occurrence of defects on the devices, and the metal support layer containing a soft metal and a hard metal is formed on the light emitting structure to prevent occurrence of warping of a wafer to increase the mechanical strength and to improve reliability.

Abstract: A light emitting device is provided. In the light emitting device, a multi-layer for intercepting a reverse voltage applied to an active layer is formed between the active layer and a GaN layer. Accordingly, the reliability and operational characteristic of the light emitting device can be improved.

Abstract: A nitride-based semiconductor element having excellent element characteristics is obtained by obtaining a nitride-based semiconductor layer having excellent crystallinity without performing a long-time etching process. This nitride-based semiconductor element comprises a mask layer, having a recess portion, formed on a substantially flat upper surface of an underlayer to partially expose the upper surface of the underlayer, a nitride-based semiconductor layer formed on the exposed part of the underlayer and the mask layer while forming a void on the recess portion of the mask layer, and a nitride-based semiconductor element layer, formed on the nitride-based semiconductor layer, having an element region.

Abstract: A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region in the first semiconductor region. The second semiconductor region has the first conductivity type and having a second dopant concentration greater than the first dopant concentration. The method also comprises forming a conductive contact to the first semiconductor region and forming a conductive contact to the second semiconductor region. The rectifying diode comprises a current path, and the path comprises: (i) the conductive contact to the first semiconductor region; (ii) the first semiconductor region; (iii) the second semiconductor region; and (iv) the conductive contact to the second semiconductor region. The second semiconductor region does not extend to a layer buried relative to the first semiconductor region.

Abstract: A semiconductor device comprises a pillar layer including first semiconductor pillars of a first conduction type and second semiconductor pillars of a second conduction type formed laterally, periodically and alternately. The first and second semiconductor pillars include a plurality of diffusion layers formed in a third semiconductor layer as coupled along the depth. The diffusion layers have lateral widths varied at certain periods along the depth. An average of the lateral widths of the diffusion layers in one certain period is made almost equal to another between different periods.

Abstract: An indium phosphide based double hetero junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.

Abstract: A layout capable of placing a circuit constituted by a plurality of transistors in a small-with region is automatically formed. A search section inputs data on a circuit and makes a search for a set of routes formed so that passage through any one of the transistors occurs only one time and so that the combination of routes in one set can cover the entire circuit network. An extraction section extracts a set of routes having the smallest number of routes in sets of route found by searching. A width determination section determines the layout width from the widths of source and drain electrodes of each transistor, the width of the region between the source and drain electrodes, the width of the region between some of the adjacent pairs of the transistors not combined into a common electrode, the number of transistors, and the smallest number of routes.

Abstract: Repeater cells each comprising a buffer or an inverter and an n+ diffusion layer-P well type protection diode or a p+ diffusion layer-N well type antenna protection diode connected to an input pin of the buffer or the inverter for preventing antenna damage or an antenna rule error from occurring are previously registered by registration means 511 as the cells to be registered in a cell library 505. Whether or not a wiring conductor conducting to a gate electrode becomes an antenna ratio exceeding an allowed antenna ratio in the semiconductor device is determined by determination means 514 and if the wiring conductor exceeds the allowable antenna ratio, one or more repeater cells are inserted into any point of the wiring conductor by selection means 515.

Abstract: The present invention is related to semiconductor device and method for manufacturing the same. In accordance with the semiconductor device and method for manufacturing the same, at least one opening extending between LDD regions and exposing a buried insulating layer is formed so that a gate electrode surrounds the surface of a channel region. This structure allows the formation of a relatively a thick channel region and decreases the sensitivity of characteristics of the device dependent upon the thickness of the channel region.

Abstract: Field effect transistor integrated circuits include field effect transistors in an integrated circuit substrate, such as a semiconductor substrate. A first one of the field effect transistors has a body effect that is substantially lower than that of a second one of the field effect transistors during operation of the first and second field effect transistors. The field effect transistors may be interconnected to form a circuit, and the body effect of the first field effect transistor is substantially lower than that of the second field effect transistor during operation of the circuit.

Abstract: A semiconductor device including: a semiconductor substrate including an electrode; a resin protrusion formed on the semiconductor substrate; and an interconnect electrically connected to the electrode and formed to extend over the resin protrusion. The interconnect includes a first portion formed on a top surface of the resin protrusion and a second portion formed on a side of a lower portion of the resin protrusion. The second portion has a width smaller than a width of the first portion.