Patents Issued in January 16, 2007
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Patent number: 7164248Abstract: In an electric motor drive apparatus capable of reliably preventing adverse effects on an electric motor, when a control force detected by a torque sensor exceeds a predetermined value, a temperature storing unit stores a temperature detected by a thermistor at that time, and a deviation calculating unit calculates a deviation between the next temperature detected by the thermistor and the temperature stored in the temperature storing unit. When the calculated deviation exceeds a predetermined value, a current limit decision unit sends a limit signal to a current limiting unit. Upon receipt of the limit signal, the current limiting unit gradually decreases the upper limit value of current flowing in the electric motor at a predetermined time interval.Type: GrantFiled: May 6, 2004Date of Patent: January 16, 2007Assignee: Denso CorporationInventor: Jirou Hayashi
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Patent number: 7164249Abstract: A fan control device receives a reference revolution signal to control the rotation speed of a fan. The fan control device includes a reference signal generating module, a revolution modifying module and a fan driving module. The reference signal generating module generates a first reference signal and a second reference signal. The revolution modifying module receives the first reference signal and the second reference signal, and generates a target revolution signal according to the reference revolution signal and the first and second reference signals. The fan driving module receives the target revolution signal and generates a driving signal to drive the fan according to the target revolution signal.Type: GrantFiled: February 16, 2006Date of Patent: January 16, 2007Assignee: Delta Electronics, Inc.Inventors: Chia-Feng Wu, Cheng-Chieh Liu, Ching-Sen Hsieh, Tsung-Jung Hsieh, Yueh-Lung Huang
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Patent number: 7164250Abstract: The driving voltage of the motor is incremented a quantity proportional to the speed of the motor according to a proportionality factor that is adjusted to compensate the back electromotive force. A method includes open-loop voltage control of a DC motor having a certain design speed constant, through a driving signal that is determined for imparting a certain acceleration to the motor and by generating a driving voltage of an output power stage to which the winding of the motor is connected as a function of the driving signal.Type: GrantFiled: February 4, 2005Date of Patent: January 16, 2007Assignee: STMicroelectronics S.r.lInventors: Michele Boscolo, Paolo Capretta
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Patent number: 7164251Abstract: A vibration controller controls vibrations generated in a driven object included in a system subject to vibrations due to the dynamic unbalance or eccentricity of a rotating member driven for rotation by an electric motor. An angular position transforming unit (45) and an angular velocity transforming unit (47) transform the output signal of a rotating motion measuring means (C1) into an angular position and an angular velocity, respectively. A sine calculating unit (55) calculates the sine of an angle obtained by adding up the angular position and a predetermined phase angle provided by a phase adjusting unit (49) by an adder (53). A multiplier (61) calculates the product of the output of a gain adjusting unit (57) that multiplies the output of the sine calculating unit (55) by a predetermined gain and the output of a multiplier (59) that calculates the square of the angular velocity. Again adjusting unit (57?) multiplies the output of a sine calculating unit (55?) by a predetermined gain.Type: GrantFiled: March 12, 2003Date of Patent: January 16, 2007Assignee: Toshiba Elevator Kabushiki KaishaInventor: Mimpei Morishita
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Patent number: 7164252Abstract: An electrically powered hand tool is described and which includes a three phase electrical motor having a plurality of poles; an electrical motor drive electrically coupled with the three phase electrical motor; and a source of electrical power which is converted to greater than about 208 volts three-phase and which is electrically coupled with the electrical motor drive.Type: GrantFiled: July 29, 2005Date of Patent: January 16, 2007Assignee: Battelle Energy Alliance, LLCInventors: Kurt S. Myers, Teddy R. Reed
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Patent number: 7164253Abstract: On end of a reactor (L1) is connected to a positive electrode of a battery (B1) and the other end is connected to a power line via a transistor (Q1) and to the ground via a transistor (Q2). By PWM control of the transistors (Q1, Q2), an arbitrary increased voltage is obtained in the power line. It is possible to obtain an optimal inverter input voltage (power line voltage) according to the motor drive state, thereby increasing efficiency. Thus, it is possible to optimize the inverter input voltage according to the motor drive condition.Type: GrantFiled: July 31, 2002Date of Patent: January 16, 2007Assignee: Toyota Jidosha Kabushiki KaishaInventors: Eiji Sato, Sumikazu Shamoto, Masayuki Komatsu, Ryoji Oki, Makoto Nakamura
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Patent number: 7164254Abstract: Methods and apparatus for reducing the common mode voltage generated by eliminating zero-voltage vectors in a rectifier/inverter variable frequency drive (VFD) system includes comparing three phase voltages to each other to determine a maximum voltage in one phase, a minimum voltage in another phase and a middle voltage in still another phase, inverting phase voltages for one phase having the maximum voltage and another phase having the minimum voltage, comparing the phase voltages to a carrier wave to determine gating signals for three respective phases of the inverter, and inverting gating signals for the one phase having the maximum voltage and for another phase having the minimum voltage to reduce the common mode voltage in the motor.Type: GrantFiled: February 28, 2005Date of Patent: January 16, 2007Assignee: Rockwell Automation Technologies, Inc.Inventors: Russel J. Kerkman, Qiang Yin, Haihui Lu
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Inductive battery charger system with primary transformer windings formed in a multi-layer structure
Patent number: 7164255Abstract: There is provided a planar inductive battery charging system designed to enable electronic devices to be recharged. The system includes a planar charging module having a charging surface on which a device to be recharged is placed. Within the charging module and parallel to the charging surface is at least one and preferably an array of primary windings that couple energy inductively to a secondary winding formed in the device to be recharged. The invention also provides secondary modules that allow the system to be used with conventional electronic devices not formed with secondary windings.Type: GrantFiled: December 10, 2004Date of Patent: January 16, 2007Assignee: City University of Hong KongInventor: Shu-yuen Ron Hui -
Patent number: 7164256Abstract: The present invention relates to a method and a device for ascertaining the electric power, provided by a battery and a generator, available in a motor-vehicle electrical system. To determine the available electric power, both a battery model and a generator model are provided, from which the battery reserve power and the generator reserve power may be ascertained. The total power available in the vehicle electrical system is finally determined from the battery reserve power and the generator reserve power.Type: GrantFiled: April 10, 2002Date of Patent: January 16, 2007Assignee: Robert Bosch GmbHInventors: Dirk Mentgen, Frank Buchholz
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Patent number: 7164257Abstract: A system and method for battery protection. In some aspects, a battery pack including a housing, a cell supported by the housing and power being transferable between the cell and an electrical device, a circuit supported by the housing and operable to control a function of the battery pack, and a heat sink in heat transfer relationship with the circuit and operable to dissipate heat from the circuit.Type: GrantFiled: December 30, 2005Date of Patent: January 16, 2007Assignee: Milwaukee Electric Tool CorporationInventors: Todd W. Johnson, Dennis J. Grzybowski, Mark A. Kubale, Jay J. Rosenbecker, Karl F. Scheucher, Gary D. Meyer, Jeffrey M. Zeiler, Kevin L. Glasgow
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Patent number: 7164258Abstract: Circuits and methods to correct the load sharing in multiphase switching regulators are provided. Using these systems and methods, the input capacitor voltage signal can be sampled and used for current sensing of the regulator's stages. Differences in the amount of output current for a converter stage can then be determined. Corrections needed to equalize the output current of the converter stages can then be determined and carried out.Type: GrantFiled: July 1, 2005Date of Patent: January 16, 2007Assignee: Linear Technology CorporationInventor: Christopher B Umminger
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Patent number: 7164259Abstract: An apparatus and method for producing an output reference voltage is provided. A voltage divider is configured to provide the output reference voltage from a bandgap reference voltage. The bandgap reference voltage is applied across a biased portion of the voltage divider. Additionally, a second-order temperature coefficient (TC) of the impedance of a controllable portion of the voltage divider is adjusted in response to a second-order trim signal. The first and zeroth order TCs of the controllable portion of the voltage divider are substantially independent of the second-order trim signal. In one embodiment, the controllable portion includes a resistor digital-to-analog converter (DAC) that is responsive to the second-order trim signal. The resistor DAC includes at least two different types of resistors. The second-order TCs of the two different types of resistors are substantially different.Type: GrantFiled: March 16, 2004Date of Patent: January 16, 2007Assignee: National Semiconductor CorporationInventors: David James Megaw, Paul Ranucci
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Patent number: 7164260Abstract: A CMOS bandgap reference (BGR) voltage generator circuit has a passive resistor T-network of low resistance connected between the inverting and non-inverting inputs of the op-amp in the circuit. The op-amp's output is connected to the gates of three PMOS transistors and the drains of two of the transistors are connected in a looped manner to the input terminals of the op-amp. The T-network is placed between these drains that connect to the op-amp. Becuse of the rules governing abstracts, this abstract should not be used to construe the claims.Type: GrantFiled: November 17, 2005Date of Patent: January 16, 2007Assignee: Micron Technology, Inc.Inventor: Philip Neaves
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Patent number: 7164261Abstract: A resonance-frequency measuring method is used for measuring a resonance frequency of an information recording/reproducing device reproducing information recorded on a medium by driving a mechanism unit. The resonance-frequency measuring method includes the measuring step of applying sine-wave oscillations at different frequencies one by one to the mechanism unit, and counting the number of times information reproduced upon application of each of the sine-wave oscillations differs from information indicating an aimed location, and the resonance-frequency determining step of determining the resonance frequency according to the number of times counted in the measuring step.Type: GrantFiled: April 15, 2004Date of Patent: January 16, 2007Assignee: Fujitsu LimitedInventors: Shuichi Hashimoto, Ryuki Kubohara, Tatsuhiko Kosugi, Takeyori Hara, Yoshiyuki Kagami
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Patent number: 7164262Abstract: A typical probe comprises a sensor, and a connection head that includes a conversion circuit for driving the sensor. The probe communicates with a controller via a two wire DC 4-20 mA link. The conversion circuit is also known as a two-wire transmitter. The conversion circuit and the sensor are connected to each other (and to the external link) via screw terminals usually located at the circuit top face. The invention provides a conversion circuit and a matching base forming plug and socket type connections. On the converter circuit, the connections are moved from the top of the circuit, to the bottom of the circuit, thus clearing space for an integral display. The sensor and the link wires are attached to the base socket. The conversion circuit fits into the socket in only a single orientation, thus ensuring correct coupling of the wires to the circuit elements.Type: GrantFiled: March 10, 2004Date of Patent: January 16, 2007Inventor: Ely Zacay
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Patent number: 7164263Abstract: A current sensor is described that uses a plurality of magnetic field sensors positioned around a current carrying conductor. The sensor can be hinged to allow clamping to a conductor. The current sensor provides high measurement accuracy for both DC and AC currents, and is substantially immune to the effects of temperature, conductor position, nearby current carrying conductors and aging.Type: GrantFiled: January 7, 2005Date of Patent: January 16, 2007Assignee: FieldMetrics, Inc.Inventors: Christopher Paul Yakymyshyn, Michael Allen Brubaker, Pamela Jane Yakymyshyn
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Patent number: 7164264Abstract: A method and system for dynamic characterization observability using functional clocks for system or run-time process characterization. Silicon characterization circuitry may be read after silicon chips have been assembled in a package and installed in a system. A characterization circuit comprising one or more oscillators generates signal pulses, wherein the signal pulses represent a frequency of a circuit in the processor chip. A sampler circuit is connected to the characterization circuit, wherein the sampler circuit counts the number of the signal pulses from the characterization circuit within a predetermined time period. A control unit is connected to the sampler circuit, wherein the control unit comprises macros for collecting count data from the one or more oscillators to determine the silicon characterization. Based on the silicon characterization, the optimal operating frequency of the processor chip may be identified, as well as possible lifetime degradation of circuits on the chip.Type: GrantFiled: February 10, 2005Date of Patent: January 16, 2007Assignee: International Business Machines CorporationInventors: Carl John Anderson, Michael Stephen Floyd, Brian Chan Monwai
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Patent number: 7164265Abstract: A bearing unit for a vehicle wheel hub is associated with a rotation sensing device and an electromagnetic inductive coupling. The rotation sensing device comprises an impulse ring (18) secured for rotation with the rotatable race (13) of the bearing unit by means of a rotatable annular carrier (19), and a magnetic/electric transducer (20) mounted to the stationary race (12) of the bearing unit by means of a stationary annular carrier (21) and operatively facing the impulse ring (18). The electromagnetic inductive coupling comprises a stationary coil (24) electrically connectable to a power supply (32) and carried by the stationary annular carrier (21), and a rotatable coil (25) electrically connectable (26) to an electric or electronic device mounted on the wheel. The rotatable coil (25) is carried by the rotatable annular carrier (19) and is electromagnetically linked to the stationary coil (24).Type: GrantFiled: June 30, 2004Date of Patent: January 16, 2007Assignee: Aktiebolaget SKFInventors: Bruno Giai, Alexander Molenaar, Simona Pilone, Simon Van Ballegooij
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Patent number: 7164266Abstract: A nuclear magnetic resonance (NMR) logging system for measuring fluid properties of formation penetrated by a well borehole. The system uses a conductive permanent magnet to generate a field H0. The conductive permanent magnet is disposed within a logging tool so that the H0 field is perpendicular to the axis of the borehole. Soft ferrite elements are disposed on each pole of the permanent conductive magnet and a RF coil is disposed about both the permanent magnet and the ferrite. The resulting H1 field induced by the RF coil is perpendicular to both the H0 and the axis of the borehole. The soft ferrite elements focus the conductive permanent magnetic field and increase the effectiveness of the RF antenna. A two coil embodiment is disclosed that produces a combined RF field which is substantially perpendicular to the static magnetic field external to the conductive permanent magnet, and is contained within the soft ferrite elements in the vicinity of said conductive permanent magnet.Type: GrantFiled: March 7, 2003Date of Patent: January 16, 2007Assignee: Precision Energy Services, Inc.Inventor: MacMillan Wisler
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Patent number: 7164267Abstract: Apparatus and method for providing in-situ data of formation fluids at true reservoir conditions. The apparatus has NMR chamber of the flow-through type, so it is no longer necessary to divert a sample for the basic NMR analysis or transfer it uphole for laboratory analysis. The apparatus is preferably modular and is compatible with wireline tools configurable for a variety of sampling, testing and monitoring purposes. Fluid properties such as viscosity can be derived from diffusivities and relaxation times, as measured by NMR. Additional accuracy is provided in the downhole sampling process, and in the interpretation of NMR logs in real time at true reservoir conditions.Type: GrantFiled: April 23, 2004Date of Patent: January 16, 2007Inventors: Manfred G. Prammer, John C. Bouton, Peter Masak, Earle D. Drack
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Patent number: 7164268Abstract: A magnetic resonance imaging “MRI” method and apparatus for lengthening the usable echo-train duration and reducing the power deposition for imaging is provided. The method explicitly considers the t1 and t2 relaxation times for the tissues of interest, and permits the desired image contrast to be incorporated into the tissue signal evolutions corresponding to the long echo train. The method provides a means to shorten image acquisition times and/or increase spatial resolution for widely-used spin-echo train magnetic resonance techniques, and enables high-field imaging within the safety guidelines established by the Food and Drug Administration for power deposition in human MRI.Type: GrantFiled: December 21, 2001Date of Patent: January 16, 2007Assignee: University of Virginia Patent FoundationInventors: John P. Mugler, III, James R. Brookeman
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Patent number: 7164269Abstract: A solenoid-type probe coil wherein superconductive thin film is used, whose quality factor is high, and which is put in an uniform magnetic field and occupies a small space is provided. For that purpose, the coil is made by piling up, in generally parallel, two or more substrates on which superconductive film is formed and connecting superconductors and normal-metal thin films through capacitance or low contact resistance.Type: GrantFiled: July 26, 2005Date of Patent: January 16, 2007Assignee: Hitachi, Ltd.Inventors: Haruhiro Hasegawa, Hisaaki Ochi, Hiroyuki Yamamoto, Kazuo Saitoh
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Patent number: 7164270Abstract: A dynamic magnetic locator includes a linking mechanism linked with a first sensor to horizontal move or rotate the first sensor; a second sensor horizontally arranged beside the first sensor; a third sensor vertically arranged atop the second sensor; and a control module connected to the sensors and receiving magnetic signals of the underground metal pipe. The control module controls the linking mechanism to horizontal move or to rotate the first sensor to obtain a plurality of magnetic signals. The control module processes the magnetic signals to obtain a position and a depth of an underground metal pipe.Type: GrantFiled: December 19, 2005Date of Patent: January 16, 2007Assignee: Industrial Technology Research InstituteInventors: Po-Shen Chen, Wen-Nan Huang, Mu-Ping Chen
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Patent number: 7164271Abstract: An ion current detecting device includes an ion current detecting unit which detects ion current based on combustion ion generated after an ignition which is performed in a combustion chamber and an amplifier unit which amplifies ion current detected by the ion current detecting unit. The amplifier unit has an amplification rate which is set so that an output amplified ion current varies nonlinearly with ion current of the ion current detecting unit. Thus, the amplifier unit enables the amplification rate to vary according to a level of ion current. Therefore, ion current can be detected correctly even if a minute ion current is generated when the spark plug malfunctions etc., and even if ion current becomes higher.Type: GrantFiled: January 13, 2006Date of Patent: January 16, 2007Assignee: Denso CorporationInventor: Koji Ando
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Patent number: 7164272Abstract: Modular unit connectable to a battery for monitoring its condition and protecting, including a housing which is directly connectable to the B battery posts of by means of receptor terminals clamped to said posts, the housing containing a first BD module, used to perform a disconnection of the supply of energy from said B battery; a second electronic module BM, used for a dynamic measurement of the B battery's state of health (SOH) and charge (SOC); a third electronic LCM module, used to control and manage all or part of the charges that supply said B battery, and a fourth electronic PDFS module, used to control the distribution of power supplied by said B battery.Type: GrantFiled: October 13, 2000Date of Patent: January 16, 2007Assignee: Lear Automotive (EEDS) Spain, S.L.Inventors: Carles Borrego Bel, Joan Fontanilles Pinas, Daniel Guasch Murillo, Gerard Vall Gendre
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Patent number: 7164273Abstract: A power source monitor and method to monitor various operating line conditions of an electrical power outlet comprising measuring line voltage and frequency, analyzing wiring conditions, displaying the line conditions and generating an alarm when any of the line conditions are not within a corresponding predetermined range.Type: GrantFiled: May 17, 2004Date of Patent: January 16, 2007Inventor: David Bailey
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Patent number: 7164274Abstract: A system and method are used to determine connectivity and/or cable faults of a cable. A signal transmitting and receiving system is coupled to the cable. An analog-to-digital converter (ADC) coupled to the signal transmitting and receiving system. A TDR system coupled to the ADC and a memory, and a controlling system coupled to at least one of the ADC, the TDR system, and the signal receiving and transmitting system.Type: GrantFiled: May 28, 2004Date of Patent: January 16, 2007Assignee: Broadcom CorporationInventors: Art Pharn, Peiqing Wang, Siavash Fallahi
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Patent number: 7164275Abstract: A technique for determining inductive and resistive components of power line impedance. A measurement circuit switches a burden or drain resistor between power line conductors to cause a droop or sag in a voltage waveform. The voltage waveform is sampled prior to inclusion of the resistor in the circuit, as well as after to identify the droop. The short circuit between the power lines is then removed by opening the circuit and a capacitor in the test circuitry causes a resonant ring due to the inductive component of the power line impedance. Based upon the period or frequency of the resonant ring, and upon the voltage measurements with and without the resistor in the circuit, the inductive and resistive components of power line impedance can be computed.Type: GrantFiled: September 30, 2004Date of Patent: January 16, 2007Assignee: Rockwell Automation Technologies, Inc.Inventor: Michael Lee Gasperi
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Patent number: 7164276Abstract: A method for determining the wall thickness of a metal tube is described. This method has the following features: (a) preparation of a metal tube of a determined length; (b) arrangement of two clamp contacts on the metal tube with an exactly defined distance of separation; (c) connection of the ends of the metal tube with a power source; and (d) measurement of the voltage drop in the metal tube between the clamp contacts.Type: GrantFiled: October 26, 2005Date of Patent: January 16, 2007Inventors: Klaus Porcher, Christian Frohne
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Patent number: 7164277Abstract: A method for inspecting an electronic circuit formed on a board with a peripheral circuit includes steps of providing a terminal for inputting and outputting an electronic signal, providing an impedance increase means for increasing an impedance of an electrical connection between the electronic circuit and the peripheral circuit and providing an inspection means for inspecting the electronic circuit. The impedance of the electronic circuit is increased to prevent influence of the peripheral circuit before and during inspection of the electronic circuit, and the increase of the impedance is removed after the inspection.Type: GrantFiled: April 13, 2006Date of Patent: January 16, 2007Assignee: Denso CorporationInventors: Toshiro Nishimura, Hideki Kabune
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Patent number: 7164278Abstract: Disclosed is a device for releasable connecting an interface with a load board for providing a mechanically pressing of the components against each other. The device comprises a toroidal lock, which is operated by at least one lever to transmit the lock from a releasing position to a locking position. This device enables a quick change of Load boards to the interface with a reproducible positioning. The load board may include extensions, such as rollers, that enter slot-like guides in the toroidal lock and that are to be retained in these guides when the lock is rotated to a locking position.Type: GrantFiled: April 1, 2005Date of Patent: January 16, 2007Assignee: Agilent Technologies, Inc.Inventor: Peter Hirschmann
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Patent number: 7164279Abstract: An interconnect assembly for evaluating a probe measurement network includes a base, respective inner and outer probing areas in mutually coplanar relationship on the upper face of the base, a reference junction, and a high-frequency transmission structure connecting the probing areas and the reference junction so that high-frequency signals can be uniformly transferred therebetween. A preferred method for evaluating the signal channels of the network includes connecting a reference unit to the reference junction and successively positioning each device-probing end that corresponds to a signal channel of interest on the inner probing area.Type: GrantFiled: December 9, 2005Date of Patent: January 16, 2007Assignee: Cascade Microtech, Inc.Inventors: Eric W. Strid, Jerry B. Schappacher, Dale E. Carlton, K. Reed Gleason
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Patent number: 7164280Abstract: An electrical test device, in particular for testing wafers, having a contact head, which is associated with the test object and is provided with pin-shaped contact elements that are arrayed to form a contact pin arrangement. An electrical connection apparatus, including contact faces which are in touching contact with ends of the contact elements which face away from the test object. A centering device, which permits only radial play for thermal expansion by sliding guides, for centrally aligning the contact head and the connection apparatus with respect to one another.Type: GrantFiled: May 12, 2005Date of Patent: January 16, 2007Assignee: Feinmetall GmbHInventor: Gunther Böhm
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Patent number: 7164281Abstract: A method of assembling multiple electronic components to a circuit board includes securing one electronic component to the circuit board, then, creating an association between that electronic component and an environmental condition recorder. The method further includes recording data from the environmental condition recorder. The recorded data indicates exposure of the secured electronic component to an environmental condition over time. The method also includes determining, based on the stored data, whether the secured electronic component is suitable for exposure to conditions associated with securing a second electronic component to the circuit board.Type: GrantFiled: February 20, 2004Date of Patent: January 16, 2007Assignee: Accu-Assembly IncorporatedInventor: Yuen-Foo Michael Kou
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Patent number: 7164282Abstract: A method of determining an average electrical response to a conductive layer on a set of substrates vibrating about a vibration mean is disclosed. The method includes positioning a sensor near a position on a first substrate; and measuring a first plurality of electrical responses, wherein each of the first plurality of electrical responses is function of an electrical film property response and a first substrate proximity response. The method also includes positioning the sensor near the position on a second substrate; and measuring a second plurality of electrical responses, wherein each of the second plurality of electrical responses is function of the electrical film property response and a second substrate proximity response.Type: GrantFiled: March 28, 2005Date of Patent: January 16, 2007Assignee: Lam Research CorporationInventors: Andrew D. Bailey, III, Michael Leonard, Benjamin W. Mooring, Candi Kristoffersen
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Patent number: 7164283Abstract: Auto-recovery wafer testing apparatus and wafer testing method are provided. The wafer testing apparatus includes a main system, a tester and a real-time accessing module. The main system controls the process of the wafer testing. The tester is electrically coupled to the main system for receiving commands from the main system to perform testing on a plurality of chips sequentially and output the testing data correspondingly. The real-time accessing module is electrically coupled to the tester for simultaneously accessing the testing data. In an event when the testing is accidentally interrupted, the tester can produce auto-recovery data according to the testing data saved in the real-time accessing module, and continue testing, based on the auto-recovery data, from the chip being last but incompletely tested. The use of the wafer testing apparatus and method can save testing time and enhance the production efficiency.Type: GrantFiled: July 5, 2005Date of Patent: January 16, 2007Assignee: Powerchip Semiconductor Corp.Inventors: Chiou-Ping Wu, Hsiu-Min Lin
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Patent number: 7164284Abstract: A system for characterizing the temporal luminance response of a liquid crystal display. A liquid crystal display may be forced at an initial time from a first luminance value to a measured second luminance value. The second luminance value may be measured at a predetermined time after the initial time.Type: GrantFiled: October 13, 2004Date of Patent: January 16, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Hao Pan, Xiao-fan Feng, Scott J. Daly
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Patent number: 7164285Abstract: Power measurement and control in transmission systems are affected by changes in load conditions. A method and system are provided for detecting and controlling power levels independent of such load conditions.Type: GrantFiled: September 8, 2005Date of Patent: January 16, 2007Assignee: Stratex Networks, Inc.Inventors: Yen-Fang Chao, Cuong Nguyen, Roland Matian
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Patent number: 7164286Abstract: A signal transmission system includes a transmitter and a receiver connected via a transmission line. When a control circuit 103 in the transmitter 200 outputs a test signal to a transmission line 123, a voltage detection section 112 in the receiver 210 determines whether a voltage value on a terminal 115 falls within a given range or not. Based on the result, the control signal generation section 113 generates an instruction as to whether or not to change the current amount of the driving current. The control circuit 103 in the transmitter 100 drives the transmission line 123 with the driving current increased or decreased based on the instruction, and again outputs a test signal. This process is repeated until the voltage on the terminal 115 of the receiver 210 comes into the range. As a result, an optimum output impedance for the control circuit 103 of the transmitter 200 can be obtained.Type: GrantFiled: June 18, 2004Date of Patent: January 16, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Yoshitaka Yaguchi
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Patent number: 7164287Abstract: The present invention provides a semiconductor device that can shorten the initialization cycle of impedance matching of interface buffers and reduce as much as possible affects on other circuits at the time of fine control thereafter. The semiconductor device (1) includes interface buffers (18a to 18c) whose internal impedances are controlled by impedance control data and an impedance control circuit (35) that generates the impedance control data. The impedance control circuit includes a first impedance control mode that initially generates the impedance control data by a binary search and comparison operation resulting from predetermined impedance control steps and sets the impedance control data in the interface buffers, and a second impedance control mode that updates the impedance control data set in the interface buffers by a sequential comparison operation resulting from the predetermined impedance control steps.Type: GrantFiled: October 21, 2004Date of Patent: January 16, 2007Assignee: Renesas Technology Corp.Inventor: Hiroki Ueno
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Patent number: 7164288Abstract: An electronic circuit has a programmable logic cell with a plurality of programmable logic units that are capable of being configured to operate in a multi-bit operand mode and a random logic mode. The programmable logic units are coupled in parallel between an input circuit and an output circuit. The input circuit can be configured to supply logic input signals from the same combination of the logic inputs to the programmable logic units in the random logic mode. In the multi-bit operand processing mode the input circuit is configured to supply logic input signals from different ones of the logic inputs to the programmable logic units. The programmable logic units are coupled to successive positions along a carry chain at least in the multi-bit operand mode, so as to process carry signals from the carry chain.Type: GrantFiled: February 12, 2004Date of Patent: January 16, 2007Assignee: Koninklijke Philips Electronics N. V.Inventor: Katarzyna Leijten-Nowak
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Patent number: 7164289Abstract: Memory performance in programmable logic is significantly increased by adjusting circuitry operation to adjust for variations in process, voltage, or temperature. A calibration circuit adjusts control signal timing, dynamically and automatically, to compensate real time to process, voltage, and temperature variation. A feedback system using a control block and a dummy mimicking concept are provided.Type: GrantFiled: January 21, 2005Date of Patent: January 16, 2007Assignee: Altera CorporationInventors: Kok Heng Choe, Edwin Yew Fatt Kok, Kar Keng Chua
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Patent number: 7164290Abstract: The embodiments of the present invention relate to the general area of the Field Programmable Gate Arrays, and, in particular to the architecture and the structure of the building blocks of the Field Programmable Gate Arrays. The proposed logic units, as separate units or cluster of units, which are mainly comprised of look-up tables, multiplexers, and a latch, implement functions such as addition, subtraction, multiplication, and can perform as shift registers, finite state machines, multiplexers, accumulators, counters, multi-level random logic, and look-up tables, among other functions. Having two outputs, the embodiments of the logic unit can operate in split-mode and perform two separate logic and/or arithmetic functions at the same time. Clusters of the proposed logic units, which utilize local interconnections instead of traditional routing channels, add to efficiency, speed, and reduce required real estate.Type: GrantFiled: October 26, 2004Date of Patent: January 16, 2007Assignee: KLP International, Ltd.Inventor: Guy Schlacter
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Patent number: 7164291Abstract: System and method for providing power with a large on-current and small off-current to circuitry in an integrated circuit. A preferred embodiment comprises a switch for providing power to circuits in an integrated circuit made from a PMOS transistor and an NMOS transistor coupled in parallel. Each transistor's gate terminal is coupled to a separate control signal line. The PMOS transistor provides current to the circuits at high voltage supply levels while the NMOS transistor provides current to the circuits at low voltage supply levels, wherein the size of the PMOS and NMOS transistor can be changed during design to meet power requirements. Depending upon power requirements, multiple PMOS and NMOS transistors may be used. The combination of PMOS and NMOS transistors permit the use of limited fabrication processes wherein transistor widths can be limited.Type: GrantFiled: August 11, 2004Date of Patent: January 16, 2007Assignee: Texas Instruments IncorporatedInventors: Hugh T. Mair, David B. Scott, Rolf Lagerquist
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Patent number: 7164292Abstract: Systems and methods for reducing electrical noise generated during bus turnaround in signal transfer systems are provided. These systems include differential drivers having current sources continuously coupled to a signal bus during all operating modes of the drivers. A first transistor of the driver couples a first signal line of the bus to the driver current source and a second transistor of the driver couples a second signal line of the bus to the driver current source. Each transistor receives control signals in accordance with the operating mode of the driver. These control signals continuously and selectively couple the current source to the bus lines in a manner which provides uniform current distribution across the bus during all driver operating modes. The uniform current distribution across the bus minimizes interruptions in driver current dissipation and any effects from self-induced supply noise during signal transfers.Type: GrantFiled: June 12, 2004Date of Patent: January 16, 2007Assignee: Rambus Inc.Inventors: Ralf Schmitt, Xingchao Yuan
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Patent number: 7164293Abstract: A circuit (50) that receives dynamic signals performs both logic and latching to achieve high speed operation. The circuit has a clock that defines both an evaluation phase and a precharge phase in which the dynamic signals are evaluated during the evaluation phase. The circuit (50) functions by precharging a latch node (INT) during the evaluation phase then performing evaluation as well during the evaluation phase. The evaluation results in providing a valid logic state to the latch node. A latch circuit (54) latches this valid state during the precharge phase and holds it in this valid state during the precharge phase. This can be adapted to select which one of the dynamic signals is to be coupled and latched on the latch node (INT).Type: GrantFiled: July 29, 2004Date of Patent: January 16, 2007Assignee: Freescale Semiconductor, Inc.Inventors: Ravindraraj Ramaraju, George P. Hoekstra, Jeremiah T. Palmer
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Patent number: 7164294Abstract: One aspect disclosed herein relates to a method for forming a programmable logic array. Various embodiments of the method include forming a first logic plane and a second logic plane, each including a plurality of logic cells interconnected to implement a logical function. Forming the logic cells includes forming a horizontal substrate with a source region, a drain region, and a depletion mode channel region separating the source and the drain regions, and further includes forming a number of vertical gates located above different portions of the depletion mode channel region. At least one vertical gate is separated from the depletion mode channel region by a first oxide thickness, and at least one of the vertical gates is separated from the depletion mode channel region by a second oxide thickness. Other aspects and embodiments are provided herein.Type: GrantFiled: August 30, 2004Date of Patent: January 16, 2007Assignee: Micron Technology, Inc.Inventors: Leonard Forbes, Kie Y. Ahn
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Patent number: 7164295Abstract: A feedback control system and method thereof are provided. The feedback control method includes (a) comparing the level of a reference signal with the levels of first and second signals, (b) if the levels of the first and second signals are lower than the level of the reference signal, generating a first control signal, if the levels of the first and second signals are higher than the level of the reference signal, generating a second control signal, and if the level of the reference signal is between the level of the first signal and the level of the second signal, generating a third control signal, (c) controlling the level of an output signal in response to the first through third control signals, and (d) outputting the controlled output signal and generating the first signal and the second signal.Type: GrantFiled: May 18, 2004Date of Patent: January 16, 2007Assignee: Samsung Electronics Co., Ltd.Inventor: In-young Chung
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Patent number: 7164296Abstract: A multiplexer circuit for selecting one of first and second input signals based on a first input select signal includes a multiplexer, a control circuit and an enable buffer. The multiplexer selects one of the first and second input signals based on a second input select signal generated by the control circuit and provides a second output signal. The control circuit receives the second output signal and the first input select signal to generate the second input select signal and an enable signal where the signals have transitions synchronized to the transitions of the second output signal. The enable buffer operates to allow or disallow the second output signal to be passed as the output signal of the multiplexer circuit in response to the enable signal. The multiplexer circuit operates to eliminate runt pulse generation during the switching over of the input signals to provide an error-free output data stream.Type: GrantFiled: September 21, 2004Date of Patent: January 16, 2007Assignee: Micrel, Inc.Inventors: Uwe Biswurm, Bernd Neumann
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Patent number: 7164297Abstract: A clock synthesizer for dividing a source clock by N.R including a logic circuit, a delay line, a select circuit, an accumulator, and a clock divider circuit. The logic circuit divides N.R by 2M to get NNEW.RNEW in which NNEW is zero and RNEW is at least 0.5. The delay line receives a first clock and has multiple delay taps, where the first clock is based on the source clock. The select circuit selects the delay taps based on a tap select value and provides a delayed clock. The accumulator adds RNEW for each cycle of the delayed clock and performs a modulo function on a sum value to generate the tap select value. The clock divider circuit transitions an output clock based on selected transitions of the delayed clock, which is achieved by dividing the first clock or the delayed clock by 2M?1.Type: GrantFiled: March 31, 2005Date of Patent: January 16, 2007Assignee: Freescale Semiconductor, Inc.Inventor: Cinda L. Flynn