Abstract: As means for solving a problem of a positional shift of a land and a hole which is caused by an alignment in the formation of an etching resist layer and a plated resist layer in a method of manufacturing a circuit board, there are provided a method of manufacturing a circuit board including the steps of forming a first resin layer on a surface of an insulating substrate having a conductive layer on the surface and an internal wall of a through hole or/and a non-through hole, forming a second resin layer which is insoluble or slightly soluble in a developing solution for the first resin layer on the first resin layer provided on the surface conductive layer, and removing the first resin layer provided over the hole with the developing solution for the first resin layer, and a method of manufacturing a circuit board including the step of uniformly charging a surface of the first resin layer to induce a potential difference to the first resin layer provided over the hole and the first resin layer provided on th

Abstract: A circuit board structure embedded with semiconductor chips is proposed. A semiconductor chip is received in a cavity of a supporting board. A dielectric layer and a circuit layer are formed on the supporting board and the semiconductor chip. A plurality of hollow conductive vias are formed in the dielectric layer for electrically connecting the circuit layer to the semiconductor chip. By providing the hollow conductive vias of present invention, the separating results of different coefficients of expansion and thermal stress are prevented, and thus electrical function of products is ensured.

Abstract: A circuit board including a first surface, a second surface, and a third surface is provided. The first surface has a first conductive region, and the second surface is opposite to the first surface. The third surface located between the first surface and the second surface and is connected with the first surface and the second surface. The third surface has a second conductive region, and the first conductive region is electrically connected to at least a part of the second conductive region. The circuit board has good electromagnetic compatibility.

Abstract: Some embodiments have a semiconductor chip supported above a substrate, a filler layer encapsulating the semiconductor chip, a heat sink; and through contacts extending upwardly from the substrate nearly to an upper surface of the filler layer. In some embodiments of electronic packages, the through contacts separated from the heat sink by a trench cut into the upper surface of the filler layer, the through contacts intersecting one wall of the trench and the heat sink intersecting the other wall of the trench an electronic semiconductor package. A method of forming the package and a lead frame are also disclosed.

Abstract: A stacked integrated circuit package system is provided forming a first molded chip comprises attaching a conductor on a wafer, applying an encapsulant around the conductor, and exposing a surface of the conductor in the encapsulant, attaching a first electrical interconnect on the conductor of the first molded chip and stacking an integrated circuit device on the first molded chip with an electrical connector of the integrated circuit device connected to the conductor of the first molded chip with the first electrical interconnect.

Abstract: A memory module comprises a base plate disposed with a plurality of printed circuit sets and one or more IC embedding frames fixed on the base plate, particularly each IC embedding frame having a rubber spring connector stored inside which comprises an insulating flexible silicone rubber layer embedded with a conductive spring matrix composed of a group of conductive spring modules in longitudinal and latitudinal matrix arrangement and is through its conductive spring modules formed in electrical connection with a corresponding printed circuit set of the base plate; the memory module is to provide IC memory chip being installed in detachable manner taking the advantage of easy installation, convenient maintenance or replacement of IC memory chip without use of SMT, soldering paste or flux.

Abstract: A module component which includes circuit substrate 3 having one or more components 1 on at least one of the surfaces, and junction circuit substrate 5 having hollow 4, or hole, disposed corresponding to the portion of the one or more components 1 mounted on the one surface of circuit substrate 3 for fitting the mounted components 1 in. These substrates are laminated to form a single body so that mounted components 1 is contained within the inside. The above configuration ensures high reliability in the layer-to-layer connection, and enables to mount a plurality of components densely with a high dimensional accuracy. Thus a highly reliable compact module component is offered.

Abstract: The present invention aims at offering the semiconductor device which can improve the strength to the stress generated with a bonding pad. In the semiconductor device concerning the present invention, a plurality of bonding pads are formed on a semiconductor chip. In each bonding pad, a plurality of second line-like metals are formed under the first metal formed using the wiring layer of the top layer. And a bonding pad is put in order and located along the long-side direction of a second metal to achieve the above objects. That is, a bonding pad is put in order and located so that the long-side direction of a second metal and the arrangement direction of a bonding pad may become in the same direction.

Abstract: A kind of microphone package structure is disclosed. It comprises at least of a substrate, a sound processing unit, an upper cap and other devices. There would be at least one trench set on the substrate, and a separation gap between the trench and the bounding pad of the substrate is maintained. After connective paste is smeared on the surface of the substrate, the trench would be assembled with other devices. This kind of package structure could prevent a short circuit being caused by the overflowing of the connective paste.

Abstract: The stackable semiconductor device includes at least one first electrode on a top side and a large-area second electrode on an underside of a semiconductor chip. The semiconductor chip also includes a control electrode on one of: the top side or the underside. Through contact blocks are arranged on the edge sides of the semiconductor device, the through contact blocks including externally accessible external contact areas. The external contact area each includes at least one edge side contact area, a top side contact area and an underside contact area. At least one large-area external contact is arranged on the underside and/or on the top side of the semiconductor device.

Abstract: An electronic device may include a substrate with an input/output pad thereon, and a compliant dielectric layer on a first portion of the substrate such that a second portion of the substrate is free of the compliant dielectric layer. A conductive redistribution line may extend from the input/output pad to the compliant dielectric layer so that the compliant dielectric layer is between a bump pad portion of the conductive redistribution line and the substrate. A first solder bump may be on the bump pad portion of the conductive redistribution line so that the compliant dielectric layer is between the first solder bump and the substrate. A second solder bump may be on the second portion of the substrate that is free of the compliant dielectric layer. Related methods are also discussed.

Abstract: A semiconductor device may include a substrate and a dielectric layer may be formed on the substrate. A multi-layered interconnection structure may be embedded in the dielectric layer. A plurality of bonding pads, which may be connected to an uppermost interconnection layer of the multi-layered interconnection structure, may be spaced apart in a first direction. A passivation layer may have a plurality of bonding pad openings that may be defined by a plurality of slits and respectively expose the bonding pads. The slits may overlap isolations of the bonding pads. Each of the slits may have an edge width that may be larger than a center width thereof.

Abstract: A semiconductor device with an improved solder joint system is described. The solder system includes two copper contact pads connected by a body of solder and the solder is an alloy including tin, silver, and at least one metal from the transition groups IIIA, IVA, VA, VIA, VIIA, and VIIIA of the Periodic Table of the Elements. The solder joint system also includes, between the pads and the solder, layers of intermetallic compounds, which include grains of copper and tin compounds and copper, silver, and tin compounds. The compounds contain the transition metals. The inclusion of the transition metals in the compound grains reduce the compound grains size and prevent grain size increases after the solder joint undergoes repeated solid/liquid/solid cycles.

Abstract: A solder bump on a semiconductor substrate is provided. The solder bump comprises a semiconductor substrate having a top copper pad thereon, a protective layer on the semiconductor substrate and at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad, wherein the inorganic passivation layer has a thinner portion adjacent a top portion of the first opening. The solder bump further comprises a soft passivation layer on the inorganic passivation layer with a second opening larger than the first opening, an under bump metal layer conformally formed along the first opening and the second opening and a solder bump formed on the under bump metal layer.

Abstract: A substrate on which a silicon device is mounted in accordance with an embodiment of the present invention includes a plurality of protrusions extending upward from a top surface of the substrate and a solder layer formed on the top of the substrate such that the plurality of protrusions extends through the solder layer and a top portion of each protrusion of the plurality of protrusions is stamped down to be level with a top surface of the solder layer such that the silicon device is supported on the plurality of protrusions when placed on the substrate. The protrusions are preferably gouged up from the surface of the substrate with a needle like tool. A stamper tool is used to stamp the protrusions down to their desired height such that they are properly positioned to support the silicon device. The solder layer may be a solder pre-form or may be a layer of solder paste.

Abstract: A wiring board includes a film base, a plurality of conductive wirings aligned on the film base, and protrusion electrodes formed of a plated metal in the vicinity of end portions of the conductive wirings, respectively. An outer surface at both side portions of the protrusion electrodes in cross section in a width direction of the conductive wirings defines a curve, and the protrusion electrodes in cross section in a longitudinal direction of the conductive wirings define a rectangular shape. The conductive wirings include a first conductive wiring having a wiring width of W1 and a second conductive wiring having a wiring width of W2 larger than W1, and the protrusion electrode on the first conductive wiring and the protrusion electrode on the second conductive wiring have a substantially same height.

Abstract: A mounting substrate includes an imprinted structure on one side for containing electrical bumps. The imprinted structure is imprinted and also cured under conditions that allow retention of significant features of the cured polymer film. A chip package is also made of the imprinted structure. A computing system is also disclosed that includes the imprinted structure.

Abstract: The present invention relates to a method for forming a redistribution layer in a wafer structure. The method comprises: (a) providing a wafer having a plurality of conductive structures and a first passivation layer thereon, wherein the first passivation layer covers the wafer except the conductive surfaces of the conductive structures; (b) forming a second passivation layer over the first passivation layer; (c) selectively removing part of the second passivation layer to form a plurality of grooves corresponding to a predetermined circuit; (d) forming a redistribution layer in the grooves; and (e) forming a third passivation layer over the second passivation layer and the redistribution layer. As a result, the redistribution layer is “embedded” in the second passivation layer so as to avoid the delamination of the redistribution layer.

Abstract: A method of bonding two elements such as wafers used in microelectronics applications is disclosed. One inventive aspect relates to a method for bonding comprising producing on a first main surface of a first element a first solder ball, producing on a first main surface of a second element a second solder ball, providing contact between the first solder ball and the second solder ball, bonding the first element and the second element by applying a reflow act whereby the solder balls melt and form a joined solder ball structure. Prior to the bonding, the first solder ball is laterally embedded in a nonconductive material, such that the upper part of the first solder ball is not covered by the non-conductive material. Devices related to such methods are also disclosed.

Abstract: A semiconductor device includes a damascene structure and an air gap embedded in the damascene dielectric layer. A method of manufacturing a semiconductor device includes depositing a metal barrier in advance as an etch stop, forming a copper damascene interconnect structure, forming an air gap, and depositing a photosensitive passivation material on the air gap.

Abstract: An improved migration resistance of the interconnect is provided and a diffusion of silicon into the inside of the interconnect is suppressed. A semiconductor device includes a silicon substrate, a first insulating film provided on the silicon substrate and composed of an SiCN film, an SiOC film and an SiO2 film, and a first copper interconnect provided in the first insulating film and essentially composed of a copper-containing metal. An Si—O unevenly distributed layer doped with injected silicon is included in the vicinity of the surface in the inside of the first copper interconnect, and injected atomic silicon at least partially creates Si—O bond.

Abstract: This disclosure relates to a system and method for creating nanowires. A nanowire can be created by exposing layers of material in a superlattice and dissolving and transferring material from edges of the exposed layers onto a substrate. The nanowire can also be created by exposing layers of material in a superlattice and depositing material onto edges of the exposed layers.

Abstract: A method of making a circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof.

Abstract: A semiconductor device includes a lower conductive layer formed on a semiconductor substrate, an interlayer insulating film that at least substantially covers the lower conductive layer, a plurality of contact holes formed in the interlayer insulating film to expose an upper surface of the lower conductive layer so that at least some of the contact holes are closer to each other in a long-axis direction than in a short-axis direction; and contact plugs that plug the contact holes. Upper portions of at least some of the contact holes have an oval shape or shapes. A method of manufacturing the semiconductor device includes forming the lower conductive layer, forming the interlayer insulating film, forming the plurality of contact holes in the interlayer insulating film to expose the upper surface of the lower conductive layer, and plugging the contact holes to form the contact plugs.

Abstract: An integrated circuit packaging system comprised by providing a substrate with a first surface including conductive regions for receiving a flip chip die and a second surface including electrical contacts for external electrical connections. Providing the flip chip die over the substrate. Depositing a controlled volume of resin between the first surface of the substrate and the flip chip die and adhering the flip chip die to the first surface of the substrate to form the controlled volume of resin into a zero fillet resin.

Abstract: To provide a high-performance, highly-reliable semiconductor device in which an adhesive used to mount (e.g., flip-chip mount) a semiconductor chip on a substrate has less air bubbles, and a low-cost, efficient method for manufacturing the same. Semiconductor device 10 of the present invention includes semiconductor chip 11 having a plurality of electrode pads 12, and substrate 14 having a plurality of electrode terminals 15 at positions corresponding to electrode pads 12. A plurality of bumps 13, each composed of base part 13A and protruding part 13B having a diameter smaller than the diameter of base part 13A, is formed on at least one of electrode pads 12 in such a way that the respective base parts 13A of bumps 13 are in contact with each other, and semiconductor chip 11 is bonded to substrate 14 with adhesive 17 in a state where bumps 13 are electrically connected to electrode terminals 15.

Abstract: A method of electrically joining a first contact on a first wafer with a second contact on a second wafer, the first contact, a rigid material, and the second contact, a material that is malleable relative to the rigid material, such that when brought together the rigid material will penetrate the malleable material, the rigid and malleable materials both being electrically conductive involves bringing the rigid material into contact with the malleable material, applying a force to one of the first contact or the second contact so as to cause the rigid material to penetrate the malleable material, heating the rigid and malleable material so as to cause the malleable material to soften, and constraining the malleable material to within a pre-specified area.

Abstract: A semiconductor component includes flip-chip contacts arranged on a wiring structure of a semiconductor chip. The wiring structure includes at least one metallization layer and at least one dielectric insulation layer made of a low-k material with a relative permittivity ?r lower than the relative permittivity of a silicon dioxide. The flip-chip contacts are arranged on contact areas of an upper metallization layer and have a polymer core surrounded by a lead-free solder sheath.

Abstract: A wafer level chip scale package includes a semiconductor chip having a plurality of pads; a lower insulation layer having a high Young's modulus of 1˜5 GPa formed on the semiconductor chip to expose the plurality of pads; a plurality of metal patterns formed on the lower insulation layer to be connected to the respective pads; an upper insulation layer having a high Young's modulus of 1˜5 GPa formed on the lower insulation layer and the metal patterns to partially expose the metal patterns; and a plurality of solder balls formed on exposed portions of the metal patterns.

Abstract: By making coefficients of linear thermal expansion of stress relief members on upper and lower surface sides of a semiconductor chip small, thermal strain on joint members above and below the semiconductor chip is decreased and development of a crack therein is suppressed to ensure a joint area. Furthermore, by making areas of electrodes and stress relief members large enough to include a project plane of the semiconductor chip projected onto the joint surfaces thereof, even if a crack develops into the joint member between the stress relief member and the electrode, a joint area larger than the area of the semiconductor chip can be ensured for a certain amount of time. As a result, a semiconductor device capable of simultaneously ensuring the joint areas of the respective joint members and preventing a decrease in heat release capability is provided.

Abstract: An integrated circuit non-leaded package system is provided including: forming a plurality of leads with a predetermined thickness and a predetermined interval gap between each of the plurality of leads; configuring each one of the plurality of leads to include first terminal ends disposed adjacent an integrated circuit and second terminal ends disposed along a periphery of a package; and forming the second terminal ends of alternating leads disposed along the periphery of the package to form a lead-to-lead gap between adjacent leads in excess of the predetermined interval gap.

Abstract: The invention relates to a laminate structure comprising a first carrier layer with a surface, a first active surface being electrically conducting and being supported by the first carrier layer, a second active surface being electrically conducting and being supported by the first carrier layer, wherein the first active surface is separated from the second active surface a first distance along the surface of the first carrier layer, wherein the laminate structure is adapted to receive an electrically weakable adhesive bridging said distance between the active surfaces. The invention further relates to a method of producing such a laminate structure.

Abstract: A semiconductor device having a plurality of pads P11, P12, P21, P22, P31, and P32 on the same plane of a semiconductor chip with wires W1, W2, and W3 connected between the pads P11 and P12, P21 and P22, and P31 and P32, respectively, so as to be electrically isolated from each other or without contacting each other. For the crossing and electrically isolated wires W1 and W2 respectively having pads P11 and P22 that are adjacently located very close, the wires are connected so that one pad P11 is set to be a first bonding point where a rising portion 12 of one wire W1 is bonded, and the other pad P22 is set to be a second bonding point to which a downwardly inclined end of the other wire W2 opposite from its cubic interchanging crossing and electrically isolated is bonded.

Abstract: An integrated circuit is provided that includes at least one first circuit component and at least one second circuit component, the first circuit component being connected via a level converter to the second circuit component. The level converter can be optionally activated or deactivated by the first circuit component in order to enable or prevent a data exchange between the first circuit component and the second circuit component.

Abstract: The electronic component package includes a mounting board, an electronic component and a molding resin. An external electrode is disposed on a surface of the mounting board. The electronic component connected to the mounting board via the external electrode includes a component-substrate, a device, a component-cover and a resin-made protector. The component-substrate composed of piezoelectric body includes the first surface on which the device is disposed and the second surface opposing the first surface. The component-cover covers the first surface of the substrate and the device. The protector provided on the second surface contains filler. The molding resin covers the electronic component on the mounting board.

Abstract: A semiconductor is disclosed. In one embodiment, the semiconductor includes a semiconductor substrate having an active area region, a covering configured to protect the active area region, and a carrier. An interspace is located between the carrier and the covering. The interspace is filled with an underfiller material is disclosed.

Abstract: In a first aspect, a first method of manufacturing a high-voltage transistor is provided. The first method includes the steps of (1) providing a substrate including a bulk silicon layer that is below an insulator layer that is below a silicon-on-insulator (SOI) layer; and (2) forming one or more portions of a transistor node including a diffusion region of the transistor in the SOI layer. A portion of the transistor node is adapted to reduce a voltage greater than about 5 V within the transistor to a voltage less than about 3 V. Numerous other aspects are provided.

Abstract: A method for conveying material, advantageously food-industry bulk material, especially cutting offals or food waste, by means of a pressure difference in a conveying pipe (4). In the method, material is fed to the conveying pipe (4), and further in the conveying pipe to a separator device (5) in which the transferred material is separated from conveying air. In the method, to the conveying pipe (4) is achieved underpressure with an ejector apparatus (6) the suction side of which is connected to the separator device (5), which ejector apparatus is operated with an actuating medium. To the ejector apparatus (6) is brought a second medium, especially a liquidous and/or gaseous medium.

Abstract: A membrane carburetor (1) has a control chamber (13) which is connected via at least one fuel opening (9, 10) to an intake channel (3). The control chamber (13) is delimited by a control membrane (14). A fuel line (54) opens into the control chamber (13) via an inlet valve (15). The inlet valve (15) opens in dependence upon the deflection of the control membrane (14). The membrane carburetor (1) has an acceleration pump (30) which is actuated in dependence upon the position of a throttle element held in the intake channel (3). A good acceleration enrichment and a stable running of the internal combustion engine are achieved when the acceleration pump (30) operates hydraulically on at least one actuating member in the control chamber (13).

Abstract: A gas bubble generator suitable for use in anaerobic digestion systems for treating waste sludge. The gas bubble generator is submerged within a large body of liquid and is attached to a stackpipe. The gas bubble generator comprises a first gas accumulation chamber, a second gas accumulation chamber and a stand pipe having a gas outlet through which gas exits the bubble generator. The gas bubble generator further comprises a continuous passageway between the second gas accumulation chamber and the stand pipe through which gas can travel from the first and second gas accumulation chambers to the gas outlet. The continuous passageway is absent a hydraulic braking orifice.

Abstract: The purpose of the present invention is to provide a natural evaporation type humidifier which has enough humidifying capability and which is less expensive and portable, and a humidify element thereof and a humidify case thereof. One end of a humidify element 12 which has a plurality of humidify segments 24 connected to be free to extend and contract is fixed to a first case portion 28. One end of another humidify element 12 having the same structure is fixed to a second case portion 30. Each other end of the two humidify elements 12 is connected by a connect member 48. An inner space 42 as a water reservoir is formed at the first case portion 28 and the second case portion 30. At the time of non-usage, the first case portion 28 and the second case portion 30 are closed, and the humidify elements 12 and the connect member 48 are stored in the inner space 42. At the time of usage, the first case portion 28 and the second case portion 30 are opened, and the humidify elements 12 are extended.

Abstract: An improved random packing is the subject of the present invention. The packing element comprises a generally spherically shaped member which can be a perfect sphere, an ellipse, or some variation on either of the foregoing. The sphere is a hollow body having inner and outer surfaces with a plurality of openings passing through the body. A hypothetical axis passing through the sphere defines circular openings at both ends and the openings in between these two ends are generally elongated. The solid walls which form the sphere are of sufficient thickness so as to accommodate a plurality of indentations, some of which are formed in the solid walls and other indentations being formed coincidentally with the elongated openings between the solid wall sections. The indentations are characterized by curvilinear surfaces so that the total surface area presented by the inner surface (S1) and all of the remaining surfaces (S2) are at least twice the area of solid sphere of the same diameter with no indentations.

Abstract: An apparatus for the gasification or aeration of liquids. Elongated aeration elements are connected to a distribution conduit and have an essentially rigid support tube having a lengthwise rounded groove about which is disposed a membrane of elastomeric material. Compressed gas introduced between the support tube and membrane escapes via slits in the membrane. An elastically deformable flange of a cylindrical portion of a fitting with a plastic semi-rigid saddle portion is disposed between the distribution conduit and one of the aeration elements, and is disposed in a bore in the conduit. The fitting has an essentially flat saddle portion, one side of which rests against the outer surface of the conduit, and the other side of which rests against an end of the aeration element. A hollow bolt is securely connected to the aeration element and is guided through a bore in the fitting into the interior of the conduit, where it is provided with apertures.

Abstract: The invention relates to a method for preparing a transparent ceramic material based on an intermetallic oxide, comprising the following steps: (A) particles (p) based on said intermetallic oxide are synthesised by oxidising calcination of particles (p0) containing a homogeneous mixture of organic salts of different metallic cations of the intermetallic oxide; (B) a moulded material (M) is produced from the particles (p) obtained in this way, using a filtering pressing technique; and (C) the moulded material (M) is thermally processed (sintered). The invention also relates to the materials based on transparent oxides obtained according to said method, especially the transparent ceramic materials based on Y3A15012 (YAG) doped by lanthanides such as neodymium, and to the uses of said materials, especially for laser amplification.

Abstract: A method for patterning self-assembled colloidal photonic crystals and a method for fabricating three-dimensional photonic crystal waveguides having an inverted-opal structure using the patterning method. The patterning method includes depositing first and second conductive films separate from each other, on an area corresponding to a pattern of the self-assembled colloidal photonic crystals that are to be formed on a substrate and on another area except for the area corresponding to the pattern, respectively, and growing the photonic crystals on the substrate on which the first and second conductive films are deposited by dip-coating in a fluid containing colloidal particles while applying a DC voltage to the respective first and second conductive films. Various types of colloidal photonic crystals can be fabricated depending on the electrode pattern defined on the substrate.

Abstract: The present invention provides methods and apparatus useful for facilitating one or more of the removal of unreacted components and diluents from an article fashioned from silicone hydrogel and release of the article from a mold part to which the article is adhered.

Abstract: In the method for preparation of microspheres by in-water drying method, an iterative process is employed, which comprises emulsifying a medicament-containing polymer solution (4) containing an organic solvent in an emulsifying device (1) to form an emulsion; transferring this emulsion into a microsphere storage tank (2); introducing a part of said emulsion to a cross flow filter (3) from the microsphere storage tank; and returning a liquid passing over the cross flow filter to the microsphere storage tank (2). Since a small amount of microsphere is repeatedly produced, this process permits the downsizing and airtight closing of an apparatus therefor, and further makes it possible to freely control the production scale of microsphere.

Abstract: Toughened compositions of PLA and PLA copolymers are disclosed, which also have low tensile modulus values and greater elongation to break. These toughened compositions are prepared by blending PLA and PLA copolymers with poly-4-hydroxybutyrate, and copolymers thereof. Blending of poly-4-hydroxybutyrate with PLA and its copolymers has been found to impart advantageous properties to the resulting blend. These compositions, and objects formed from these compositions, have improved toughness and lower stiffness than polylactic acid polymers or copolymers alone.

Abstract: To make a color tone similar to that of dentin of a tooth at a low cost without discoloration when baking, a dental ceramics material is produced by: mixing a pink coloring agent and a yellow coloring agent with zirconium oxide containing a stabilizer while having a mixing ratio of 0.001 to 5 wt. % respectively; and baking it, where the pink coloring agent is obtained by dissolving manganese oxide in aluminum oxide as a solid solution, the yellow coloring agent is obtained by dissolving vanadium oxide in zirconium oxide as a solid solution, the zirconium oxide contains 0.1 to 30 wt. % aluminum oxide if necessary, the stabilizer is one or more kinds selected from a group including yttrium oxide, magnesium oxide, calcium oxide, and cerium oxide, and the content thereof is preferably 3 to 7 wt. %.

Abstract: A filter cartridge includes a filter media having opposed edges. Annular end discs include first and second surfaces defined by spaced apart planes. The end discs has an integrated gasket, and is formal from includes first and second plastisol materials that have different durometers. The durometer of the second plastisol material makes it more rigid than the first plastisol material. The first plastisol material provides a flexible gasket. During manufacture, each edge of the filter media is embedded into the second material on an end disc. The second plastisol material is arranged between the planes, and the first plastisol material extends axially away from the second surface.