Abstract: An organic light emitting display device has thin film transistors. An organic thin film transistor (OTFT) is manufactured in one substrate and an organic light emitting diode (OLED) is manufactured on the other substrate, and the first substrate and second substrate are then positioned to face each other. The first substrate and the second substrate are electrically coupled together by contacts positioned on the first substrate, the second substrate, or both. OTFT is manufactured using a dispenser or ink jet printing method, reducing manufacturing time and costs.

Abstract: The invention concerns a photoactive nanocomposite (3) comprising at least one donor-acceptor couple of semiconductor elements. One of the elements is made of doped nanowires (7) with sp3 structure, and the other of the elements is an organic compound (8). The elements are supported by a device substrate (1). The invention also concerns a production method. According to a first embodiment, after their growth, the nanowires (7) are retrieved, functionalised and solubilised in the organic component (8). The mixture is deposited by coating on a device substrate. According to a second embodiment, the nanowires (7) are formed on a growth substrate (5) which is also the device substrate. The organic component (8) is combined with the nanowires (7) so as to form an active layer (3). Such a photoactive nanocomposite (3) allows production of a photovoltaic cell.

Abstract: This invention provides phenylene-thiophene compounds that exhibit useful electronic properties such as high mobility and high on/off ratio. The invention also provides electronic devices incorporating these compounds. These devices include field effect transistors (FETs), thin film transistors (TFTs), display devices, light-emitting diodes, photovoltaic cells, photo-detectors, and memory cells. Further, the invention also describes a method for manufacturing these field effect transistors. The invention describes an electronic device comprising one or more compounds represented by Formula:(I) where R is selected from substituents comprising 1-20 carbon atoms, wherein the substituents are selected from substituted or unsubstituted alkyl groups, substituted or unsubstituted alkenyl groups, and substituted or unsubstituted alkynyl groups; n is an integer selected from 2 through 6; and m and m? are integers selected independently from 1 through 3.

Abstract: The invention relates to copolymer complexes of the formula (I): wherein [Ax-[B(C)]y-Dz] denotes a single unit of the copolymer complex that is repeated n times, wherein n is an integer greater than one, and wherein the single unit comprises a conjugated backbone coordinated to a complex (C) comprising rare earth metal(s); x, y and z are numbers greater than zero such that x=y+z; A is independently selected from a group consisting of: fluorene, carbazole, oxadiazole, triphenylamine or derivatives thereof; B is a functional ligand selected from the group consisting of: benzoic acid, 1,3-diphenylpropane-1,3-dione, 1,10-phenanthroline, 2,2-bipyridine, or derivatives thereof; and D is independently selected from a group consisting of: fluorene, carbazole, oxadiazole, triphenylamine or derivatives thereof.

Abstract: A method of manufacturing a thin film semiconductor device is disclosed. The method includes the steps of: forming a light reflection and absorption layer for reflecting and absorbing light on a substrate; patterning the light reflection and absorption layer in a prescribed shape; forming an insulating film covering the patterned light reflection and absorption layer; forming a semiconductor thin film containing a polycrystalline grain on the insulating film; and laser annealing the semiconductor thin film by irradiating pulse oscillated laser light to crystallize the semiconductor thin film. The laser annealing step includes a heating process, and a cooling process.

Abstract: The present invention concerns a thin-film encapsulation structure for electronic devices with organic substances, especially OLEDs or other organic optoelectronic devices as well as corresponding components and a process for the production with a primary, inorganic barrier layer (5), which is directly arranged on the device or the surface to be encapsulated; a planarization layer (6) arranged on the primary, inorganic barrier layer, the thickness of said planarization layer selected such that it is thicker than the simple value of the distance between highest peak and deepest valley of the surface of the primary barrier layer or the surface of the device under the primary barrier layer or the surface to be encapsulated, as well as a secondary barrier layer (14) arranged on the planarization layer.

Abstract: Provided is a novel organosilicon compound which functions as a silane coupling agent (wetter) that enables a silicone to be filled with a large quantity of a filler.

Abstract: In one aspect, a semiconductor element may include a first substrate made of a N-type ZnO substrate, a P-type semiconductor layer provided on the first substrate, the P-type semiconductor layer having a nitride-based semiconductor, a lamination member provided on the P-type semiconductor layer, lamination member having a nitride-based semiconductor, and a N-type semiconductor layer in the uppermost layer, a first electrode provided on the lamination member, and a second electrode provided on the first substrate.

Abstract: The invention is directed to a semiconductor structure located on a substrate in a scribe line region of a wafer. The semiconductor structure comprises a first dielectric layer, a first test pad and a passivation layer. The first dielectric layer is disposed on the substrate and the first test pad is disposed on the first dielectric layer. The passivation layer is disposed on the first dielectric layer and surrounding the first test pad and a groove is located between the first test pad and the passivation layer and the groove is at lest located between the boundary of the scribe line region and the first test pad.

Abstract: A dual-channel thin film transistor is applied to a thin film transistor liquid crystal display. It includes a substrate, a gate electrode, a source, and a drain. The drain further includes two drain electrodes. The two drain electrodes form the dual-channel with the source. A channel layer is between the source, the drain and the gate electrode.

Abstract: A thin film transistor includes a semiconductor pattern on a substrate, a gate insulating film to cover the semiconductor pattern, a gate electrode partially overlapping the semiconductor pattern with the gate insulating film therebetween, a hole in the gate electrode to expose the gate insulating film, an interlayer insulating film to cover the gate electrode, and a source electrode and a drain electrode contacting the semiconductor pattern through the interlayer insulating layer and the gate insulating layer, wherein the semiconductor pattern includes at least two channels between the source electrode and the drain electrode, the at least two channels having a region with a varying width.

Abstract: In a semiconductor device including a digital circuit portion and an analog circuit portion having a capacitor portion provided over a substrate, the capacitor portion is provided with a first wiring, a second wiring and a plurality of blocks each having a plurality of capacitor elements. Further, each the plurality of capacitor elements provided in each block has a semiconductor film having a first impurity region and a plurality of second impurity regions provided apart with the first impurity region interposed therebetween, and a conductive film provided over the first impurity region with an insulating film therebetween. A capacitor is formed from the first impurity region, the insulating film, and the conductive film.

Abstract: A semiconductor device includes a substrate having a first area and a second area adjacent to the first area, a first silicon layer provided on the substrate in the first area, a relaxed layer which is provided on the substrate in the second area and which has a lattice constant greater than a lattice constant of the first silicon layer, and a strained-Si layer which is provided on the relaxed layer and which has a lattice constant substantially equivalent to the lattice constant of the relaxed layer.

Abstract: A display including a driving substrate is provided. Arrayed on the driving substrate is a plurality of pixel electrodes and thin film transistors for driving the pixel electrodes. Each thin film transistor includes a semiconductor thin film having an active region made to be polycrystalline by irradiation with an energy beam, and a gate electrode provided so as to cross the active region. In a channel part of the active region overlapping with the gate electrode, the crystal state is varied periodically along the channel length direction, and substantially the same crystal state crosses the channel part.

Abstract: A semiconductor device and a method of fabricating a low-temperature polysilicon film are provided. An amorphous silicon film is formed over a substrate. An insulating layer and a laser absorption layer are formed over the amorphous silicon film. A photolithographic and etching process is performed to remove portions of the laser absorption layer and the insulating layer to expose portions of the amorphous silicon film. A laser crystallization process is utilized to convert the amorphous silicon film into a polysilicon film.

Abstract: A process for manufacturing a bipolar type semiconductor device in which at least a part of a region where an electron and a hole are recombined during current flowing is formed with a silicon carbide epitaxial layer that has been grown from the surface of a silicon carbide substrate, is characterized by that the surface of the silicon carbide substrate is treated by hydrogen etching and the epitaxial layer is then formed by the epitaxial growth of silicon carbide from the treated surface. A propagation of a basal plane dislocation to the epitaxial layer can be further reduced by treating the surface of the silicon carbide substrate by using chemical mechanical polishing and hydrogen etching in this order.

Abstract: A method of making a semi-insulating epitaxial layer includes implanting a substrate or a first epitaxial layer formed on the substrate with boron ions to form a boron implanted region on a surface of the substrate or on a surface of the first epitaxial layer, and growing a second epitaxial layer on the boron implanted region of the substrate or on the boron implanted region of the first epitaxial layer to form a semi-insulating epitaxial layer.

Abstract: A light-emitting device includes: a substrate; a light reflection layer that is formed on the substrate and reflects light; a first electrode that is formed on the light reflection layer and transmits light; a light-emitting layer that is formed on the first electrode and emits light; a second electrode that is formed on the light-emitting layer and transmits a part of light from the light-emitting layer and reflects the rest of the light from the light-emitting layer; and a conductive transflective layer that is formed on the second electrode and that transmits a part of light from the second electrode and reflects the rest of the light from the second electrode. A work function of the second electrode is 4 eV (electron volts) or less. The conductive transflective layer is formed of a metal material having a higher optical reflectance than the second electrode.

Abstract: A LED (Light Emitting Diode) structure with a contact layer of a multiple structure includes a nucleation layer disposed on a substrate; a conductive buffer layer disposed on the nucleation layer; an active layer disposed between an upper and a lower confinement layer, wherein the structure of active layer includes a semiconductor material mainly doped with III-V group; the contact layer made of the multilayer structure disposed on the upper confinement layer; and a transparent electrode disposed on the contact layer made of a multilayer structure; and an electrode contacted with the conductive buffer layer and isolated from the active layer and the transparent electrode.

Abstract: An LED has a light-generating semiconductor region formed on a baseplate via a metal-made reflector layer. The light-generating semiconductor region has an active layer sandwiched between a pair of claddings of opposite conductivity types. An annular marginal space is left around the reflector layer between the light-generating semiconductor region and the substrate. In order to preclude the thermal migration of the reflector metal onto the side surfaces of the light-generating semiconductor region, with a possible short-circuiting of the pair of claddings across the active layer, an anti-migration seal is received in the annular marginal space created around the reflector layer between the light-generating semiconductor region and the baseplate.

Abstract: A semiconductor light emitting element is provided with a transparent substrate for improving the optical extraction efficiency by using a transparent substrate. The semiconductor light emitting element includes a main body constructed of an n-Al0.6Ga0.4As current diffusion layer, an n-Al0.5In0.5P cladding layer, an AlGaInP active layer, a p-Al0.5In0.5P cladding layer, a p-GaInP interlayer and a p-GaP contact layer. An n-GaP transparent substrate is placed under the main body. A p-GaP transparent substrate is placed on top of the main body. The n-GaP transparent substrate and the p-GaP transparent substrate have transparency with respect to light emitted from the AlGaInP light emitting layer.

Abstract: An electronically active sheet includes a bottom substrate having a bottom electrically conductive surface. A top substrate having a top electrically conductive surface is disposed facing the bottom electrically conductive surface. An electrical insulator separates the bottom electrically conductive surface from the top electrically conductive surface. At least one bare die electronic element is provided having a top conductive side and a bottom conductive side. Each bare die electronic element is disposed so that the top conductive side is in electrical communication with the top electrically conductive surface and so that the bottom conductive side is in electrical communication with the bottom electrically conductive surface.

Abstract: Packaged semiconductor light emitting device are provided including a reflector having a lower sidewall portion defining a reflective cavity. A light emitting device is positioned in the reflective cavity. A first quantity of cured encapsulant material having a first index of refraction is provided in the reflective cavity including the light emitting device. A second quantity of cured encapsulant material having a second index of refraction, different from the first index of refraction, is provided on the first quantity of cured encapsulant material. The first and second index of refraction are selected to provide a buried lens in the reflective cavity.

Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.

Abstract: A package for an LED, comprises a metal substrate, at least one LED chip, and an insulative housing, wherein the metal substrate has a first terminal and a second terminal, and the first terminal is formed with a recess. The at least one LED chip is arranged in the recess of the first terminal of the metal substrate, wherein the chip is electrically connected with the first terminal and the second terminal of the metal substrate. Since the insulative housing caps the chip and the metal substrate, and the LED package can be reduced in size.

Abstract: A light emitting diode includes a permanent substrate having a first portion and a second portion, and a chip attached on the first portion of the permanent substrate by a chip bonding technology. The chip includes at least one first electrode and a light emitting region. The manufacturing method comprises a step of mounting a single chip on the first portion of the permanent substrate by a chip bonding technology to overcome the fragility problem of an EPI-wafer.

Abstract: The present invention provides a flip chip semiconductor light-emitting device which includes a substrate and a semiconductor multi-layer structure. The semiconductor multi-layer structure has a first surface and a second surface in opposition to the first surface. The semiconductor multi-layer structure is bonded to the substrate by the first surface. In addition, the second surface has a plurality of convex. More particularly, the plurality of convex is arranged in a periodic structure.

Abstract: A semiconductor memory device includes an insulating film formed on a semiconductor substrate, a fin-shaped semiconductor layer formed on the insulating film, and having first and second side surfaces opposing each other, a gate electrode formed across the first side surface and second side surface of the semiconductor layer, a trap layer formed between the gate electrode and the first side surface of the semiconductor layer, a tunnel gate insulating film formed between the trap layer and the first and second side surfaces of the semiconductor layer, a block layer formed between the trap layer and the gate electrode, a channel region formed in the semiconductor layer below the gate electrode, and a source and drain regions formed in the semiconductor layer to sandwich the channel region and containing a metal, a Schottky junction being formed between the channel region and each of the source and drain regions.

Abstract: There are provided a method of manufacturing a nitride semiconductor light-emitting element in which a nitride semiconductor layer of a first conductivity type, an active layer, and a nitride semiconductor layer of a second conductivity type are stacked in this order, including the steps of forming unevenness at a surface of the nitride semiconductor layer of the first conductivity type, forming unevenness at a surface of the nitride semiconductor layer of the second conductivity type, and forming a first electrode on a side of the nitride semiconductor layer of the first conductivity type and a second electrode on a side of the nitride semiconductor layer of the second conductivity type such that the first and second electrodes are positioned to face each other with the active layer interposed therebetween, and the nitride semiconductor light-emitting element.

Abstract: The present invention relates to a method of manufacturing a vertically-structured GaN-based light emitting diode. The method of manufacturing a vertically-structured GaN-based light emitting diode includes forming a GaN layer on a substrate; patterning the compound layer in a predetermined shape; forming an n-type GaN layer on the patterned compound layer through the epitaxial lateral over-growth process and sequentially forming an active layer and a p-type GaN layer on the n-type GaN layer; forming a structure supporting layer on the p-type GaN layer; sequentially removing the substrate and the GaN layer formed on the substrate after forming the structure supporting layer; removing the patterned compound layer exposed after removing the GaN layer so as to form an n-type GaN layer patterned in a concave shape; and forming an n-type electrode on the n-type GaN layer patterned in a concave shape.

Abstract: A semiconductor arrangement for an integrated circuit is provided that includes a first region in which a number of components are formed, a second region, a buried insulating layer for vertically insulating the first region, an insulating structure, which is formed between the first region and the second region for laterally insulating the first region from the second region. The insulating structure can have a trench structure with a dielectric and a conductor structure with a semiconductor material. Whereby the trench structure borders on the buried insulating layer, and the conductor structure is designed to conductively connect the first region to the second region.

Abstract: A dual-gate transistor includes a first gate formed on a substrate, a first dielectric layer covering the first gate and the substrate, a semiconductor layer formed on the first dielectric layer, first and second electrodes formed on the semiconductor layer and spaced with an interval in order to separate each other, a second dielectric layer covering the first and second electrodes, and a second gate formed on the second dielectric layer, in which at least one of the first and second gates is non-overlapped with the second electrode.

Abstract: A nitride semiconductor free-standing substrate formed of a free-standing nitride-based compound semiconductor crystal that has a variation in lattice constant of ±12 ppm or less.

Abstract: An array substrate for a liquid crystal display device includes a first source electrode and a first drain electrode on a substrate, wherein the first source electrode and the first drain electrode are separated from each other and formed of a metallic material, a second source electrode and a second drain electrode on the first source electrode and the first drain electrode, respectively, and are formed of a transparent conductive material, wherein the second source electrode covers an upper surface of the first source electrode, and the second drain electrode covers an upper surface of the first drain electrode, a pixel electrode on the substrate and contacting the second drain electrode on the substrate, an organic semiconductor layer on the substrate, a gate insulating layer on the organic semiconductor layer, and a gate electrode on the gate insulating layer.

Abstract: A nitride semiconductor device according to the present invention includes a p-type nitride semiconductor layer, an n-type nitride semiconductor layer, and an active layer interposed between the p-type nitride semiconductor layer and the n-type nitride semiconductor layer. The p-type nitride semiconductor layer includes: a first p-type nitride semiconductor layer containing Al and Mg; and a second p-type nitride semiconductor layer containing Mg. The first p-type nitride semiconductor layer is located between the active layer and the second p-type nitride semiconductor layer, and the second p-type nitride semiconductor layer has a greater band gap than a band gap of the first p-type nitride semiconductor layer.

Abstract: A bipolar transistor (100) is manufactured using the following processes: (a) forming a base electrode layer (129) as a portion of a base electrode over a semiconductor substrate (110); (b) forming a first portion of an emitter electrode (154) over the base electrode layer; (c) forming a mask layer (280) over a first portion of the base electrode layer, a portion of the first portion of the emitter electrode and a portion of the semiconductor substrate; and (d) implanting a dopant into a second portion of the base electrode layer after forming the emitter electrode after forming the mask layer.

Abstract: A semiconductor device includes at least two adjacent memory cell blocks, each of the memory cell blocks having a plurality of memory cell units, each of memory cell units having a plurality of electrically reprogrammable and erasable memory cells connected in series, a plurality of cell gates for selecting the plurality of memory cells within the two adjacent memory cell blocks, each of the plurality of cell gates being formed with roughly rectangular closed loops or roughly U shaped open loops, each of the loops being connected to a corresponding cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within one of the two adjacent memory cell blocks and being connected to a corresponding memory cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within the other memory cell block of the two adjacent memory cell blocks and a plurality of pairs of first and second selection gates for selecting the memory cell block, the

Abstract: A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.

Abstract: A power Schottky rectifier device and method of making the same are disclosed. The Schottky rectifier device includes a LOCOS structure grown on the bottom of the trenches by using nitride spacer on the sidewall of the trenches as a thermal oxidation mask. A polycrystalline silicon layer is then filled the first trenches. Under LOCOS structure, a p doped region is optionally formed to minimize the current leakage when the device undergoes a reverse biased. A Schottky barrier silicide layer formed by sputtering and annealing steps is formed on the upper surfaces of the epi-layer and the polycrystalline silicon layer. A top metal layer served as anode is then formed on the Schottky barrier silicide layer and extended to cover a portion of field oxide region of the termination trench. A metal layer served as a cathode electrode is then formed on the backside surface of the substrate opposite to the top metal layer.

Abstract: An electric component comprising a sensor and/or actuator chip with a substrate on which a passivating layer and a sensor and/or actuator structure consisting of an active surface area is arranged. The chip is surrounded by an encapsulation having an opening which forms an access to the at least one active surface area. A layer stack is arranged on the substrate, said stack of layers comprising from the passivating layer to the substrate at least one first strip conductor layer, a first electric insulating layer, a second strip conductor layer and a second electric insulating layer. The first conductor strip layer is fully arranged outside the area of the chip covered by the opening. At least one conductor strip of the second conductor strip layer is connected to the sensor and/or actuator structure.

Abstract: A semiconductor device and a method of fabricating the semiconductor device are described. There is provided the semiconductor device including, a semi-conductor substrate, a gate insulating layer on the semiconductor substrate, a two-step gate electrode formed on the gate insulating layer, the two-step gate electrode having a first gate electrode layer formed on the gate insulating layer and a second gate electrode layer formed on the first gate electrode layer, the gate length of the second gate electrode layer being longer than that of the first gate electrode layer, extension regions formed in the semiconductor substrate to interpose a channel region of the semiconductor substrate beneath the second gate electrode layer, and source-drain regions formed in the outside of the extension regions toward the channel region, the source-drain regions adjoining the extension regions.

Abstract: An insulated gate bipolar transistor has a p-type emitter layer; an n-type buffer layer provided on the p-type emitter layer; an n-type base layer provided on the n-type buffer layer and having a higher resistivity than the n-type buffer layer; a p-type base layer provided in part of an upper surface of the n-type base layer; an n-type source layer provided in part of an upper surface of the p-type base layer; a trench extending through the n-type source layer and the p-type base layer to the n-type base layer; a gate electrode provided in the trench; and a gate insulating film provided between the gate electrode and an inner surface of the trench. The p-type emitter layer has a thickness of 5 to 50 ?m and a dopant concentration of 2×1016 to 1×1018 cm?3.

Abstract: A solid-state image pickup device improves the linearity of signal S1 and increases the saturation level in a solid-state image pickup device with an expanded dynamic range, and a field effect transistor used in the solid-state image pickup device. For the field effect transistor, gate electrode 60 is formed via gate insulating film 50 in a channel forming region of a first semiconductor layer 11 of a first electroconductivity type. A pair of second semiconductor layers (40, 41) of a second electroconductivity type are formed on the surface layer of the first semiconductor layer 11 on both sides of gate electrode 60. A third semiconductor layer 43 of the second electroconductivity type is formed in the first semiconductor layer 11 at a prescribed depth below the channel forming region and is connected to the second semiconductor layer 40. A solid-state image pickup device in which the field effect transistor is used as an amplification transistor is also disclosed.

Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.

Abstract: A semiconductor device comprises: an MOS transistor including: a semiconductor substrate; a source region, formed in the semiconductor substrate, that comprises an impurity of a first conductive type; a drain region, formed in the semiconductor substrate, that comprises an impurity of the first conductive type; and a gate electrode, formed through a gate insulating film on the semiconductor substrate, between the source region and the drain region; an impurity region of the first conductive type formed in the semiconductor substrate; an impurity region of a second conductive type to be opposite to the first conductive type formed in the semiconductor substrate; and a wiring provided to connect each of the impurity region of the first conductive type and the impurity region of the second conductive type to the gate electrode.

Abstract: A solid-state image pickup device that can suppress the dark current with respect to the photo-electrons overflowing from the photodiode, as well as its manufacturing method. Each pixel has the following parts: photodiode, transfer transistor, floating diffusion, accumulating capacitive element, and accumulating transistor.

Abstract: A solid-imaging device having a plurality of image pixels arranged along a main surface of a semiconductor substrate, wherein each of the plurality of image pixels includes a photodiode that converts incident light into an electric charge and a transmission gate that is formed so as to have a crossing area that partially passes over the photodiode when seen from the thickness direction of the semiconductor substrate. The transmission gate of the solid-state imaging device is formed in a manner that (i) a first region including a laminated body of a silicon film and a silicide film, and (ii) a second region that includes the silicon film and does not include the silicide film, both arranged along a main surface of the semiconductor substrate, and the second region in the transmission gate is formed in at least one part of the crossing area.

Abstract: The invention provides an imager having a p-n-p photodiode with an ultrashallow junction depth. A p+ junction layer of the photodiode is doped with indium to decrease transient enhanced diffusion effects, minimize fixed pattern noise and fill factor loss.

Abstract: A method for processing a scratched surface of a material that is transparent to electromagnetic radiation includes a step of depositing onto the scratched surface at least one layer of a polymer material having substantially the same optical index as the material having the scratched surface, so as to fill in the scratches, and a step of polymerizing the polymer material. The method may be applied to the manufacture of semiconductor wafers including imagers.

Abstract: A pixel area, which is composed of a plurality of unit pixels each including a photoelectric conversion unit and a signal scanning circuit, is formed on a semiconductor substrate. An optical black pixel region, in which a plurality of optical black pixels for setting a dark-time level are formed, is formed in the pixel area. A barrier layer, which has an impurity concentration that is higher than an impurity concentration of the semiconductor substrate and has a conductivity type that is identical to a conductivity type of the semiconductor substrate, is formed in the optical black pixel region of the semiconductor substrate.