Patents Issued in January 15, 2008
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Patent number: 7319259Abstract: A test structure for implementing resistance measurement of a deep trench formed in a semiconductor device includes a pair of deep trenches formed within a semiconductor substrate. The pair of deep trenches has a dielectric material formed on side and bottom surfaces thereof, and includes a conductive fill material therein. Bottom portions of the pair of deep trenches are merged with one another so as to provide an electrically conductive path therethrough.Type: GrantFiled: November 15, 2004Date of Patent: January 15, 2008Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Geng Wang
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Patent number: 7319260Abstract: A locked hinge based technique for controllably holding surface-micromachined modules off the edge of a substrate for subsequent processing. The mechanism enables reliable, accurate, and low-cost fabrication of even complex multi layer flip-chip MEMS devices using for example only a simple two-layer module processing sequence, a sequence involving materials already in use in the process. The sequence is also free from the interference of an alignment-hindering sacrificial substrate member. The technique is disclosed by way of a micromirror example and is arranged for convenient bypassing where use of another bonding technique is desired.Type: GrantFiled: October 16, 2003Date of Patent: January 15, 2008Assignee: The United States of America as represented by the Secretary of the Air ForceInventor: Mark A. Michalicek
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Patent number: 7319261Abstract: A MOS isolation coupler is formed on a semiconductor chip by a CMOS process and comprises an inductor coil for generating a magnetic field in response to an input signal applied to terminals thereof. A MAGFET having a split drain formed by respective drain portions is formed on the semiconductor chip below the inductor coil, so that a current difference is induced between the drain currents in the drain portions which is proportional to the strength of the magnetic field generated by the inductor coil resulting from the input signal. The MAGFET is formed prior to the inductor coil. An oxide isolating layer is provided over the MAGFET, and the inductor coil is formed on the oxide layer.Type: GrantFiled: November 21, 2003Date of Patent: January 15, 2008Assignee: Analog Devices, Inc.Inventors: James Anthony Power, Michael Anthony O'Neill, Colin Gerard Lyden
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Patent number: 7319262Abstract: An apparatus including a pillar located over a substrate and having at least one sloped surface oriented at an acute angle relative to the substrate. The apparatus also includes an MRAM stack substantially conforming to the sloped surface, the MRAM stack thereby also oriented at the acute angle relative to the substrate. The MRAM stack may comprise a plurality of substantially planar, parallel layers each oriented at an acute angle relative to the substrate.Type: GrantFiled: August 13, 2004Date of Patent: January 15, 2008Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Wen Liu, Kuo-Ching Chiang, Horng-Huei Tseng, Denny D. Tang
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Patent number: 7319263Abstract: A semiconductor component is described. In one embodiment, the semiconductor component includes a switching element integrated in the semiconductor component between two functional element semiconductor regions, configured to reduce a parasitic current flow through the semiconductor component.Type: GrantFiled: October 28, 2004Date of Patent: January 15, 2008Assignee: Infineon Technologies AGInventor: Wolfgang Horn
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Patent number: 7319264Abstract: A semiconductor device has a structure capable of connecting a lead terminal directly to an electrode on a front surface thereof. The semiconductor device includes a first main electrode provided on the front surface, a second main electrode provided on a back surface, and a metal film provided so as to cover at least a portion of a surface of the first main electrode and for soldering the lead terminal thereto. Here, the metal film includes a plurality of opening portions through which the surface of the first main electrode is exposed.Type: GrantFiled: March 9, 2006Date of Patent: January 15, 2008Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Atsushi Narazaki
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Patent number: 7319265Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The metal pillar includes tapered sidewalls with first and second sidewall portions and a spike, and the first and second sidewall portions are concave arcs that are adjacent to one another at the spike.Type: GrantFiled: May 26, 2005Date of Patent: January 15, 2008Assignee: Bridge Semiconductor CorporationInventors: Chia-Chung Wang, Charles W. C. Lin
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Patent number: 7319266Abstract: In one embodiment, an electronic device package (1) includes a leadframe (2) with a flag (3). An electronic chip (8) is attached to the flag (3) with a die attach layer (9). A trench (16) having curved sidewalls is formed in the flag (3) in proximity to the electronic chip (8) and surrounds the periphery of the chip (8). An encapsulating layer (19) covers the chip (8), portions of the flag (3), and at least a portion of the curved trench (16). The curved trench (16) reduces the spread of die attach material across the flag (3) during chip attachment, which reduces chip and package cracking problems, and improves the adhesion of encapsulating layer (19). The shape of the curved trench (16) prevents flow of die attach material into the curved trench (16), which allows the encapsulating layer (19) to adhere to the surface of the curved trench (16).Type: GrantFiled: December 19, 2005Date of Patent: January 15, 2008Assignee: Semiconductor Components Industries, L.L.C.Inventors: Stephen St. Germain, Michael J. Seddon
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Patent number: 7319267Abstract: In a prior art, there has been a method in which a power supply line of an output buffer and that of a control circuit are independently provided so that the power supply noise occurring in the control circuit will not affect the output buffer. However, this method has had the problems that it increases both the number of power supply/grounding pins and power feed line inductance. The present invention provides a technique which, without causing the above two problems, i.e., (1) increased number of power supply/grounding pins and (2) increased power feed line inductance, prevents the noise causing a problem in a control circuit, from becoming routed around and induced into an output buffer.Type: GrantFiled: March 1, 2007Date of Patent: January 15, 2008Assignee: Elpida Memory, Inc.Inventors: Yutaka Uematsu, Hideki Osaka, Yoji Nishio, Yukitoshi Hirose
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Patent number: 7319268Abstract: A semiconductor device comprises a BGA substrate having one principal plane furnished with a large number of solder balls, the solder balls constituting a ball grid array; a semiconductor chip mounted on another principal plane of the BGA substrate, the semiconductor chip being electrically connected to the BGA substrate by metal wires; and chip capacitors mounted on the semiconductor chip to reduce power source noise.Type: GrantFiled: May 4, 2007Date of Patent: January 15, 2008Assignee: Renesas Technology CorpInventors: Masaki Watanabe, Shinji Baba
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Patent number: 7319269Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.Type: GrantFiled: March 24, 2005Date of Patent: January 15, 2008Assignee: Intel CorporationInventor: Edward P. Osburn
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Patent number: 7319270Abstract: An interconnect includes an opening formed in a dielectric layer. A conductive barrier is deposited in the opening, over which a first conductive layer is deposited. A conductive oxide is deposited over the first conductive layer, and a second conductive layer, formed from the same material as the first conductive layer, is deposited over the conductive liner.Type: GrantFiled: August 30, 2004Date of Patent: January 15, 2008Assignee: Infineon Technologies AGInventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Michael Wise
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Patent number: 7319271Abstract: Disclosed herein is a semiconductor device having a multi-layer wiring structure includes a plurality of wiring layers laminated on a substrate, the wiring layers each including a buried wiring and a via formed by filling with a conductive material the inside of a wiring trench formed on the face side of a layer insulation film and a contact hole provided at a bottom portion of the wiring trench. The layer insulation films constituting the plurality of wiring layers are so configured that the layer insulation films are changed in the magnitude of mechanical strength alternately on a wiring layer basis in the lamination direction of the wiring layers.Type: GrantFiled: January 27, 2006Date of Patent: January 15, 2008Assignee: Sony CorporationInventor: Ryuichi Kanamura
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Patent number: 7319272Abstract: A pattern of contacts that includes high speed transmitter contacts disposed in a first portion of the pattern, where the high speed transmitter contacts are disposed in transmitter differential pairs. High speed receiver contacts are disposed in a second portion of the pattern, where the first portion of the pattern is not interspersed with the second portion of the pattern, and the high speed receiver contacts are disposed in receiver differential pairs. At least one unbroken line of other contacts is disposed between the first portion of the pattern and the second portion of the pattern, where the other contacts do not contain any high speed transmitter contacts and high speed receiver contacts. Low speed IO contacts are disposed in a third portion of the pattern, where the third portion of the pattern is disposed in an interior portion of the pattern relative to both the first portion of the pattern and the second portion of the pattern.Type: GrantFiled: April 1, 2005Date of Patent: January 15, 2008Assignee: LSI Logic CorporationInventors: Arun Ramakrishnan, Farshad Ghahghahi, Aritharan Thurairajaratnam, Leah M. Miller
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Patent number: 7319273Abstract: A flexible circuit interposer includes a flexible circuit substrate which allows in-situ probing of an attached device during, for example, circuit debugging, assembly qualification, and the like. A first set of pads (and optionally a fourth set of pads) is configured in a predetermined pattern on the bottom surface of a flexible substrate. Similarly, a second set of pads is configured in substantially the same pattern on the top surface of the flexible substrate, wherein the pads in the second set of pads is electrically continuous with a pad in the first set of pads. A third set of pads is configured in substantially the same pattern on the top surface of the flexible substrate. One or more conductive traces are formed to connect one or more pads in the third set of pads with one or more pads in the first or the second set of pads.Type: GrantFiled: January 5, 2006Date of Patent: January 15, 2008Assignee: Micron Technology, Inc.Inventor: Douglas C Chambers
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Patent number: 7319274Abstract: Methods for the production of airgaps in semiconductor devices and devices produced using such methods are disclosed. An example semiconductor device includes a damascene stack formed using such methods. The damascene stack includes a patterned dielectric layer including an interconnect structure, where the dielectric layer is formed of a dielectric material including Si, C and O. The damascene stack also includes a converted portion of the dielectric layer, where the converted portion is adjacent to the at least one interconnect structure and has a lower carbon content than the dielectric material. The damascene stack also includes an airgap formed adjacent to the interconnect structure, the airgap being formed by removing at least part of the converted portion using an etch compound.Type: GrantFiled: March 22, 2006Date of Patent: January 15, 2008Assignee: Interuniversitair Microelektronica Centrum (IMEC v2w)Inventors: Gerald Beyer, Jean Paul Gueneau de Mussy, Karen Maex, Victor Sutcliffe
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Patent number: 7319275Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.Type: GrantFiled: February 1, 2005Date of Patent: January 15, 2008Assignee: Texas Instruments IncorporatedInventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip R. Coffman
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Patent number: 7319276Abstract: A substrate for a pre-soldering material and a fabrication method of the substrate are proposed. The substrate having at least one surface formed with a plurality of conductive pads is provided. An insulating layer is formed over the surface of the substrate in such a way that a top surface of each of the conductive pads is exposed. Next, a conductive film and a resist layer are formed in sequence on the insulating layer and the conductive pads, wherein a plurality of openings are formed in the resist layer to expose a part of the conductive film above the conductive pad. Then, a pre-soldering material is deposited over the conductive pad by stencil printing or electroplating process.Type: GrantFiled: August 18, 2006Date of Patent: January 15, 2008Assignee: Phoenix Precision Technology CorporationInventors: Shih-Ping Hsu, Chu-Chin Hu
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Patent number: 7319277Abstract: A semiconductor chip or wafer comprises a passivation layer and a circuit line. The passivation layer comprises an inorganic layer. The circuit line is over and in touch with the inorganic layer of the passivation layer, wherein the circuit line comprises a first contact point connected to only one second contact point exposed by an opening in the passivation layer, and the positions of the first contact point and the only one second contact point from a top view are different, and the first contact point is used to be wirebonded thereto.Type: GrantFiled: July 14, 2005Date of Patent: January 15, 2008Assignee: Megica CorporationInventor: Mou-Shiung Lin
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Patent number: 7319278Abstract: An ocean wave generator includes a buoy for floating on the surface of the ocean. A generator is mounted to the buoy. A pulley is mounted on the generator for turning the generator. An anchor cable has a first end wrapped around the pulley and an anchored second end. Upward movement of the buoy and generator due to a wave causes the cable to unwind from the pulley, which turns the generator. A spring connected to the pulley rewinds the anchor cable when the buoy and generator drop into the trough of a wave.Type: GrantFiled: June 1, 2005Date of Patent: January 15, 2008Inventor: Donald Hollis Gehring
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Patent number: 7319279Abstract: A power generating apparatus comprises an electrical power generating device, a vane-carrying structure and a mounting flange. The electrical power generating device includes a body and a power input shaft extending from within the body. The body is generally cylindrical shaped with opposing end portions. The power input shaft extends from a first end portion of the body and a power cord extends from within the body adjacent a second end portion of the body. The vane-carrying structure is attached to the power input shaft and includes a plurality of elongated vanes each have a longitudinal axis that extends generally parallel to a rotational axis of the power input shaft. The vanes are evenly spaced around the power input shaft. The mounting flange is positioned between the vane-carrying structure and the body of the electrical power generating device and is attached to the body of the electrical power generating device. The power input-shaft extends through an aperture of the mounting flange.Type: GrantFiled: March 8, 2006Date of Patent: January 15, 2008Inventor: Barry Joe Korner
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Patent number: 7319280Abstract: Devices and system for interfacing multiple power line communications (PLC)-enabled communication devices in a building are disclosed. In various embodiments, the system can include a high-frequency transformer coupled to a high-frequency communications device, a low-frequency transformer coupled to a low-frequency communication device, and one or more components adapted to appreciably abate distortion and/or attenuation of high-frequency signals passing through the first coupling device.Type: GrantFiled: April 24, 2007Date of Patent: January 15, 2008Assignee: Telkonet, Inc.Inventors: James F. Landry, Andrew Pozsgay
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Patent number: 7319281Abstract: A high-voltage pulse generator to generate short high-voltage pulses is described. In one embodiment, a multi-stage Blumlein is used to form relatively short relatively high-voltage pulses. In one embodiment, the multi-stage Blumlein is based on transmissions lines and provides short pulses to a desired load. In one embodiment, repetition rates on the order of 1 kHz-5 kHz are be achieved due to relatively small charging time and relatively small charging inductances. In one embodiment, water as a capacitor dielectric provides a working field strength of 150-200 kv/cm. In one embodiment, the multi-stage Blumlein is used to provide short pulses for a cold cathode as a source of electrons.Type: GrantFiled: January 26, 2005Date of Patent: January 15, 2008Assignee: Sparktronics, Inc.Inventor: Joseph Yampolsky
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Patent number: 7319282Abstract: A switch circuit for controlling the supply of electrical power from an electrical power source to a load includes a power supply switch comprising input, output and control terminals. The circuit further includes an electronic switching device connected to the control terminal of the power supply switch and having an activating input; a momentary switch coupled to the activating input of the electronic switching device; and a charge storage element coupled to the momentary switch. In a first mode, closing the momentary switch in excess of a triggering time charges the charge storage element and triggers the electronic storage device to turn on the circuit to supply power to the load. In a second mode, closing the momentary switch connects the charge storage element to the electronic switching device to turn off the electronic switching device and the power supply switch, thus interrupting the supply of power to the load.Type: GrantFiled: September 21, 2004Date of Patent: January 15, 2008Assignee: Creative Technology LtdInventors: Jun Makino, Ting Boon Ghee
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Patent number: 7319283Abstract: A moving apparatus includes a first actuator having a movable element and a stator, and a second actuator for driving the stator. The second actuator drives the stator in a direction to suppress rotation of the stator which accompanies movement of the movable element.Type: GrantFiled: June 28, 2005Date of Patent: January 15, 2008Assignee: Canon Kabushiki KaishaInventor: Hiroyuki Koide
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Patent number: 7319284Abstract: A novel surface acoustic wave device with a decreased velocity dispersion and a low insertion loss as well as the fabrication method therefor is provided. The surface acoustic wave device includes a substrate, an insulating layer with an indentation on the substrate, a silicon layer with a first portion on the insulating layer and a second portion suspended above the indentation, a piezoelectric layer on the first and the second portions of the silicon layer, and at least an electrode on the piezoelectric layer.Type: GrantFiled: September 2, 2005Date of Patent: January 15, 2008Assignee: Precision Instrument Development Center National Applied Research LaboratoriesInventors: Jyh-Shin Chen, Sheng-Wen Chen, Hui-Ling Kao, Yu-Sheng Kung, Yu-Hsin Lin, Yi-Chiuen Hu
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Patent number: 7319285Abstract: An optical device which leads light beams emitted by a light source to a predetermined illumination area comprises first and second light leading members. The first light leading member includes a first incident surface configured to be entered the light beams emitted by the light source and a first outgoing radiation surface configured to emit the light beams. The second light leading member includes a second incident surface configured to be entered the light beams emitted from the first outgoing radiation surface of the first light leading member and a second outgoing radiation surface configured to emit the light beams. The first outgoing radiation surface has a shape different from that of the first incident surface. The second outgoing radiation surface has a shape different from that of the second incident surface.Type: GrantFiled: August 12, 2004Date of Patent: January 15, 2008Assignee: Olympus CorporationInventor: Kazunari Hanano
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Patent number: 7319286Abstract: A display device includes a front substrate having an anode and fluorescent materials on an inner surface, and a back substrate having a plurality of cathode lines and include electron sources, and a plurality of control electrodes allow electrons from the electron sources to emit to the front substrate side, on an inner surface thereof. The back substrate is arranged to face the front substrate in an opposed manner with a given gap therebetween, and an outer frame for holding the given gap is interposed between the front substrate and the back substrate and extends around the display region. An inner frame is arranged outside the display region and inside the outer frame, and a getter is provided between the outer frame and the inner frame.Type: GrantFiled: September 30, 2005Date of Patent: January 15, 2008Assignees: Hitachi Displays, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Yuuichi Kijima, Yoshiyuki Kaneko, Shigemi Hirasawa, Susumu Sasaki, Tomoki Nakamura, Hiroshi Kawasaki, Jun Ishikawa
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Patent number: 7319287Abstract: The present invention relates to an electron emission device in which a high voltage can be properly applied to anode electrodes by improving a pattern of apertures of a grid electrode to reduce a diode emission. In an exemplary embodiment of the present invention, the electron emission device includes a first substrate and a second substrate facing each other and having a predetermined gap therebetween. An electron emission unit is formed on the first substrate, and a light emission unit formed on the second substrate. A grid electrode is mounted between the first and second substrates, and has a plurality of apertures per a sub-pixel region of the electron emission unit.Type: GrantFiled: November 29, 2004Date of Patent: January 15, 2008Assignee: Samsung SDI Co., Ltd.Inventor: Sang-Hyuck Ahn
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Patent number: 7319288Abstract: A carbon nanotube-based field emission device in accordance with the invention includes: a cathode electrode (50), a carbon nanotube array (40) formed perpendicularly on the cathode electrode, a barrier (20) and a gate electrode (60). The carbon nanotube array has a growth end (42) electrically contacting with the cathode electrode, and an opposite root end (44) for emitting electrons therefrom. The root end of the carbon nanotube array defines a substantially planar surface having a flatness of less than 1 micron.Type: GrantFiled: March 26, 2004Date of Patent: January 15, 2008Assignees: Tsing Hua University, Hon Hai Precision Industry Co., Ltd.Inventors: Liang Liu, Shoushan Fan
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Patent number: 7319289Abstract: A light emitting device has a light emitting element, and a phosphor layer of phosphor glass to generate fluorescence while being excited by light emitted from the light emitting element. The light emitting element emits ultraviolet light, and the phosphor glass generates visible fluorescence while being excited by the ultraviolet light.Type: GrantFiled: March 10, 2004Date of Patent: January 15, 2008Assignees: Toyoda Gosei Co., Ltd., Sumita Optical Glass, Inc.Inventors: Yoshinobu Suehiro, Mitsuhiro Inoue, Hideaki Kato, Tohru Terajima, Kazuya Aida, Naruhito Sawanobori
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Patent number: 7319290Abstract: An active matrix organic electro-luminescent display (AMOELD) panel comprising a substrate, a pixel structure, an organic light-emitting layer and a cathode pattern layer is provided. The pixel structure layer is disposed over the substrate. The pixel structure layer further comprises an active device matrix and an anode pattern layer. The organic light-emitting layer covers at least the anode pattern layer and comprises at least a first organic light-emitting pattern, at least a second organic light-emitting pattern and at least a third organic light-emitting pattern. The cathode pattern layer is disposed on the organic light-emitting layer. The cathode pattern layer comprises a first cathode pattern disposed on the first organic light-emitting pattern, a second cathode pattern disposed on the second organic light-emitting pattern and a third cathode pattern on the third organic light-emitting pattern. Furthermore, the first, the second and the third cathode pattern are not connected to each other.Type: GrantFiled: September 24, 2004Date of Patent: January 15, 2008Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Wen-Kuo Chu, Bao-Jen Ann
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Patent number: 7319291Abstract: A plasma display panel does not cause disadvantages such as exfoliating or chipping in dielectric layers. The plasma display panel includes a first dielectric layer (7) for covering a display electrode which is formed on a front substrate (3) and which consists of a scan electrode and a sustain electrode, and a second dielectric layer for covering a data electrode formed on a back substrate, and the peripheries of the first dielectric layer (7) and/or the second dielectric layer have a radius of curvature of other than 0.Type: GrantFiled: January 19, 2004Date of Patent: January 15, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Morio Fujitani
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Patent number: 7319292Abstract: A plasma display panel is disclosed. More particularly, the present invention relates to a plasma display panel, which can improve discharge stability as well as brightness and efficiency. The plasma display panel according to the present invention includes transparent electrodes (ITO electrodes) spaced in parallel to each other at a predetermined distance; and metal electrodes each formed on the transparent electrodes (ITO electrodes) in parallel to the transparent electrodes (ITO electrodes) so that the respective transparent electrodes (ITO electrodes) are inclined toward the side where the transparent electrodes face.Type: GrantFiled: March 3, 2004Date of Patent: January 15, 2008Assignee: LG Electronics Inc.Inventors: Sung Chun Choi, Jungwon Kang, Jun Weon Song
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Patent number: 7319293Abstract: The present light bulb includes a wide angle dispersed light which uses, as a source of light dispersion, crystalline particulate material incorporated into the molded or formed material of the light bulb. The crystalline particulate material can be incorporated into the light bulb material prior to the molding or forming process or it can be later applied to the surfaces of the light bulb. The crystalline particulate material are chosen to provide high reflectivity and dispersion qualities for the parts of the light bulb and are further chosen and incorporated according to the function of the particular piece or part therein incorporated. A light tuning element may also be used to further enhance the light dispersion qualities of the light bulb. Methods for making the present light bulb are also provided.Type: GrantFiled: August 9, 2004Date of Patent: January 15, 2008Assignee: Lighting Science Group CorporationInventor: Fredric Maxik
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Patent number: 7319294Abstract: In the metal halide high-pressure discharge lamp for stage, film and television lighting systems and for projection technology and effect lighting, the discharge vessel contains dysprosium and cesium as fill metals for the metal halides. Optimum results for dimmability, arc instability and color rendering are achieved if the fill additionally includes 0.12 to 3.8 ?mol of vanadium and if appropriate 0.05 to 1.0 ?mol of zirconium per ml of vessel volume. These metals achieve improved color rendering, in particular red rendering, with an Ra of from 70 to 95 and an R9 of from 45 to 90.Type: GrantFiled: June 6, 2006Date of Patent: January 15, 2008Assignee: Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbHInventor: Hans-Werner Golling
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Patent number: 7319295Abstract: A radio frequency power supply structure and a plasma CVD device comprising the same are provided in which reflection of radio frequency power at a connecting portion where an RF cable connects to an electrode is reduced so that incidence of the radio frequency power into the electrode increases. In the radio frequency power supply structure for use in a device generating plasma by charging a plate-like electrode with a radio frequency power, the radio frequency power supply structure supplying the electrode with the radio frequency power from an RF cable, the RF cable is positioned on an extended plane of a plane formed by the electrode to connect to the electrode at a connecting portion provided on an end peripheral portion of the electrode. The RF cable connects to the electrode substantially in the same plane as the plane formed by the electrode.Type: GrantFiled: March 13, 2003Date of Patent: January 15, 2008Assignee: Mitsubishi Heavy Industries, Ltd.Inventors: Hiroshi Mashima, Keisuke Kawamura, Akemi Takano, Yoshiaki Takeuchi, Tetsuro Shigemizu, Tatsufumi Aoi
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Patent number: 7319296Abstract: A driving device for driving a plurality of lamps each including a first terminal and a second terminal, includes a power stage circuit (202), a transformer circuit (204) electrically connectable to the power stage circuit, and a current balancing circuit (206) to balance current of the lamps. The current balancing circuit includes a plurality of current balancing components each comprising two inputs and two outputs. The number of the current balancing components is defined as n, where n is an integer from 2 to n. The inputs of the first current balancing component are electrically connected to a terminal of the transformer circuit. The inputs of the nth current balancing component are electrically connected to the outputs of the (n?1)th current balancing component. The outputs of each current balancing component are respectively electrically connected to the first terminals of two of the lamps.Type: GrantFiled: September 22, 2006Date of Patent: January 15, 2008Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Tien-Hsiang Meng, Chi-Hsiung Lee
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Patent number: 7319297Abstract: A balanced current lamp module driven by a power source includes a first balanced current unit, a second balanced current unit and a balanced transformer. The first balanced current unit includes a first transformer, a first lamp and a second lamp. The first transformer has one coil electrically connected with the power source, and the other coil having two ends respectively electrically connected with the first lamp and the second lamp. The second balanced current unit includes a second transformer, a third lamp and a fourth lamp. The second transformer has one coil electrically connected with the power source, and the other coil having two ends respectively electrically connected with the third lamp and the fourth lamp. The balanced transformer has one coil electrically connected with the first lamp, and the other coil electrically connected with the fourth lamp.Type: GrantFiled: July 18, 2006Date of Patent: January 15, 2008Assignee: Delta Electronics, Inc.Inventor: Chun-Liang Kuo
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Patent number: 7319298Abstract: The present invention provides a luminaire system capable of generating light of a desired chromaticity and luminous flux output during continuous operation with varying ambient operating temperature. The luminaire system can be further capable of maintaining a desired correlated colour temperature during dimming of the luminaire. The luminaire system comprises one or more arrays of light-emitting elements for generating light with a current driver system coupled thereto for selectively supplying electrical drive current to each of the arrays, wherein the current driver system is responsive to drive signals received from a controller. The luminaire system further comprises an optical sensor system for generating optical signals representative of chromaticity and luminous flux output of the light. A heat sensing system is operatively coupled to the one or more arrays for generating signals representative of the junction temperatures of arrays of light-emitting elements during operation.Type: GrantFiled: December 21, 2005Date of Patent: January 15, 2008Assignee: Tir Systems, Ltd.Inventors: Paul Jungwirth, Shane P. Robinson, Ingo Speier, Ian Ashdown
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Patent number: 7319299Abstract: A cooling fan, system and method for controlling cooling fans in a personal computer. A unique series of sensing points is placed on a rotating hub of a cooling fan in order to uniquely identify the particular type of cooling fan. A tachometer sensor mounted in the cooling fan detects the unique series of sensing points as the cooling fan rotates and generates a sequence of pulses corresponding to the detected sending points. This generated pulse signal may be transmitted by the sensor to the fan control code. The fan control code may determine a particular type of cooling fan that the cooling fan is based on the generated pulse signal. Once the fan control code determines the particular type of cooling fan that the cooling fan is, the fan control code uses particular control parameters set for that particular type of cooling fan to control the cooling fan so that it operates optimally.Type: GrantFiled: June 27, 2005Date of Patent: January 15, 2008Assignee: Lenovo (Singapore) Pte. Ltd.Inventors: Joseph Wayne Freeman, Steven Dale Goodman, Isaac Karpel, Randall Scott Springfield
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Patent number: 7319300Abstract: In this method, the value of a temperature-dependent motor parameter (ke) of an electronically commutated motor (124) is determined during motor operation without a temperature sensor. The motor has a stator (201) having stator phases (202, 204, 206), and a permanent-magnet rotor (208) coacting with that stator, which rotor induces voltages (UIND) in the stator phases during operation, a power stage (122) being associated with the stator phases in order to control their energization. In this method, energization of the stator phases is interrupted while the rotor (208) is rotating. A value (UIND) characterizing an induced voltage, and a value (?) characterizing a rotation speed of the motor, are ascertained. On the basis of those values, the value of the temperature-dependent motor parameter (ke) is derived. The invention also concerns a motor for carrying out such a method.Type: GrantFiled: May 24, 2006Date of Patent: January 15, 2008Assignee: ebm-Papst St. Georgen GmbH & Co KGInventor: Alexander Hahn
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Patent number: 7319301Abstract: A proximity sensor for sensing an object in the path of or proximate to a closure panel such as a vehicle window. First and second electrodes encased in a non-conductive casing are mounted on the metallic structure near the closing edge of the aperture. The two electrodes define a capacitance CE1/2 therebetween, and parasitic capacitances CE1 and CE2 between the first electrode and chassis ground and the second electrode and chassis ground, respectively. A controller cyclically connects (1) the second electrode to a voltage reference source (Vref1) and the first electrode to chassis ground and (2) the second electrode to chassis ground and the first electrode to the reference capacitor, thereby periodically charging the capacitance CE1/2 and transferring the charge stored thereon to the reference capacitor whilst short-circuiting the parasitic capacitances.Type: GrantFiled: December 17, 2004Date of Patent: January 15, 2008Assignee: Intier Automotive Closures Inc.Inventor: Mirko Pribisic
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Patent number: 7319302Abstract: A gait generating system for a mobile robot has n dynamic models and determines a first gait parameter defining a desired gait such that the boundary condition of a gait on a first dynamic model is satisfied. The first gait parameter is corrected step by step by using an m-th dynamic model (m: integer satisfying 2?m?n), which is each dynamic model other than the first dynamic model, and an m-th gait parameter that satisfies the boundary condition on the m-th dynamic model is determined. The m-th gait parameter is determined by correcting an object of an (m?1)th gait parameter to be corrected on the basis of the degree of deviation of the gait generated on the m-th dynamic model by using the (m?1)th gait parameter from the boundary condition. A final determined n-th gait parameter and an n-th dynamic model are used to generate a desired gait.Type: GrantFiled: February 16, 2005Date of Patent: January 15, 2008Assignee: Honda Motor Co., Ltd.Inventors: Toru Takenaka, Takashi Matsumoto, Takahide Yoshiike
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Patent number: 7319303Abstract: A method and an apparatus for estimating the position of a moving part of a linear actuator are provided. The method comprises the following steps. Move the moving part towards a target position. Receive magnetic signals generated by the magneto-resistive sensor of the linear actuator, which include a sine signal and a cosine signal. Then, generate a first square wave, a second square wave, and a regional square wave based on the sine signal and the cosine signal. Generate a saw-tooth wave based on the sine signal, the cosine signal, the second square wave, and the regional square wave. Next, calculate the number of regions which the moving part is across from the origin point based on the first square wave, the second square wave, and the regional square wave. Finally, estimate the current position of the moving part based on the saw-tooth wave and the number of regions.Type: GrantFiled: September 15, 2006Date of Patent: January 15, 2008Assignee: Industrial Technology Research InstituteInventors: Li-Te Kuo, Hsing-Cheng Yu, Tzung-Yuan Lee, Shyh-Jier Wang
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Patent number: 7319304Abstract: A method of coupling a shunt to a printed circuit board (PCB) of an energy management system is provided. The method includes coupling flexible electrical connectors to the shunt and soldering the flexible electrical connectors to connection points on the PCB of the energy management system. An energy management system that includes a shunt coupled to a printed circuit board using the above method is also provided.Type: GrantFiled: July 23, 2004Date of Patent: January 15, 2008Assignee: Midtronics, Inc.Inventors: Balaguru K. Veloo, Kevin I. Bertness
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Patent number: 7319305Abstract: A battery pack apparatus including a battery pack having a plurality of rechargeable batteries arranged in parallel, with a cooling medium passage interposed therebetween, a cooling medium feeding device for feeding a cooling medium through the cooling medium passages, and a control section for controlling the charge and discharge of the battery pack. In this configuration, the battery pack apparatus is divided into a first unit including the battery pack and the cooling medium feeding device and a second unit having the control section accommodated in a case. The battery pack of the first unit is connected with the control section of the second unit by means of a harness or metallic connecting member.Type: GrantFiled: April 5, 2004Date of Patent: January 15, 2008Assignee: Panasonic EV Energy Co., Ltd.Inventors: Shinya Kimoto, Takaki Kobayashi
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Patent number: 7319306Abstract: An internal combustion motor assembly, including an internal combustion motor, a starter and a battery. In addition, the motor assembly includes a capacitor assembly, a capacitor charging assembly and a conductive network, logic and controlled switching assembly adapted to place the internal combustion motor into one of a set of states. This set includes a first state in which the capacitor assembly is receiving charge from the capacitor charging assembly but is not electrically connected to the starter; a second state in which the capacitor assembly is electrically connected to and powers the starter; and a third state in which both the battery and the capacitor assembly are electrically connected to and power the starter. The logic and controlled switching assembly places the internal combustion motor assembly into the third state after it has been in the second state and a set of criteria is met.Type: GrantFiled: June 25, 2004Date of Patent: January 15, 2008Assignee: Sure Power Industries, Inc.Inventors: Todd Edward Rydman, Christopher S. Brune, Daniel Sama Rubio, Carl R. Smith
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Patent number: 7319307Abstract: Power balancing techniques for a synchronous power generation system are provided. One exemplary method for balancing power in a synchronous generator system includes determining an output power characteristic of a synchronous generator driven by a prime mover and comparing the characteristic to a value derived from the output power of a plurality of synchronous generators. The method also includes providing a correction signal to the synchronous generator to modify the output power produced by that generator. A synchronous power generation system having a plurality of synchronous generators driven by a common prime mover is also provided.Type: GrantFiled: December 16, 2005Date of Patent: January 15, 2008Assignee: General Electric CompanyInventors: Herman Wiegman, Luis Jose Garces
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Patent number: 7319308Abstract: A DC/DC converter includes a first switchcoupled to an input voltage and to a reference voltage. The first switch is suitable for driving a load connected to the output terminal of the DC/DC converter. The DC/DC converter includes an inductor having an intrinsic resistance and being connected to a terminal of the first switch, and a control circuit suitable for generating a driving signal of the first switch at a switching pulse. The control circuit has a first input terminal connected to the output terminal of the DC/DC converter. The DC/DC converter comprises a resistive element and a capacitor connected between the terminal of the first switch and the reference voltage. The control circuit has a second input terminal connected with the terminal in common of the capacitor and of the resistance.Type: GrantFiled: October 18, 2005Date of Patent: January 15, 2008Assignee: STMicroelectronics S.r.l.Inventors: Filippo Marino, Marco Minieri, Giuseppe Maria Di Blasi, Giovanni Genco Russo