Patents Issued in July 10, 2014
  • Publication number: 20140191223
    Abstract: Glass for a scattering layer of an organic LED includes, as represented by mol percentage based on the following oxides, 26% to 43% of B2O3, 30% to 37% of ZnO, 17% to 23% of Bi2O3, 2% to 21% of SiO2, and 0 to 2% of P2O5, and a total amount of B2O3-content and ZnO-content is 78% or less.
    Type: Application
    Filed: March 13, 2014
    Publication date: July 10, 2014
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Naoya WADA, Masamichi TANIDA
  • Publication number: 20140191224
    Abstract: An organic transistor is provided with: an insulating substrate; a pair of insulating pedestals (2, 3) that are arranged spaced apart from each other on the substrate and that form respectively raised flat surfaces; a source electrode (4) provided on the raised flat surface formed on one of the pedestals; a drain electrode (5) provided on the raised flat surface formed on the other pedestal; a gate electrode (6) provided on the substrate between the pair of pedestals; and an organic semiconductor layer (7) arranged in contact with the upper surfaces of the source electrode and the drain electrode. The gate electrode and the lower surface of the organic semiconductor layer vertically oppose each other across a gap region (8), and the side surfaces of the pedestals facing the gap region are shaped such that the lower side edges recede apart from the gate electrode with respect to the upper side edges.
    Type: Application
    Filed: July 18, 2012
    Publication date: July 10, 2014
    Applicant: OSAKA UNIVERSITY
    Inventors: Junichi Takeya, Takafumi Uemura, Mayumi Uno
  • Publication number: 20140191225
    Abstract: A biscarbazole derivative is represented by the following formula (1). A1 and A2 of the following formula (1) represent an aromatic hydrocarbon group having 6 to 30 ring carbon atoms or an aromatic heterocyclic group having 1 to 30 ring carbon atoms. However, at least one of A1 and A2 represents an aromatic heterocyclic group having 1 to 30 ring carbon atoms. Y1 to Y15 represent CR or a nitrogen atom. One of Y8 to Y11 is C (carbon atom) obtained by removing R from CR. The obtained C is bonded to L3. R each independently represents a hydrogen atom, an aromatic hydrocarbon group or the like. L1 to L3 represent a single bond or a divalent linking group. When L3 is a single bond and is bonded to Y11, L1 and L2 are divalent linking groups.
    Type: Application
    Filed: August 15, 2012
    Publication date: July 10, 2014
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Tetsuya Inoue, Mitsunori Ito, Kazuki Nishimura, Kumiko Hibino
  • Publication number: 20140191226
    Abstract: An organic electroluminescent element having a structure in which a plurality of light-emitting layers stacked between a first electrode with light reflectivity and a second electrode with optical transparency while one or more interlayers with a light transmissive property are interposed between the plurality of light-emitting layers. A first interlayer is formed as the interlayer closest to the first electrode. A first light-emitting unit is formed between the first electrode and the first interlayer to include a first light-emitting layer which has a first light-emitting source, and a second light-emitting unit is formed on a side of the first interlayer close to the second electrode to include a second light-emitting layer which has a second light-emitting source. The first interlayer is a semi-transmissive layer which has both of optical transparency and light reflectivity and has a total light absorption ratio of 10% or less.
    Type: Application
    Filed: August 9, 2012
    Publication date: July 10, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Kazuyuki Yamae
  • Publication number: 20140191227
    Abstract: An organic electroluminescent element includes a light-emitting layer between an anode and a cathode. The light-emitting layer contains a phosphorescent light-emitting organic metal complex and at least one host compound. The difference in relative dielectric constant between the host compound and the phosphorescent light-emitting organic metal complex is 0 to ?0.5, and the difference in dipole moment between the host compound and the phosphorescent light-emitting organic metal complex is 0 to ?5.5 debye.
    Type: Application
    Filed: August 10, 2012
    Publication date: July 10, 2014
    Applicant: Konica Minolta, Inc.
    Inventors: Satoru Inoue, Hiroto Ito
  • Publication number: 20140191228
    Abstract: A thin film transistor includes a semiconductor layer disposed on a base substrate and including an oxide semiconductor material, a source electrode and a drain electrode, which respectively extend from opposing ends of the semiconductor layer, a plurality of low carrier concentration areas respectively disposed between the source electrode and the semiconductor layer and between the drain electrode and the semiconductor layer, a gate insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the gate insulating layer.
    Type: Application
    Filed: May 14, 2013
    Publication date: July 10, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: SEOHONG JUNG, Sun Hee Lee, Seung-Hwan Cho, Myounggeun Cha, Yoonho Khang, Youngki Shin
  • Publication number: 20140191229
    Abstract: Semiconductor structures including a zirconium oxide material and methods of forming the same are described herein. As an example, a semiconductor structure can include a zirconium oxide material, a perovskite structure material, and a noble metal material formed between the zirconium oxide material and the perovskite structure material.
    Type: Application
    Filed: January 20, 2014
    Publication date: July 10, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Dale W. Collins, D.V. Nirmal Ramaswamy, Matthew N. Rocklein, Swapnil A. Lengade
  • Publication number: 20140191230
    Abstract: A semiconductor device includes a base insulating film including silicon, an oxide semiconductor film over the base insulating film, a gate insulating film over the oxide semiconductor film, a gate electrode which is in contact with the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The oxide semiconductor film includes a region in which a concentration of silicon distributed from the interface with the base insulating film toward an inside of the oxide semiconductor film is lower than or equal to 1.0 at. %. A crystal portion is included at least in the region.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 10, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya HONDA, Masashi TSUBUKU, Yusuke NONAKA, Takashi SHIMAZU
  • Publication number: 20140191231
    Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.
    Type: Application
    Filed: March 12, 2014
    Publication date: July 10, 2014
    Applicant: JAPAN DISPLAY INC.
    Inventors: Tetsuya SHIBATA, Hajime Watakabe, Atsushi Sasaki, Yuki Matsuura, Muneharu Akiyoshi, Hiroyuki Watanabe
  • Publication number: 20140191232
    Abstract: An intrinsic or substantially intrinsic semiconductor, which has been subjected to a step of dehydration or dehydrogenation and a step of adding oxygen so that the carrier concentration is less than 1×1012/cm3 is used for an oxide semiconductor layer of an insulated gate transistor, in which a channel region is formed. The length of the channel formed in the oxide semiconductor layer is set to 0.2 ?m to 3.0 ?m inclusive and the thicknesses of the oxide semiconductor layer and the gate insulating layer are set to 15 nm to 30 nm inclusive and 20 nm to 50 nm inclusive, respectively, or 15 nm to 100 nm inclusive and 10 nm to 20 nm inclusive, respectively. Consequently, a short-channel effect can be suppressed, and the amount of change in threshold voltage can be less than 0.5 V in the range of the above channel lengths.
    Type: Application
    Filed: March 13, 2014
    Publication date: July 10, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiromichi Godo, Daisuke Kawae
  • Publication number: 20140191233
    Abstract: A 2-chip MEMS microphone component includes: at least one first MEMS microphone structural component having at least one first microphone structure formed in the front side of the structural component; an ASIC structural component having evaluation electronics for the microphone signal of the MEMS microphone structural component; and a housing having a sound opening. The MEMS microphone structural component is mounted within the housing and above the sound opening in such a way that the rear side of the microphone structure is acted on by the sound pressure. The ASIC structural component also includes a second MEMS microphone structure whose microphone signal is fed to the evaluation electronics.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 10, 2014
    Applicant: Robert Bosch GmbH
    Inventors: Bernhard GEHL, Thomas Buck, Florian Schoen
  • Publication number: 20140191234
    Abstract: A 3-D chip stacked structure is disclosed. Each chip layer is provided with plural single-layered conductive members where among the same chip layer the two adjacent conductive members are structurally formed in minor symmetric way with each other along a chip longitudinal direction and the arrangements of the single-layered conductive members of the two adjacent chip layers are shifted by a test pad distance. The single-layered conductive members of the two adjacent chip layers are communicated through a vertical TSV (through silicon via). Therefore, a selection signal or an enabling signal might be transferred through this specific metal layer and related TSV to reach targeting chip layer and targeting circuit.
    Type: Application
    Filed: January 3, 2014
    Publication date: July 10, 2014
    Inventors: Tsai-Yu Huang, Yi-Feng Huang
  • Publication number: 20140191235
    Abstract: A plurality of diode/resistor devices are formed within an integrated circuit structure using manufacturing equipment operatively connected to a computerized machine. Each of the diode/resistor devices comprises a diode device and a resistor device integrated into a single structure. The resistance of each of the diode/resistor devices is measured during testing of the integrated circuit structure using testing equipment operatively connected to the computerized machine. The current through each of the diode/resistor devices is also measured during testing of the integrated circuit structure using the testing equipment. Then, response curves for the resistance and the current are computed as a function of variations of characteristics of transistor devices within the integrated circuit structure and/or variations of manufacturing processes of the transistor devices within the integrated circuit structure.
    Type: Application
    Filed: February 25, 2014
    Publication date: July 10, 2014
    Applicant: International Business Machines Corporation
    Inventors: Lyndon R. Logan, Edward J. Nowak, Robert R. Robison, Jonathan K. Winslow
  • Publication number: 20140191236
    Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
    Type: Application
    Filed: January 14, 2014
    Publication date: July 10, 2014
    Applicant: The Board of Trustees of the University of IIIinois
    Inventors: Ralph G. NUZZO, John A. ROGERS, Etienne MENARD, Keon Jae LEE, Dahl-Young KHANG, Yugang SUN, Matthew MEITL, Zhengtao ZHU
  • Publication number: 20140191237
    Abstract: A method for forming a thin film transistor includes joining a crystalline substrate to an insulating substrate. A doped layer is deposited on the crystalline substrate, and the doped layer is patterned to form source and drain regions. The crystalline substrate is patterned to form an active area such that a conductive channel is formed in the crystalline substrate between the source and drain regions. A gate stack is formed between the source and drain regions, and contacts are formed to the source and drain regions and the gate stack through a passivation layer.
    Type: Application
    Filed: August 14, 2013
    Publication date: July 10, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: BAHMAN HEKMATSHOARTABARI, NING LI, DEVENDRA K. SADANA, DAVOOD SHAHRJERDI
  • Publication number: 20140191238
    Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.
    Type: Application
    Filed: December 8, 2013
    Publication date: July 10, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Jung Hwan HWANG, Bon-Yong KOO, Soo Jin PARK, Jong-Moon PARK, Yong Hee LEE, Jong-Hyuk LEE, Duc-Han CHO
  • Publication number: 20140191239
    Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 10, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Mitsuaki Osame
  • Publication number: 20140191240
    Abstract: A High Electron Mobility Transistor (HEMT) includes a first III-V compound layer having a first band gap, and a second III-V compound layer having a second band gap over the first III-V compound layer. The second band gap is smaller than the first band gap. The HEMT further includes a third III-V compound layer having a third band gap over the second III-V compound layer, wherein the third band gap is greater than the first band gap. A gate electrode is formed over the third III-V compound layer. A source region and a drain region are over the third III-V compound layer and on opposite sides of the gate electrode.
    Type: Application
    Filed: January 4, 2013
    Publication date: July 10, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Taiwan Semiconductor Manufacturing Company, Ltd.
  • Publication number: 20140191241
    Abstract: An array of GaN-based vertical JFETs includes a GaN substrate comprising a drain of one or more of the JFETs and one or more epitaxial layers coupled to the GaN substrate. The array also includes a plurality of hexagonal cells coupled to the one or more epitaxial layers and extending in a direction normal to the GaN substrate. Sidewalls of the plurality of hexagonal cells are substantially aligned with respect to crystal planes of the GaN substrate. The array further includes a plurality of channel regions, each having a portion adjacent a sidewall of the plurality of hexagonal cells, a plurality of gate regions of one or more of the JFETs, each electrically coupled to one or more of the plurality of channel regions, and a plurality of source regions of one or more of the JFETs electrically coupled to one or more of the plurality of channel regions.
    Type: Application
    Filed: January 7, 2013
    Publication date: July 10, 2014
    Applicant: AVOGY, Inc.
    Inventors: Andrew P. Edwards, Hui Nie, Donald R. Disney, Isik Kizilyalli
  • Publication number: 20140191242
    Abstract: A vertical JFET includes a GaN substrate comprising a drain of the JFET and a plurality of patterned epitaxial layers coupled to the GaN substrate. A distal epitaxial layer comprises a first part of a source channel and adjacent patterned epitaxial layers are separated by a gap having a predetermined distance. The vertical JFET also includes a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap. A proximal regrown epitaxial layer comprises a second part of the source channel. The vertical JFET further includes a source contact passing through portions of a distal regrown epitaxial layer and in electrical contact with the source channel, a gate contact in electrical contact with a distal regrown epitaxial layer, and a drain contact in electrical contact with the GaN substrate.
    Type: Application
    Filed: January 7, 2013
    Publication date: July 10, 2014
    Applicant: AVOGY, Inc.
    Inventors: Hui Nie, Andrew P. Edwards, Isik Kizilyalli, David P. Bour, Thomas R. Prunty, Quentin Diduck
  • Publication number: 20140191243
    Abstract: A patterned article includes a substrate support having planar substrate surface portions including a substrate material having a substrate refractive index. A patterned surface is on the substrate support including a plurality of features lateral to the planar substrate surface portions protruding above a height of the planar substrate surface portions. At least a top surface of the plurality of features include an epi-blocking layer including at least one of (i) a non-single crystal material having a refractive index lower as compared to the substrate refractive index and (ii) a reflecting metal or a metal alloy (reflecting material). The epi-blocking layer is not on the planar substrate surface portions.
    Type: Application
    Filed: January 8, 2013
    Publication date: July 10, 2014
    Applicants: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC., SINMAT, INC.
    Inventors: RAJIV K. SINGH, PURUSHOTTAM KUMAR, DEEPIKA SINGH
  • Publication number: 20140191244
    Abstract: A method of controlled p-type conductivity in (Al,In,Ga,B)N semiconductor crystals. Examples include {10 11} GaN films deposited on {100} MgAl2O4 spinel substrate miscut in the <011> direction. Mg atoms may be intentionally incorporated in the growing semipolar nitride thin film to introduce available electronic states in the band structure of the semiconductor crystal, resulting in p-type conductivity. Other impurity atoms, such as Zn or C, which result in a similar introduction of suitable electronic states, may also be used.
    Type: Application
    Filed: March 12, 2014
    Publication date: July 10, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John F. Kaeding, Hitoshi Sato, Michael Iza, Hirokuni Asamizu, Hong Zhong, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20140191245
    Abstract: Disclosed is a light emitting device. A light emitting device comprises a plurality of N-type semiconductor layers including a first N-type semiconductor layer and a second N-type semiconductor layer on the first N-type semiconductor layer, an active layer on the second N-type semiconductor layer, and a P-type semiconductor layer on the active layer, wherein the first N-type semiconductor layer comprises a Si doped Nitride layer and the second N-type semiconductor layer comprises a Si doped Nitride layer, and wherein the first and second N-type semiconductor layers have a Si impurity concentration different from each other.
    Type: Application
    Filed: March 12, 2014
    Publication date: July 10, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventor: Tae Yun KIM
  • Publication number: 20140191246
    Abstract: LED modules are disclosed having a control MOSFET, or other transistor, in series with an LED. In one embodiment, a MOSFET wafer, containing an array of vertical MOSFETS, is aligned and bonded to an LED wafer, containing a corresponding array of vertical LEDs, and singulated to form thousands of active 3-terminal LED modules with the same footprint as a single LED. Despite the different forward voltages of red, green, and blue LEDs, RGB modules may be connected in parallel and their control voltages staggered at 60 Hz or greater to generate a single perceived color, such as white. The RGB modules may be connected in a panel for general illumination or for a color display.
    Type: Application
    Filed: March 12, 2014
    Publication date: July 10, 2014
    Applicant: Nthdegree Technologies Worldwide Inc.
    Inventor: Bradley S. Oraw
  • Publication number: 20140191247
    Abstract: According to one embodiment, a semiconductor device includes a gate electrode, a first semiconductor region, a second semiconductor region of a first conductivity type, a third semiconductor region of a second conductivity type and a fourth semiconductor region of the first conductivity type. The first semiconductor region includes a silicon carbide crystal of 4H—SiC. The second semiconductor region includes a first portion opposing the gate electrode and is provided between the gate electrode and the first semiconductor region. The third semiconductor region has a lattice spacing different from a lattice spacing of the silicon carbide crystal of 4H—SiC and is provided between the gate electrode and the second semiconductor region. The fourth semiconductor region is selectively provided on the third semiconductor region.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 10, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ryosuke IIJIMA, Tatsuo Shimizu, Johji Nishio
  • Publication number: 20140191248
    Abstract: A semiconductor device includes: a semiconductor substrate that has an element region and a peripheral region that surrounds the element region; and a gate pad that is disposed in an area that is on a surface side of the semiconductor substrate. The element region is formed with an insulated gate semiconductor element that has a gate electrode. The peripheral region is formed with a first withstand voltage retaining structure that surrounds the element region and a second withstand voltage retaining structure that is located in a position on the first withstand voltage retaining structure side from an outer edge of the element region and on the element region side from a boundary of the first withstand voltage retaining structure on the element region side. The gate pad is electrically connected to the gate electrode and is disposed in an area in which the second withstand voltage retaining structure is formed.
    Type: Application
    Filed: January 3, 2014
    Publication date: July 10, 2014
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hidefumi Takaya, Masaru Nagao, Narumasa Soejima
  • Publication number: 20140191249
    Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 10, 2014
    Applicant: Nthdegree Technologies Worldwide Inc.
    Inventors: Richard Austin Blanchard, Bradley Steven Oraw
  • Publication number: 20140191250
    Abstract: A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.
    Type: Application
    Filed: July 27, 2012
    Publication date: July 10, 2014
    Applicants: NISSAN MOTOR CO., LTD., FUJI ELECTRIC CO., LTD., SANKEN ELECTRIC CO., LTD., SUMITOMO METAL MINING CO., LTD.
    Inventors: Satoshi Tanimoto, Yusuke Zushi, Yoshinori Murakami, Takashi Iseki, Masato Takamori, Shinji Sato, Kohei Matsui
  • Publication number: 20140191251
    Abstract: It is expected that both reduction of the resistance of a source region and reduction of a leakage current in a gate oxide film be achieved in an MOSFET in a silicon carbide semiconductor device. A leakage current to occur in a gate oxide film of the MOSFET is suppressed by reducing roughness at an interface between a source region and the gate oxide film. If an impurity concentration is to become high at a surface portion of the source region, the gate oxide film is formed by dry oxidation or CVD process. If the gate oxide film is formed by wet oxidation, the impurity concentration at the surface portion of the source region is controlled at a low level.
    Type: Application
    Filed: September 21, 2011
    Publication date: July 10, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoichiro Tarui, Eisuke Suekawa, Naoki Yutani, Shiro Hino, Naruhisa Miura, Masayuki Imaizumi
  • Publication number: 20140191252
    Abstract: A complementary metal oxide semiconductor (CMOS) device includes an n-type first transistor on a silicon substrate, the n-type first transistor including a Group III-V compound semiconductor substrate, and a p-type second transistor on the silicon substrate, the p-type second transistor including a germanium based substrate.
    Type: Application
    Filed: August 23, 2013
    Publication date: July 10, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-moon LEE, Young-jin CHO
  • Publication number: 20140191253
    Abstract: An optoelectronic device includes an optoelectronic component that receives or generates radiation, a frame having a cavity, the optoelectronic component being arranged in said cavity, a connection carrier to which the optoelectronic component is fixed, and a cover covering the cavity and forming a radiation passage area for the radiation, wherein a beam path from the optoelectronic component to the radiation passage area is free of an encapsulation material for the optoelectronic component.
    Type: Application
    Filed: May 19, 2011
    Publication date: July 10, 2014
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Stephan Haslbeck, Markus Foerste, Michael Schwind, Martin Haushalter, Hubert Halbritter, Frank Möllmer
  • Publication number: 20140191254
    Abstract: A multi-chip light emitting device (LED) uses a low-cost carrier structure that facilitates the use of substrates that are optimized to support the devices that require a substrate. Depending upon the type of LED elements used, some of the LED elements may be mounted on the carrier structure, rather than on the more expensive ceramic substrate. In like manner, other devices, such as sensors and control elements, may be mounted on the carrier structure as well. Because the carrier and substrate structures are formed independent of the encapsulation and other after-formation processes, these structures can be tested prior to encapsulation, thereby avoiding the cost of these processes being applied to inoperative structures.
    Type: Application
    Filed: June 28, 2013
    Publication date: July 10, 2014
    Inventor: SERGE J. BIERHUIZEN
  • Publication number: 20140191255
    Abstract: In various embodiments, a light emitting diode module may include a carrier plate, at least one light emitting diode, and at least one sensor configured to register light emitted by the light emitting diode. The light emitting diode is attached to a light emitting diode installation side of the carrier plate. The sensor is installed countersunk through a hole of the carrier plate in relation to the light emitting diode installation side thereof.
    Type: Application
    Filed: December 19, 2013
    Publication date: July 10, 2014
    Applicant: OSRAM GmbH
    Inventors: Farhang Ghasemi Afshar, Krister Bergenek, Andreas Dobner, Holger Huebner, Meik Weckbecker, Ralph Wirth
  • Publication number: 20140191256
    Abstract: Instead of forming contact holes the same way in both the non-image forming peripheral area (PA) and the image forming display area of a thin film transistor array panel, contact holes in the DA are formed to be substantially smaller than those in the PA for thereby improving an aperture ratio of the corresponding display device. In an exemplary embodiment, an inorganic gate insulating layer is not etched in the DA and only an inorganic first passivation layer among inorganic insulating layers positioned in the DA is etched to allow communication between the drain electrode and the corresponding field generating electrode. On the other hand, in the peripheral area, plural inorganic insulating layers such as the gate insulating laver, the first passivation laver, and the second passivation layer positioned on the gate wire and the data wire are simultaneously etched to form second contact holes and third contact holes exposing respective gate pads and data pads.
    Type: Application
    Filed: November 26, 2013
    Publication date: July 10, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Jeong Min PARK, Ji-Hyun KIM, Jung-Soo LEE, Sung Kyun PARK
  • Publication number: 20140191257
    Abstract: In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.
    Type: Application
    Filed: January 31, 2014
    Publication date: July 10, 2014
    Inventors: Michael A. Tischler, Philippe M. Schick, Ian Ashdown, Calvin Wade Sheen, Paul Jungwirth
  • Publication number: 20140191258
    Abstract: According to one embodiment, a semiconductor light emitting device includes not less than three chips. Each of the chips includes a semiconductor layer having a first face, a second face formed on a side opposite to the first face, and a light emitting layer, a p-side electrode, and an n-side electrode. The chips include a central chip centrally positioned in a plan view, and at least two peripheral chips arranged symmetrically to each other sandwiching the central chip in the plan view. A thickness of the fluorescent body layer on the first face is same among the peripheral chips, and the fluorescent body layer on the first face of the central chip and the fluorescent body layers on the first faces of the peripheral chips have thicknesses different from each other.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 10, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yosuke AKIMOTO, Akihiro Kojima, Miyoko Shimada
  • Publication number: 20140191259
    Abstract: A method and apparatus for coating a plurality of semiconductor devices that is particularly adapted to coating LEDs with a coating material containing conversion particles. One method according to the invention comprises providing a mold with a formation cavity. A plurality of semiconductor devices are mounted within the mold formation cavity and a curable coating material is injected or otherwise introduced into the mold to fill the mold formation cavity and at least partially cover the semiconductor devices. The coating material is cured so that the semiconductor devices are at least partially embedded in the cured coating material. The cured coating material with the embedded semiconductor devices is removed from the formation cavity. The semiconductor devices are separated so that each is at least partially covered by a layer of the cured coating material.
    Type: Application
    Filed: March 13, 2014
    Publication date: July 10, 2014
    Applicant: CREE, INC.
    Inventors: MICHAEL S. LEUNG, Eric J. Tarsa, James Ibbetson
  • Publication number: 20140191260
    Abstract: The invention provides a light emitting semiconductor structure, which includes a substrate; a first LED chip formed on the substrate; an adhesion layer formed on the first LED chip; and a second light emitting diode chip formed on the adhesion layer, wherein the second LED chip has a first conductive wire which is electrically connected to the substrate.
    Type: Application
    Filed: March 13, 2014
    Publication date: July 10, 2014
    Applicants: SemiLEDs Optoelectronics Co., Ltd., VisEra Technologies Company Limited
    Inventor: Wu-Cheng KUO
  • Publication number: 20140191261
    Abstract: A light emitting heterostructure including a partially relaxed semiconductor layer is provided. The partially relaxed semiconductor layer can be included as a sublayer of a contact semiconductor layer of the light emitting heterostructure. A dislocation blocking structure also can be included adjacent to the partially relaxed semiconductor layer.
    Type: Application
    Filed: January 9, 2014
    Publication date: July 10, 2014
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Publication number: 20140191262
    Abstract: Devices are described including a component comprising an alloy of AlN and AlSb. The component has an index of refraction substantially the same as that of a semiconductor in the optoelectronic device, and has high transparency at wavelengths of light used in the optoelectronic device. The component is in contact with the semiconductor in the optoelectronic device. The alloy comprises between 0% and 100% AlN by weight and between 0% and 100% AlSb by weight. The semiconductor can be a III-V semiconductor such as GaAs or AlGaInP. The component can be used as a transparent insulator. The alloy can also be doped to form either a p-type conductor or an n-type conductor, and the component can be used as a transparent conductor. Methods of making and devices utilizing the alloy are also disclosed.
    Type: Application
    Filed: January 10, 2013
    Publication date: July 10, 2014
    Applicant: Intermolecular Inc.
    Inventors: Philip Kraus, Thai Cheng Chua, Yoga Saripalli
  • Publication number: 20140191263
    Abstract: Disclosed herein is a resin composition for molding a reflector for a light-emitting semiconductor diode comprising about 25 to about 80 wt. % of an heat-resistant aromatic polyester, about 5 to 50 wt. % of titanium dioxide filler; and about 5 to 50 wt. % of a glass fibers having a flat surface. In another aspect of the present invention, there is also provided a reflector for a light-emitting semiconductor element, which includes a molded product of the resin composition. In a further aspect of the present invention, there is also provided a light-emitting semiconductor unit comprising a light-emitting semiconductor diode element, leads connecting electrodes of the light-emitting semiconductor diode element with external electrodes, respectively, and the reflector.
    Type: Application
    Filed: March 27, 2013
    Publication date: July 10, 2014
    Inventors: Liang Wang, Takumi Shigeta, Hongtao Shi, Dake Shen
  • Publication number: 20140191264
    Abstract: There is provided a semiconductor light-emitting device including a substrate having a first refractive index, a nitride semiconductor layer formed on the substrate and having a second refractive index that is different from the first refractive index, a light-emitting structure formed on the nitride semiconductor layer and including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, and an optical extraction film disposed between the substrate and the nitride semiconductor layer and having a refractive index between the first refractive index and the second refractive index.
    Type: Application
    Filed: September 23, 2013
    Publication date: July 10, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Sub KIM, Kyung-Wook HWANG, Deok-Kyu KIM, Cheol-Soo SONE
  • Publication number: 20140191265
    Abstract: Light emitting devices with improved light extraction efficiency are provided. The light emitting devices have a stack of layers including semiconductor layers comprising an active region. The stack is bonded to a transparent optical element.
    Type: Application
    Filed: December 20, 2013
    Publication date: July 10, 2014
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V
    Inventors: MICHAEL D. CAMRAS, MICHAEL R. KRAMES, WAYNE L. SNYDER, FRANK M. STERANKA, ROBERT C. TABER, JOHN J. UEBBING, DOUGLAS W. POCIUS, TROY A. TROTTIER, CHRISTOPHER H. LOWERY, GERD O. MUELLER, REGINA B. MUELLER-MACH
  • Publication number: 20140191266
    Abstract: In one example embodiment, a light emitting device includes a transparent substrate and a transparent electrode on the transparent substrate, the transparent electrode comprising at least two transparent electrode layers, the at least two transparent electrode layers being successively stacked and having different refractive indices, the refractive index of one of the at least two transparent electrode layers that is closer to the transparent substrate being higher than the refractive index of the other one of the at least two transparent electrode layers. The light emitting device further includes a light emission layer on the transparent electrode and a reflective electrode on the light emission layer.
    Type: Application
    Filed: January 2, 2014
    Publication date: July 10, 2014
    Applicants: Samsung Corning Precision Materials Co., Ltd., Samsung Electronics Co., Ltd.
    Inventors: Gae-hwang LEE, Jeong-woo PARK, Yoon-young KWON, Kyung-wook PARK, Mi-jeong SONG, Young-Zo YOO, Yong-wan JIN
  • Publication number: 20140191267
    Abstract: A light emitting device according to the embodiment includes a light emitting structure including a first conductive semiconductor layer, an active layer disposed under the first conductive semiconductor layer, and a second conductive semiconductor layer disposed under the active layer. A first electrode is disposed under the light emitting structure and is electrically connected to the first conductive semiconductor layer, and a second electrode is disposed under the light emitting structure and is electrically connected to the second conductive semiconductor layer. A first contact portion is disposed through the light emitting structure and includes a first region electrically connected to the first electrode and a second region making contact with a top surface of the first conductive semiconductor layer.
    Type: Application
    Filed: January 6, 2014
    Publication date: July 10, 2014
    Inventor: Hwan Hee JEONG
  • Publication number: 20140191268
    Abstract: A light emitting element includes: a substrate; a first conductive type semiconductor layer stacked on the substrate; a light emitting layer stacked on the first conductive type semiconductor layer; a second conductive type semiconductor layer stacked on the light emitting layer; an ITO layer stacked on the second conductive type semiconductor layer; and a reflective layer stacked on the ITO layer. The substrate is transparent to an emission wavelength of the light emitting layer, and the reflective layer includes a Ti-containing first layer stacked on the ITO layer to make contact with the ITO layer and an Al-containing second layer stacked on the first layer in an opposite side to the ITO layer.
    Type: Application
    Filed: January 7, 2014
    Publication date: July 10, 2014
    Applicant: ROHM CO., LTD.
    Inventors: Tomoya EBISAWA, Tomohito KAWASE
  • Publication number: 20140191269
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body, a first electrode, a second electrode, and a dielectric body part. The stacked structure body includes a first semiconductor layer, having a first portion and a second portion juxtaposed with the first portion, a light emitting layer provided on the second portion, a second semiconductor layer provided on the light emitting layer. The first electrode includes a contact part provided on the first portion and contacting the first layer. The second electrode includes a first part provided on the second semiconductor layer and contacting the second layer, and a second part electrically connected with the first part and including a portion overlapping with the contact part when viewed from the first layer toward the second layer. The dielectric body part is provided between the contact part and the second part.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 10, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi KATSUNO, Satoshi Mitsugi, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20140191270
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 10, 2014
    Applicant: ROHM CO., LTD.
    Inventors: Nobuaki MATSUI, Hirotaka OBUCHI, Yasuo NAKANISHI, Kazuaki TSUTSUMI, Takao FUJIMORI
  • Publication number: 20140191271
    Abstract: In a light emitting module, a red phosphor is contained in a second phosphor layer so that the wavelength of a second phosphor layer after the wavelength conversion is longer than that of a first phosphor layer. And a blue phosphor and a yellow-green phosphor are contained in the first phosphor layer. The first phosphor layer is formed in an illumination area of light emitted from an LED chip, and the first phosphor layer converts the wavelength of the light from the LED chip and emits the wavelength-converted light from an emission surface. A part of the second phosphor layer is formed in a non-direct area where no light is illuminated from the LED chip and where light is illuminated from the first phosphor layer. The part of the second phosphor layer formed in the non-direct illumination area converts the wavelength of the light emitted from the first phosphor layer.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 10, 2014
    Applicant: Koito Manufacturing Co., Ltd.
    Inventors: Yuzo MAENO, Kazuhiro ITO, Osamu KUBOYAMA, Hisayoshi DAICHO, Shogo SUGIMORI
  • Publication number: 20140191272
    Abstract: An optoelectronic component includes a substrate, on which a semiconductor chip and a wettable attractor element are arranged. A medium including pigments at least regionally covers the exposed region of the substrate that is not covered by the semiconductor chip and the attractor element. The medium at least partly wets the semiconductor chip and the attractor element.
    Type: Application
    Filed: June 27, 2012
    Publication date: July 10, 2014
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Simon Jerebic, Erik Heinemann, Markus Pindl, Michael Bestele, Jan Marfeld