Patents Issued in November 20, 2018
  • Patent number: 10134480
    Abstract: A voltage generator and a flash memory thereof are provided. The voltage generator is used to provide a work reference voltage having a plurality of reference levels to a word line decoder circuit and includes a plurality of voltage trimming circuits. The voltage trimming circuits are connected in series between the work reference voltage and a ground voltage and respectively receive a trimming code, wherein the voltage levels of the work reference voltages are controlled by the trimming codes received by the voltage trimming circuits to select one of the reference levels.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: November 20, 2018
    Assignee: Winbond Electronics Corp.
    Inventor: Shih-Ming Tsai
  • Patent number: 10134481
    Abstract: Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target data latch coupled to a data node, storing at least one bit of a second target data state of the multiple possible data states of a second memory cell to be programmed in an aggressor data latch coupled to the data node, and programming the first memory cell and performing a program verify operation for the first target data state to determine if the first memory cell is verified for the first target data state.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: November 20, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Tommaso Vali, Andrea D'Alessandro, Violante Moschiano, Mattia Cichocki, Michele Incarnati, Federica Paolini
  • Patent number: 10134482
    Abstract: Apparatuses and methods are provided for a high speed writing test mode for memories. An example apparatus includes a memory core, a data terminal coupled to a data receiver, a read buffer coupled between the data terminal and the memory core, and a write buffer coupled between the data receiver and the memory core. The write buffer may include at least a first input coupled to the data receiver, and a second input. While in a test mode, the write buffer may be loaded with data from the second input instead of the first input.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: November 20, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Stefan Dietrich, Wolfgang Spirkl
  • Patent number: 10134483
    Abstract: A large-scale integrated circuit with built-in self-repair (BISR) circuitry for enabling redundancy repair for embedded memories in each of a plurality of processor cores with embedded built-in self-test (BIST) circuitry. The BISR circuitry receives and decodes BIST data from the embedded memories into fail signature data in a physical-aware form on which repair analysis can be performed. The fail signature data is reformatted into a unified repair format, such that a fuse encoder circuit can be used to encode fuse patterns in that unified repair format for a repair entity for each of the embedded memories. The fuse patterns are reconfigured into the appropriate order for storing in shadow fuse registers associated with the specific embedded memories.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: November 20, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Devanathan Varadarajan, Sumant Dinkar Kale
  • Patent number: 10134484
    Abstract: A semiconductor system includes a controller and a semiconductor device. The controller outputs a burn-in test signal, a clock signal and command/address signals. The semiconductor device enters a first test mode if the burn-in test signal is inputted. The semiconductor device enters a second test mode according to a level combination of the command/address signals in synchronization with the clock signal after the semiconductor device enters the first test mode. The semiconductor device enters a third test mode according to an other level combination of the command/address signals in synchronization with the clock signal after the semiconductor device enters the second test mode.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: November 20, 2018
    Assignee: SK hynix Inc.
    Inventors: Myung Kyun Kwak, Bok Rim Ko
  • Patent number: 10134485
    Abstract: A semiconductor system may be provided. The semiconductor system may include a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device outputs address signals. The first semiconductor device may receive or output data. The second semiconductor device may perform an impedance calibration operation and outputs pull-up codes and pull-down codes generated by the impedance calibration operation. The third semiconductor device may output internal data selected by the address signals as the data or store the data during a write operation or a read operation.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: November 20, 2018
    Assignee: SK hynix Inc.
    Inventor: Jae Il Kim
  • Patent number: 10134486
    Abstract: A memory device includes a memory cell array including a plurality of memory cells arranged in a plurality of columns including a normal column and a redundancy column for repairing the normal column, a plurality of peripheral logic circuits including a normal peripheral logic circuit and a redundancy peripheral logic circuit for repairing the normal peripheral logic circuit, and a first path selection logic circuit configured to form first paths between the plurality of columns and the plurality of peripheral logic circuits, based on at least one defect from among a defect in at least one of the plurality of columns or a defect in at least one of the plurality of peripheral logic circuits.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: November 20, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hoonki Kim, Yongho Kim, Changnam Park, Taejoong Song, Woojin Rim, Jonghoon Jung
  • Patent number: 10134487
    Abstract: A memory device may include a memory cell array, a bloom-filter circuit, a cache memory circuit, and a selecting circuit. The bloom-filter circuit may be configured to output a determination result signal that indicates that there is a possibility that a received address is one of failed addresses corresponding to failed cells of the memory cell array. The cache memory circuit may be configured to, store the failed addresses and a first set of data corresponding to the respective failed addresses, and configured to, when the determination result signal indicates a possibility, provide a comparison result signal by determining whether received address coincides with one of the failed addresses. The selecting circuit may be configured to output either first data of the first set of data or second data of the memory cell array corresponding to the received address based on determination result signal and comparison result signal.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: November 20, 2018
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Sang-Hyuk Kwon, Young-Hoon Son, Jung-Ho Ahn
  • Patent number: 10134488
    Abstract: Provided are mechanisms and processes for a medical appointment delay management system. According to various examples, the system includes a location sensor that detects when a medical professional enters an examination room to conduct an examination of a particular patient. The system also includes a medical schedule processor that logs a time associated with when the medical professional enters the examination room and compares this time with scheduling information to predict whether future appointments in the schedule will be delayed. A notification interface, included in the system, is designed to notify an upcoming patient if their scheduled appointment will be substantially delayed. Scheduling information is cryptographically separated from HIPAA information.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: November 20, 2018
    Inventors: Deborah T. Bullington, Andrew B. Bullington
  • Patent number: 10134489
    Abstract: A medical pad includes a piece of substrate with a major surface and an electric circuit on the major surface, a sensor connected with the electric circuit for measuring the electrical resistance of the electric circuit, and a wireless data transceiver or a radio frequency identification (RFID) tag electrically connected with the sensor for receiving results of the measuring from the sensor for subsequent transmission. The system carries out real time self-calibration to adaptively monitor the condition of a medical pad even in the face of changing environment and changing material properties.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: November 20, 2018
    Assignee: Convergence Systems Limited
    Inventors: Kin Yue Albert Lai, Cheuk Kuen Kenny Chan, Man Wai Law, Kwok Wah Sit, Ngai Yin Chan, Siu Chong Tin, Wai Kin Chan, Tak Leung Siu, Yick Ming Yeung, Jerry Garrett
  • Patent number: 10134490
    Abstract: A graphical user interface is provided displaying a first viewing window selected from a set of possible viewing windows conveying respective feature measurements related to labor progression. At least one viewing window in the set of possible viewing windows conveys a given feature measurement and a safety limit associated to the given feature measurement. The graphical user interface also displays at least one control allowing a user to select a subset of viewing windows from the set of possible viewing windows, the subset of viewing windows including at least one viewing window other than the first viewing window. The selected subset of viewing windows is displayed simultaneously with the first viewing window. In response to the given feature measurement exceeding the associated safety limit, information is displayed to attract the attention of the user to the viewing window conveying the given feature measurement.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: November 20, 2018
    Assignee: PERIGEN, INC.
    Inventor: Emily Hamilton
  • Patent number: 10134491
    Abstract: Application of axial seed magnetic fields in the range 20-100 T that compress to greater than 10,000 T (100 MG) under typical NIF implosion conditions may significantly relax the conditions required for ignition and propagating burn in NIF ignition targets that are degraded by hydrodynamic instabilities. Such magnetic fields can: (a) permit the recovery of ignition, or at least significant alpha particle heating, in submarginal NIF targets that would otherwise fail because of adverse hydrodynamic instability growth, (b) permit the attainment of ignition in conventional cryogenic layered solid-DT targets redesigned to operate under reduced drive conditions, (c) permit the attainment of volumetric ignition in simpler, room-temperature single-shell DT gas capsules, and (d) ameliorate adverse hohlraum plasma conditions during laser drive and capsule compression. In general, an applied magnetic field should always improve the ignition condition for any NIF ignition target design.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: November 20, 2018
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Lindsay John Perkins, Jim H. Hammer, John D. Moody, Max Tabak, George Beedon Zimmerman, Burl Grant Logan
  • Patent number: 10134492
    Abstract: The device has a target supply unit 4a for supplying a target 2a to a chamber 3a, a target monitor 5a for monitoring the target 2a present inside the chamber 3a, a laser light irradiator 6a for irradiating the target 2a present inside the chamber 3a, with laser light 8a, and a controller 7a. The target supply unit 4a emits the target 2a at a timing for emitting, that is controlled by the controller 7a, into a preset emission direction 3d inside the chamber 3a, and the controller 7a calculates an irradiation point 4d with the laser light 8a, calculates a timing for arriving of the target 2a at the irradiation point 4d, and makes the laser light irradiator 6a irradiate the target with the laser light, based on the irradiation point 4d and the timing for arriving.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: November 20, 2018
    Assignees: HAMAMATSU PHOTONICS K.K., TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takashi Sekine, Toshiyuki Kawashima, Nakahiro Satoh, Yoneyoshi Kitagawa, Yoshitaka Mori, Katsuhiro Ishii, Ryohei Hanayama, Osamu Komeda, Yasuhiko Nishimura, Mitsutaka Kakeno
  • Patent number: 10134493
    Abstract: Provided are a nuclear reactor and an operating method for the reactor. The reactor includes a driving system and a safety system. The safety system includes isolation vessels, heat exchangers, a coolant pipe, and a communication pipe. Fluid is distributed in the safety system according to thermal, pressure, and leak conditions.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: November 20, 2018
    Assignee: Korea Atomic Energy Research Institute
    Inventors: Sung-Jae Yi, Chul-Hwa Song, Hyun Sik Park, Sung Won Bae, Rae-Joon Park
  • Patent number: 10134494
    Abstract: In an installation device of a reactor repair device and a method, an installation pole (111) connected with an upper portion of a water jet peening device (101), a lifting device (112) that can suspend and support an upper portion of the installation pole (111) and can lift the installation pole (111) from a work floor (121), a moving device (113) that can move the lifting device (112) in two directions intersecting in a horizontal direction, and a position adjustment device (114) that can move the installation pole (111) in the horizontal direction in a state where the installation pole (111) is supported by the lifting device (112).
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: November 20, 2018
    Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Akio Minamiyama, Yutaka Nishitsuji, Koji Okimura, Kazuyuki Hinami, Tomochika Hamamoto, Takao Konno
  • Patent number: 10134495
    Abstract: Garments with radiation-reducing pockets and harnessing are described. A shirt can include a pocket made of a radiation-reducing material to place an electronic device such as a smartphone within. This can reduce the amount of radiation absorbed by a user's body. A harness system of the shirt can also distribute the weight of the smartphone to improve the comfort of the user.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: November 20, 2018
    Inventor: Frederick D. Easley
  • Patent number: 10134496
    Abstract: Methods and devices for directing a waste fluid from a radiopharmaceutical synthesis system to a waste vessel are provided. In one example, the method includes serially connecting a primary waste vessel to a secondary waste vessel with a fluid conduit, including a waste valve connected to the fluid conduit extending between the primary waste vessel and secondary waste vessel; opening the waste valve so as to allow fluid communication between cavities of the primary and secondary waste vessels; drawing a low pressure in both waste vessels; closing the waste valve so as to fluidically isolate the secondary waste vessel from the primary waste vessel, discharging the waste fluid through a pump valve into the primary waste vessel, and opening the waste valve to evacuate the waste fluid from the primary waste vessel into the secondary waste vessel.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 20, 2018
    Assignee: GE Healthcare Limited Company
    Inventors: Nigel John Osborn, Julian Grigg, Eric Horn, Jonathan Robert Shales
  • Patent number: 10134497
    Abstract: The present invention provides a method for producing Cu67 radioisotope suitable for use in medical applications. The method comprises irradiating a metallic zinc-68 (Zn68) target within a sealed ceramic capsule with a high energy gamma ray beam. After irradiation, the Cu67 is isolated from the Zn68 by any suitable method (e.g. chemical and or physical separation). In a preferred embodiment, the Cu67 is isolated by sublimation of the zinc in a ceramic sublimation tube to afford a copper residue containing Cu67. The Cu67 can be further purified by chemical means.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: November 20, 2018
    Assignee: UCHICAGO ARGONNE, LLC
    Inventors: David A. Ehst, James L. Willit
  • Patent number: 10134498
    Abstract: A plasmon generator comprises a plasmon supporting surface and first and second quantum systems respectively defining first and second quantum states with a tunneling junction being present between the first and second quantum systems, the first and second quantum systems being present in an electric circuit to generate a tunneling current between the first and second quantum systems, whereby electrons tunneling between said first and second quantum states loose energy in the process and generate plasmons at the plasmon supporting surface.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: November 20, 2018
    Assignees: MAX-PLANCK-GESELLSCHAFT ZUR FORDERUNG DER WISSENSCHAFTEN E.V., KING'S COLLEGE LONDON
    Inventors: Alexander Kabakchiev, Theresa Lutz, Christoph Grosse, Uta Schlickum, Klaus Kuhnke, Klaus Kern, Alessandro De Vita
  • Patent number: 10134499
    Abstract: A scintillation crystal can include a sodium halide that is co-doped with thallium and another element. In an embodiment, the scintillation crystal can include NaX:Tl, Me, wherein X represents a halogen, and Me represents a Group 1 element, a Group 2 element, a rare earth element, or any combination thereof. In a particular embodiment, the scintillation crystal has a property including, for radiation in a range of 300 nm to 700 nm, an emission maximum at a wavelength no greater than 430 nm; or an energy resolution less than 6.4% when measured at 662 keV, 22° C., and an integration time of 1 microsecond. In another embodiment, the co-dopant can be Sr or Ca. The scintillation crystal can have lower energy resolution, better proportionality, a shorter pulse decay time, or any combination thereof as compared to the sodium halide that is doped with only thallium.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: November 20, 2018
    Assignee: SAINT-GOBAIN CERAMICS & PLASTICS, INC.
    Inventors: Kan Yang, Peter R. Menge, John M. Frank
  • Patent number: 10134500
    Abstract: An aluminum wire 10 has a composition containing at least one element of Fe: 0 to 2.0 mass %, Mg: 0 to 1.0 mass %, Zr: 0 to 0.5 mass %, Si: 0 to 1.2 mass %, or Ni: 0 to 0.3 mass %, with the remainder being composed of aluminum and unavoidable impurities. In a cross section 15 perpendicular to the longitudinal direction 11 of the aluminum wire, the surface area proportion of component crystals for which the angle 14 between the longitudinal direction and the <111> direction of the crystal is 10° or less, relative to the total surface area of the cross section, is 50% or greater, and the surface area proportion of component crystals for which the angle 14 between the longitudinal direction and the <111> direction of the crystal is 20° or less, relative to the total surface area of the cross section, is 85% or greater.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: November 20, 2018
    Assignee: YAZAKI CORPORATION
    Inventor: Hayato Ikeya
  • Patent number: 10134501
    Abstract: Method for connecting two portions of a first electrically conducting polymer with a second polymer. The method includes disposing a solution of a second polymer in a solvent to be in contact with the two portions of the first electrically conducting polymer and allowing the solvent to evaporate leaving the second polymer joining the two portions of the first polymer. The second polymer may be doped to improve its conductivity.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: November 20, 2018
    Assignee: Massachusetts Institute of Technology
    Inventors: Ian W. Hunter, Lauren Montemayor, Eli Travis Paster, Priam Pillai
  • Patent number: 10134502
    Abstract: A composite formulation of the present disclosure may have conductive properties (i.e. low resistance), such that the formulation may be used in resistive heating applications. The composite may have one or more matrix materials and one or more conductive fillers. The composite may be used in the formation of resistive heaters having a number of layers, including a conductive layer, the conductive layer including the composite. Heaters of the present disclosure may be used for a number of applications including ground, floor, or roof heating, or laboratory equipment heating.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: November 20, 2018
    Inventor: Kim Edward Elverud
  • Patent number: 10134503
    Abstract: A semi-conductive crosslinked layer produced from a polymer composition includes at least one polymer A having at least one epoxy function. A cross-linking agent B includes at least one reactive function that can react with the epoxy function of said polymer A in order to allow the cross-linking of said polymer A. The polymer composition also has an electrically conductive filler having a specific surface area BET of at least 100 m2/g according to the ASTM standard D 6556.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: November 20, 2018
    Assignee: NEXANS
    Inventors: Anthony Combessis, Laurent Keromnes, Melek Maugin, Lucile Carteron
  • Patent number: 10134504
    Abstract: The flat cable is structured such that a plurality of insulated wires with their conductors covered with insulating resin are arranged in parallel and the outer surfaces of the plurality of insulated wires are integrated. The insulating resin between two insulated wires is removed by laser beam in a soldering portion, and, among the plurality of insulated wires, only two mutually adjoining insulated wires are electrically connected to each other by soldering in the soldering portions in which the insulating resin are removed and the conductors are exposed. Such flat cable can positively solder bridge the mutually adjoining conductors.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: November 20, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuya Namiki, Yoshimasa Watanabe
  • Patent number: 10134505
    Abstract: A cable has at least one elongated electric conductor and a multilayer insulation surrounding the electric conductor. The multilayer insulation has a first semiconducting layer and an electrically insulating layer. The two layers are made from a silicone rubber based composition. A method for making this cable includes co-extruding the first semiconducting layer and the electrically insulating layer.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: November 20, 2018
    Assignee: NEXANS
    Inventors: Markus Gasser, Franz Haner, Luc Romann
  • Patent number: 10134506
    Abstract: A shielded electrical cable includes one or more conductor sets extending along a length of the cable and being spaced apart from each other along a width of the cable. Each conductor set has one or more conductors having a size no greater than 24 AWG and each conductor set has an insertion loss of less than about ?20 dB/meter over a frequency range of 0 to 20 GHz. First and second shielding films are disposed on opposite sides of the cable, the first and second films including cover portions and pinched portions arranged such that, in transverse cross section, the cover portions of the first and second films in combination substantially surround each conductor set, and the pinched portions of the first and second films in combination form pinched portions of the cable on each side of each conductor.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: November 20, 2018
    Assignee: 3M Innovative Properties Company
    Inventor: Douglas B. Gundel
  • Patent number: 10134507
    Abstract: A cable (100) includes a plurality of wires (10) and a jacket (20) enclosing the wires. The wires includes a plurality of differential signal wires (11) for transmitting high speed signal, a detection signal wire (12), at least one auxiliary signal wire (13), and a plurality of lower speed signal wires (14). All of the differential signal wires, the detection signal wire and the at least one auxiliary signal wire are arranged at an outer peripheral of and enclosing the lower signal wires. Each two adjacent differential signal wire pairs are separated by one of the detection signal wire and the at least one auxiliary signal wire.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: November 20, 2018
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Jerry Wu, Jun Chen, Fan-Bo Meng
  • Patent number: 10134508
    Abstract: An MgB2 superconducting wire includes a core containing MgB2 and a metal sheath which surrounds the core. The core includes at least a first MgB2 core positioned on the center side, and a second MgB2 core positioned outside the first MgB2 core, and the density of the second MgB2 core is lower than the density of the first MgB2 core.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: November 20, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Youta Ichiki, Kazuhide Tanaka, Motomune Kodama
  • Patent number: 10134509
    Abstract: A clamping insulator for securing electrical wires to support structures includes an insulating second clamp member, and an insulating first clamp member that is hingebly connected to the insulating second clamp member and an eyebolt, wherein the hinge is positioned at an angle relative to the electrical wire, the first clamp member is simply flipped over upon the second clamp member to secure the wire in place, the eyebolt both secures the first and second clamp members in the closed position and allows easy access for a lineman with a hot stick, and, in the closed position, the eyebolt is positioned at a compound angle relative to the ground and supporting structure it sits upon to provide easy access for a hot stick.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: November 20, 2018
    Assignee: ALUMA-FORM, INC.
    Inventor: Roger Pyron
  • Patent number: 10134510
    Abstract: A chip resistor includes an insulating substrate, a resistive element provided on an upper surface of the insulating substrate, a pair of upper-surface electrodes provided on respective ones of both end portions of an upper surface of the resistive element so as to expose a part of the upper surface of the resistive element from the upper-surface electrodes, and a protective layer that covers the part of the resistive element and that does not cover the pair of upper-surface electrodes. The pair of upper-surface electrodes have exposed upper surfaces and exposed edge surfaces, respectively. Each of the edge surfaces of the pair of upper-surface electrodes does not project outward from respective one of the edge surfaces of the insulating substrate. The chip resistor can reduce a temperature coefficient of resistance to improve the temperature coefficient of resistance.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: November 20, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Shogo Nakayama
  • Patent number: 10134511
    Abstract: A resistance element includes a first electro-conductive layer that is formed on a substrate and includes a body portion and a protruding portion protruding from the body portion, and the body portion includes a current path from an input portion to an output portion. The resistance element further includes a second electro-conductive layer that is formed on the first electro-conductive layer via an insulating layer by using a material having a lower resistivity than the first electro-conductive layer. The resistance element further includes a connection portion that is provided to the insulating layer at a position corresponding to the protruding portion and includes a contact hole penetrating from the first electro-conductive layer to the second electro-conductive layer.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: November 20, 2018
    Assignee: Seiko Epson Corporation
    Inventor: Shinsuke Fujikawa
  • Patent number: 10134512
    Abstract: A ceramic material has a composition represented by Cax?NaxMny?MyO12, wherein M denotes at least one of Ni and Cu, and x?, x, y?, and y satisfy any of (a), (b), and (c) in which x?+x=X and y?+y=Y: 0.9 7.0 ? X Y < 1.0 7.0 ; ( a ) at a condition of X Y = 1.0 7.0 , 0.03 8 ? x X + Y < 0.30 8 ? ? and ? ? 0 ? y X + Y ? 0.35 8 ; and ( b ) 1.0 7.0 < X Y ? 1.0 6.9 .
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: November 20, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Sakyo Hirose
  • Patent number: 10134513
    Abstract: Provided is a method for manufacturing a high silicon steel sheet having excellent producibility and magnetic properties. The method includes: casting a molten metal as a strip having a thickness of 5 mm or less, the molten metal comprising, by weight %, C: 0.05% or less (excluding 0%), N: 0.05% or less (excluding 0%), Si: 4% to 7%, Al: 0.5% to 3%, Si+Al: 4.5% to 8%, and the balance of Fe and inevitable impurities; hot-rolling the cast strip at a temperature of 800° C. or higher; annealing the hot-rolled strip at a temperature within a range of 900° C. to 1200° C.; cooling the annealed strip; warm-rolling the quenched strip at a temperature within a range of 300° C. to 700° C.; and finally annealing the warm-rolled strip at a temperature within a range of 800° C. to 1200° C.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: November 20, 2018
    Assignee: POSCO
    Inventors: Byung-Deug Hong, Jin-Mo Koo, Jae-Kon Lee, Sung-Jin Park, Sang-Hoon Kim
  • Patent number: 10134514
    Abstract: In a method for producing a grain-oriented electrical steel sheet by hot rolling a raw steel material containing C: 0.002˜0.10 mass %, Si: 2.0˜8.0 mass % and Mn: 0.005˜1.0 mass % to obtain a hot rolled sheet, subjecting the hot rolled sheet to a hot band annealing as required and further to one cold rolling or two or more cold rollings including an intermediate annealing therebetween to obtain a cold rolled sheet having a final sheet thickness, subjecting the cold rolled sheet to a primary recrystallization annealing combined with decarburization annealing, applying an annealing separator to the steel sheet surface and then subjecting to a final annealing, when rapid heating is performed at a rate of not less than 50° C./s in a range of 100˜700° C. in the heating process of the primary recrystallization annealing, the steel sheet is subjected to a holding treatment at any temperature of 250˜600° C. for 0.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: November 20, 2018
    Assignee: JFE Steel Corporation
    Inventors: Masanori Uesaka, Takeshi Imamura, Ryuichi Suehiro, Takayuki Fukunaga, Toshito Takamiya
  • Patent number: 10134515
    Abstract: A superconducting magnet device includes a vacuum container having a tubular barrel portion; a magnet assembly including a superconducting coil, a refrigerant tank, and a radiation shield, the magnet assembly being housed in the vacuum container; a supporting block fixed to the barrel portion and protruding beyond the barrel portion to the inside of the vacuum container; and a connecting portion which connects the magnet assembly and the supporting block to each other such that the magnet assembly is spaced apart from the barrel portion within the vacuum container. The connecting portion has thermal conductivity lower than thermal conductivity of the supporting member. The supporting member receives weight of the magnet assembly via the connecting portion while protruding inwardly beyond at least an outer circumference surface of the radiation shield of the magnet assembly.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: November 20, 2018
    Assignee: JAPAN SEMICONDUCTOR TECHNOLOGY INC.
    Inventors: Atsuko Oka, Shota Kanai
  • Patent number: 10134516
    Abstract: A sensor ring is provided for a magnetic measuring transducer of an ABS system consisting of at least two annularly arranged functional elements. The first functional element is formed as a ferromagnetic annular disc element with a flat upper side and a flat underside with a multiplicity of openings. The second functional element, as a non-ferromagnetic element, has either been applied on the upper side and/or the underside of the annular disc element and/or has been introduced into the openings, as an annular disc element. The sensor ring is protected from contamination or damage by the non-ferromagnetic covering. The covering may also be produced by encapsulation or filling, wherein the openings in the sensor ring can be filled with plastic and also the side faces can be coated with plastic.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: November 20, 2018
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Josef Seidl, Andreas Kirchberger
  • Patent number: 10134517
    Abstract: A mounting system for mounting an electronic display device, such as an electronic display device, to various surfaces including nonferrous and nonmagnetic surfaces is provided. In one implementation, the mounting system includes a surface-side attachment affixed to a surface, and a device-side attachment coupled to the electronic display device. The surface-side attachment and the device-side attachment include a plurality of magnets with at least one magnet with an outwardly-facing north pole and at least one magnet with an outwardly-facing south pole per attachment that self-aligns the attachments when mounting the electronic display device to the surface. The surface-side attachment and the device-side attachment may further include mechanical features and/or high friction faces to resist slipping and shear forces when the attachments are coupled together.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: November 20, 2018
    Inventor: Alejandro Baca
  • Patent number: 10134518
    Abstract: Radio frequency (RF) transmission line transformers are disclosed. Unlike conventional transformers that employ magnetic cores that transmit energy from input to output through magnetic flux linkages, the embodiments of the RF transmission line transformer disclosed herein transfer energy by configuring transformer coils as balanced transmission lines. More specifically, the RF transmission line transformers have a primary transformer coil that forms at least one primary winding and a secondary transformer coil that forms at least a pair of secondary windings. The primary winding of the primary transformer coil is disposed between the pair of secondary windings so that the primary winding forms a different balanced transmission line with each one of the pair of secondary windings. This results in greater bandwidth and higher transformer power efficiency (TPE) at RF frequencies.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: November 20, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Michael F. Zybura, Toshiaki Moriuchi
  • Patent number: 10134519
    Abstract: A coil component including: a magnetic core that contains an Fe-based magnetic powder and a binding agent, the Fe-based magnetic powder having an insulator film and having a volume resistivity of 107 ?·cm or more; and a coil conductor. The average particle size D50 of the Fe-based magnetic powder is 5 ?m or smaller and the magnetic permeability of the magnetic core is 5 or more.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: November 20, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yuya Ishida
  • Patent number: 10134520
    Abstract: A coil electronic component includes a magnetic body in which a coil having leads exposed to side surfaces of the coil is disposed. External terminals are connected to the leads and disposed on outer surfaces of the magnetic body. Additionally, the external terminals are folded to have side surface portions which are disposed on end surfaces of the magnetic body, and bottom surface portions which are disposed on a bottom surface of the magnetic body.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: November 20, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Byeong Cheol Moon
  • Patent number: 10134521
    Abstract: A radio frequency (RF) transmitter, comprising a Tesla transformer and an LC oscillator, said Tesla transformer comprising inner and outer conductors (10, 20), said inner conductor (20) comprising a generally tubular magnetic core (22) carrying a conductive member (22a) on its outer surface and said outer conductor (10) comprising a generally tubular magnetic core (13) carrying a conductive member (12) on its inner surface, said LC oscillator including a secondary winding module (40) comprising a generally tubular body (41) carrying a conductive coil (42) on its outer surface, said inner conductor (20), outer conductor (10) and secondary winding module (40) being arranged in a substantially concentric nested configuration such that said inner conductor (20) is located within said secondary winding module (40) and said secondary winding module (40) is located within said outer conductor (10), wherein a first portion (45) of relatively high permittivity dielectric material is provided between said conductive me
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: November 20, 2018
    Assignee: BAE Systems plc
    Inventors: Michael James Parker, Ian Anthony Moore, Daniel James Scott
  • Patent number: 10134522
    Abstract: A planar reactor includes a core and a coil. The core includes an upper board, a lower board and a pillar. The pillar is located between the upper board and the lower board. A winding space is located among the upper board, the lower board and the pillar. The coil is wound around the pillar and located in the winding space. The pillar and at least one of the upper board and the lower board are coplanar at a first side of the planar reactor. The pillar is sunk into the winding space from a second side of the planar reactor, wherein the first side is opposite to the second side. A first end of the coil is exposed from the first side of the planar reactor. A second end of the coil is hidden in the winding space partially or wholly at the second side of the planar reactor.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: November 20, 2018
    Assignee: CYNTEC CO., LTD.
    Inventors: Wei Zhang, Chu-Keng Lin, Hung-Chih Lin, Hsieh-Shen Hsieh
  • Patent number: 10134523
    Abstract: A coil component has a core part 10 composing a closed magnetic path through which a closed loop of a magnetic flux passes, the magnetic flux being generated by two coils 14A, 14B that are arranged in parallel, and generate a magnetic field, and the core part 10 has a pair of I-type base cores 11A, 11B facing each other, and a pair of coupling core parts 11C, 11D. The coupling core parts 11C, 11D are each formed by linearly aligning three unit coupling cores 12A to 12F, and each of these cores 12A to 12F is formed into a configuration in which a column-shaped projection is provided on a core body, and a two-stage gap including a small gap and a large gap is to be formed mutually in a space in the adjacent unit cores 11A, 11B, and 12A to 12F by the configuration.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: November 20, 2018
    Assignee: SUMIDA CORPORATION
    Inventors: Hiroshi Kawashima, Takayuki Yamaguchi
  • Patent number: 10134524
    Abstract: An electric power receiving device includes a ferrite, and a power receiving coil in which a hollow portion is formed. The power receiving coil is formed so as to surround a winding axis that extends in the thickness direction. When the power receiving coil and the ferrite are viewed from an observation position spaced apart from the power receiving coil in a direction in which the winding axis extends, notch portions are formed in an outer peripheral portion of the ferrite such that the notch portions overlap side portions of the coil. The width of each notch portion as measured in a circumferential direction of the power receiving coil increases in a direction away from the hollow portion of the power receiving coil.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: November 20, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hiroaki Yuasa
  • Patent number: 10134525
    Abstract: The present invention provides a dust core including, as principal components, a pulverized powder of an Fe-based amorphous alloy ribbon; and a Cr-containing Fe-based amorphous alloy atomized spherical powder, and the pulverized powder is in the shape of a thin plate having two principal planes opposing each other, and assuming that a minimum dimension along a plane direction of the principal planes is a grain size, the pulverized powder includes a pulverized powder with a grain size more than twice and not more than six times as large as a thickness of the pulverized powder in a proportion of 80 mass % or more of the whole pulverized powder and includes a pulverized powder with a grain size not more than twice as large as the thickness of the pulverized powder in a portion of 20 mass % or less of the whole pulverized powder.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: November 20, 2018
    Assignee: HITACHI METALS LTD.
    Inventor: Kazunori Nishimura
  • Patent number: 10134526
    Abstract: Systems and methods for creating an inductive element are disclosed. Multiple partial windings may be created relative to a core, where each of the partial windings is initially discontinuous. Multiple printed conductors may be created on a substrate, where the multiple printed conductors are arranged to electrically connect the multiple partial windings. The multiple partial windings may be electrically connected to the multiple printed conductors to create a complete winding around the core.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: November 20, 2018
    Assignee: DISH Technologies L.L.C.
    Inventor: John Nicholas Brooksbank
  • Patent number: 10134527
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: November 20, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Koichi Morozumi, Masato Shimada, Akira Kuriki
  • Patent number: 10134528
    Abstract: An apparatus suitable for use in an air-conditioning system and configured to provide a plurality of selectable capacitance values includes a plurality of capacitive devices and a pressure interrupter cover assembly. Each of the capacitive devices has a first capacitor terminal and a second capacitor terminal. The pressure interrupter cover assembly includes a deformable cover, a set of section cover terminals, a common cover terminal, and a set of insulation structures. The first capacitor terminal of at least one of the capacitive devices is electrically connectable to one of the section cover terminals, and the second capacitor terminal of the at least one of the capacitive devices is electrically connectable to the common cover terminal.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: November 20, 2018
    Assignee: American Radionic Company, Inc.
    Inventor: Robert M. Stockman
  • Patent number: 10134529
    Abstract: A composite electronic component includes an electronic element mounted on a resistance element in a height direction. The electronic element includes an electronic element body, and first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on an upper surface of the base portion, and first and second upper surface conductors on the upper surface of the base portion. The first and second upper surface conductors are separated from each other in the length direction, and the resistor is located between the first and second upper surface conductors. A dimension in the height direction of the resistor is smaller than both a dimension in the height direction of the first external electrode of a portion located on a lower surface of the electronic element body, and a dimension in the height direction of the second external electrode of a portion located on a lower surface of the electronic element body.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: November 20, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa