Patents Issued in September 17, 2019
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Patent number: 10418490Abstract: Provided are a field effect transistor and a manufacturing method thereof. With this method, an active layer in the field effect transistor is manufactured by a solution method with black phosphorus nanosheets or black phosphorus quantum dots as material. The manufacturing process is simple to reduce the production cost and enriches the preparation materials of field effect transistor for reducing environmental pollution and dependence on metal elements. Meanwhile, the use of a carbon material, such as graphene or carbon nanotube for the preparation of a source pattern layer, a drain pattern layer and a top gate pattern layer can form an effective ohmic contact with a black phosphorus active layer to reduce the contact resistance.Type: GrantFiled: August 21, 2017Date of Patent: September 17, 2019Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., LtdInventor: Huafei Xie
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Patent number: 10418491Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.Type: GrantFiled: December 19, 2017Date of Patent: September 17, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masayuki Sakakura, Ryosuke Watanabe, Junichiro Sakata, Kengo Akimoto, Akiharu Miyanaga, Takuya Hirohashi, Hideyuki Kishida
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Patent number: 10418492Abstract: In a cross section in a channel width direction, a semiconductor layer includes a first region of which one end portion is in contact with an insulating layer and which is positioned at one side portion of the semiconductor layer; a second region of which one end portion is in contact with the other end portion of the first region and which is positioned at an upper portion of the semiconductor layer; and a third region of which one end portion is in contact with the other end portion of the second region and the other end portion is in contact with the insulating layer and which is positioned at the other side portion of the semiconductor layer. In the second region, an interface with a gate insulating film is convex and has three regions respectively having curvature radii R1, R2, and R3 that are connected in this order from the one end portion side toward the other. R2 is larger than R1 and R3.Type: GrantFiled: October 31, 2017Date of Patent: September 17, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 10418493Abstract: Devices and methods for forming a tight pitch stack nanowire without shallow trench isolation including a base nanosheet formed on a substrate. At least one fin are formed, and at least one dummy gate is formed over the at least two fins, on the base nanosheet, the at least two fins including at least two alternating layers of a first material and a second material. The base nanosheet is replaced with a blanket dielectric to form a shallow trench isolation (STI) around the at least one fin and around the at least one dummy gate. A gate replacement is performed to replace the at least one dummy gate and the second material with a gate conductor material and a gate cap to form gate structures.Type: GrantFiled: December 19, 2017Date of Patent: September 17, 2019Assignee: International Business Machines CorporationInventor: Effendi Leobandung
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Patent number: 10418494Abstract: In a method of manufacturing a semiconductor device, a Schottky electrode is formed on an upper surface of a semiconductor substrate. A second region of the semiconductor substrate is etched such that a first region becomes higher than a second region, a rising surface is formed between the first and second regions, and an outer peripheral edge of the Schottky electrode is located on the first region. An insulating film is formed on the upper surface of the semiconductor substrate such that the insulating film annularly extends along the rising surface. A field plate electrode is formed. The field plate electrode is electrically connected with the Schottky electrode and faces the upper surface of the semiconductor substrate via the insulating film within an area extending from the outer peripheral edge of the Schottky electrode to the second region over the rising surface.Type: GrantFiled: January 10, 2018Date of Patent: September 17, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Tatsuji Nagaoka
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Patent number: 10418495Abstract: A gallium nitride-based sensor having a heater structure and a method of manufacturing the same are disclosed, the method including growing an n-type or p-type GaN layer on a substrate, growing a barrier layer on the n-type or p-type GaN layer, sequentially growing a u-GaN layer and a layer selected from among an AlxGa1-xN layer, an InxAl1-xN layer and an InxAlyGa1-x-yN layer on the barrier layer, patterning the n-type or p-type GaN layer to form an electrode, forming the electrode along the pattern formed on the n-type or p-type GaN layer, and forming a sensing material layer on the layer selected from among the AlxGa1-xN layer, the InxAl1-xN layer and the InxAlyGa1-x-yN layer, wherein a HEMT sensor or a Schottky diode sensor can be heated using an n-GaN (or p-GaN) layer, thus increasing the sensitivity of the sensor and reducing the restoration time.Type: GrantFiled: September 13, 2018Date of Patent: September 17, 2019Assignee: KOREA ADVANCED NANO FAB CENTERInventors: Kyungho Park, Chuyoung Cho, Hyeong Ho Park, Yu Min Koh
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Patent number: 10418496Abstract: A photodiode array includes a plurality of photodiodes formed in a semiconductor substrate. Each of the photodiodes includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, provided with respect to the first semiconductor region on one surface side of the semiconductor substrate, and having an impurity concentration higher than an impurity concentration of the first semiconductor region, a third semiconductor region of a second conductivity type, provided with respect to the first semiconductor region on the one surface side so as to surround the second semiconductor region separately from the second semiconductor region, and constituting a light detection region together with the first semiconductor region, and a through-electrode provided within a through-hole passing through the first semiconductor region and the second semiconductor region, and electrically connected to the third semiconductor region.Type: GrantFiled: November 26, 2013Date of Patent: September 17, 2019Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Tatsumi Yamanaka, Akira Sakamoto, Noburo Hosokawa
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Patent number: 10418497Abstract: Metallization pastes for use with semiconductor devices are disclosed. The pastes contain silver particles, low-melting-point base-metal particles, organic vehicle, and optional crystallizing agents. Specific formulations have been developed that produce stratified metal films that contain less silver than conventional pastes and that have high peel strengths. Such pastes can be used to make high contact resistance metallization layers on silicon.Type: GrantFiled: August 22, 2016Date of Patent: September 17, 2019Assignee: Hitachi Chemical Co., Ltd.Inventors: Brian E. Hardin, Stephen T. Connor, James Randy Groves, Craig H. Peters
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Patent number: 10418498Abstract: Disclosed are a single-source precursor for synthesizing metal chalcogenide nanoparticles for producing a light absorption layer of solar cells comprising a Group VI element linked as a ligand to any one metal selected from the group consisting of copper (Cu), zinc (Zn) and tin (Sn), metal chalcogenide nanoparticles produced by heat-treating at least one type of the single-source precursor, a method of preparing the same, a thin film produced using the same and a method of producing the thin film.Type: GrantFiled: April 29, 2019Date of Patent: September 17, 2019Assignee: LG CHEM, LTD.Inventors: Eun Ju Park, Seokhee Yoon, Seokhyun Yoon, Hosub Lee
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Patent number: 10418499Abstract: A light emitting device, such as an LED, is formed by forming clusters of semiconductor nanostructures separated by inter-cluster regions that lack semiconductor nanostructures over a substrate, where each semiconductor nanostructure includes a nanostructure core having a doping of a first conductivity type and an active shell formed around the nanostructure core, and selectively depositing a second conductivity type semiconductor material layer having a doping of a second conductivity type on the clusters of semiconductor nanostructures. Portions of the selectively deposited second conductivity type semiconductor material layer form a continuous material layer in each cluster of semiconductor nanostructures, and the second conductivity type semiconductor material layer is not deposited in the inter-cluster regions.Type: GrantFiled: June 1, 2017Date of Patent: September 17, 2019Assignee: GLO ABInventors: Richard P. Schneider, Benjamin Leung
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Patent number: 10418500Abstract: An infrared detector includes a quantum dot structure, and an electrode that is coupled to the quantum dot structure, wherein the quantum dot structure is obtained by stacking a plurality of structures each including a quantum dot, a first barrier layer under the quantum dot and a second barrier layer over the quantum dot to cover the quantum dots, and an intermediate layer under the first barrier layer, and wherein the first barrier layer includes a first region and a second region having a lower Al concentration than that of the intermediate layer between the first region and the intermediate layer.Type: GrantFiled: July 2, 2018Date of Patent: September 17, 2019Assignee: FUJITSU LIMITEDInventors: Ryo Suzuki, Junichi Kon, Hironori Nishino
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Patent number: 10418501Abstract: A concentrator-type photovoltaic module includes a plurality of photovoltaic cells having respective surface areas of less than about 4 square millimeters (mm) electrically interconnected in series and/or parallel on a backplane surface, and an array of concentrating optical elements having respective aperture dimensions of less than about 30 mm and respective focal lengths of less than about 50 mm. The array of concentrating optical elements is positioned over the photovoltaic cells based on the respective focal lengths to concentrate incident light on the photovoltaic cells, and is integrated on the backplane surface by at least one spacer structure on the backplane surface. Related devices, operations, and fabrication methods are also discussed.Type: GrantFiled: September 30, 2016Date of Patent: September 17, 2019Assignee: X-Celeprint LimitedInventors: Brent Fisher, Matthew Meitl, Scott Burroughs, Miroslav Samarskiy
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Patent number: 10418502Abstract: The present invention relates to multi-cell devices fabricated on a common substrate that are more desirable than single cell devices, particularly in photovoltaic applications. Multi-cell devices operate with lower currents, higher output voltages, and lower internal power losses. Prior art multi-cell devices use physical isolation to achieve electrical isolation between cells. In order to fabricate a multicell device on a common substrate, the individual cells must be electrically isolated from one another. In the prior art, isolation generally required creating a physical dielectric barrier between the cells, which adds complexity and cost to the fabrication process. The disclosed invention achieves electrical isolation without physical isolation by proper orientation of interdigitated junctions such that the diffusion fields present in the interdigitated region essentially prevent the formation of a significant parasitic current which would be in opposition to the output of the device.Type: GrantFiled: August 11, 2017Date of Patent: September 17, 2019Assignee: MTPV Power CorporationInventors: Eric Brown, Andrew Walsh, Jose Borrego, Paul Greiff
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Patent number: 10418503Abstract: An object of the present invention is to obtain an easy-to-work solar battery module having high joining strength as well as suppressing an increase in residual thermal stress without increasing the thickness of an interconnector. The solar battery module of the present invention includes a solar battery cell including a semiconductor substrate having pn junction, and a first electrode and a second electrode that are formed on a p-type region and an n-type region of the semiconductor substrate and an interconnector to connect the solar battery cell and an adjacent solar battery cell. The interconnector is a bundle of a plurality of round thin wires and includes abutment regions abutting on the first electrode and the second electrode of the adjacent solar battery cell.Type: GrantFiled: July 14, 2015Date of Patent: September 17, 2019Assignee: MITSUBISHI ELECTRIC CORPORATIONInventor: Yosuke Inoue
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Patent number: 10418504Abstract: An anisotropic conducting adhesive is improved in conductivity without increasing the density of admixed conductive particles by inducing metallic fusion between the surfaces of the conducting particles and the surfaces being bonded. The metallic fusion may be promoted by physical/chemical interaction characteristic of certain materials at a compressed interface; by compression sufficient to deform the conductive particles in a manner that increases the mechanical contact area; by heating (with or without melting of a material), which may also serve to cure the adhesive matrix; or by acoustic vibration, e.g., ultrasonic vibration. The resulting metallic-fusion joint is stronger, as well as more conductive, than a joint in which the particles and surfaces are held in unfused mechanical contact.Type: GrantFiled: November 29, 2018Date of Patent: September 17, 2019Assignee: The Boeing CompanyInventor: Eric M. Rehder
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Patent number: 10418505Abstract: A method including installing solar pods at varying heights on a tower, where a size of each of the solar pods is inversely related its installation height on the tower, each of the solar pods including a transparent ovoid enclosure symmetrical about an axis, and a reflector and a solar cell both contained within the transparent ovoid enclosure, the solar cell positioned at a common focal point of the reflector such that substantially all light reflected by the reflector is directed at the solar cell.Type: GrantFiled: May 18, 2017Date of Patent: September 17, 2019Assignee: International Business Machines CorporationInventors: Aveek N. Chatterjee, Kota V. R. M. Murali, Ninad D. Sathaye, Rajesh Sathiyanarayanan
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Patent number: 10418506Abstract: A light-emitting device including a substrate at least partially doped with a first type of conductivity and including a face; light-emitting diodes each including at least one three-dimensional semiconducting element which is undoped or doped with the first type of conductivity and resting on the said face; and semiconducting regions forming photodiodes, at least partially doped with a second type of conductivity opposite to the first type of conductivity and extending in the substrate from the said face between at least some of the three-dimensional semiconducting elements, a portion of the substrate of first type of conductivity extending up to the said face at the level of each three-dimensional semiconducting element.Type: GrantFiled: September 9, 2016Date of Patent: September 17, 2019Assignee: AlediaInventors: Tiphaine Dupont, Erwan Dornel
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Patent number: 10418507Abstract: To achieve an opto-reflector in which a distance to a detection target is shortened to be able to detect the position of the closer detection target, and thereby contributing to the reduction of the arrangement space. The opto-reflector (10) includes a plate-shaped substrate (11); a light emitting element (13) and a light receiving element (14) mounted on the substrate (11); light transmitting resin layer (12) which seals the light emitting element (13) and the light receiving element (14); and a light shielding portion (21) provided between the light emitting element (13) and the light receiving element (14). The light shielding portion (21) is formed at a height such that a part of light beam can be directly transferred between the light emitting element (13) and the light receiving element (14) via the light transmitting resin layer (12).Type: GrantFiled: December 8, 2015Date of Patent: September 17, 2019Assignee: NEW JAPAN RADIO CO., LTD.Inventors: Fumiaki Ohno, Seiji Koike
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Full-laser scribing method for large-area copper indium gallium selenide thin-film solar cell module
Patent number: 10418508Abstract: Disclosed is a full-laser scribing method for a large-area copper indium gallium selenide (CIGS) thin-film solar cell module, including: using a laser I to scribe a molybdenum thin film prepared on soda-lime glass to form a first scribed line (P1); preparing the following film layers in sequence on the molybdenum layer in which P1 has been scribed: a CIGS layer, a cadmium sulfide layer and an intrinsic zinc oxide layer; after finishing preparation of the above film layers, using a laser II for scribing to form a second scribed line (P2), wherein the scribed line P2 is parallel with the scribed line P1; and preparing an aluminum-doped zinc oxide layer on the intrinsic zinc oxide layer in which P2 has been scribed, and using a laser III for scribing to form a third scribed line (P3), wherein the scribed line P3 is parallel with the scribed line P1.Type: GrantFiled: May 17, 2016Date of Patent: September 17, 2019Assignees: BEIJING SIFANG AUTOMATION CO., LTD., BEIJING SIFANG CRENERGEY OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Ning Zhang, Xinping Yu, Wanlei Dai -
Patent number: 10418509Abstract: Various embodiments of solid state transducer (“SST”) devices are disclosed. In several embodiments, a light emitter device includes a metal-oxide-semiconductor (MOS) capacitor, an active region operably coupled to the MOS capacitor, and a bulk semiconductor material operably coupled to the active region. The active region can include at least one quantum well configured to store first charge carriers under a first bias. The bulk semiconductor material is arranged to provide second charge carriers to the active region under the second bias such that the active region emits UV light.Type: GrantFiled: May 10, 2018Date of Patent: September 17, 2019Assignee: Micron Technology, Inc.Inventors: Martin F. Schubert, Vladimir Odnoblyudov
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Patent number: 10418510Abstract: A method for fabricating a light emitting diode (LED) with a first electrical contact deposited around the side of a layered mesa structure. First, layers of materials are formed. The layers of materials include a first semiconductor layer, a second semiconductor layer, and a light emitting layer between the first and second semiconductor layers for producing light responsive to passing current through the light emitting layer. The formed layers of material are shaped to include a bottom surface, a top surface, and at least one side surface extending from the bottom surface to the top surface. The top surface has a smaller area than the bottom surface. An electrical contact is deposited on the at least one side surface.Type: GrantFiled: December 22, 2017Date of Patent: September 17, 2019Assignee: Facebook Technologies, LLCInventors: Celine Claire Oyer, Allan Pourchet
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Patent number: 10418511Abstract: Methods are provided for forming AlInGaBN material. The method can include growing an AlInGaBN layer on a substrate; removing a portion of the AlInGaBN layer from the substrate to define a plurality of AlInGaBN islands on the substrate; and growing a highly doped-AlInGaBN layer on each of the AlInGaBN islands.Type: GrantFiled: June 22, 2016Date of Patent: September 17, 2019Assignee: University of South CarolinaInventor: Asif Khan
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Patent number: 10418512Abstract: A method for manufacturing light emitting diode crystal grains includes steps of providing a first substrate; forming a buffer layer on the first substrate; forming a UV blocking layer on buffer layer; and forming a plurality of light emitting diode crystal grains on the buffer layer. The emitting diode crystal grains together form a wafer. An auxiliary substrate is provided and coated with an adhesive layer. The auxiliary substrate is pressed to the wafer, the adhesive layer fills gaps between the light emitting diode crystal grains, and solidifies the adhesive layer. The second surface is irradiated and gasified. The first substrate is thus separated from the UV blocking layer and the adhesive layer is dissolved, thus achieving a plurality of light-emitting diode crystal grains.Type: GrantFiled: December 6, 2017Date of Patent: September 17, 2019Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY INC.Inventors: Po-Min Tu, Tzu-Chien Hung, Chia-Hui Shen, Chien-Shiang Huang, Chien-Chung Peng, Ya-Wen Lin, Ching-Hsueh Chiu
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Patent number: 10418513Abstract: A compound semiconductor device includes a substrate, including a top surface, a bottom surface, a side surface connecting the top surface and the bottom surface; and a semiconductor stack formed on the top surface, wherein the side surface includes a first deteriorated surface, a second deteriorated surface, a first crack surface between the first and second deteriorated surfaces, a second crack surface between the first deteriorated surface and the top surface, and a third crack surface between the second deteriorated surface and the bottom surface, wherein the first crack surface is inclined to the first deteriorated surface or the second deteriorated surface; and wherein the second crack surface or the third crack surface is substantially perpendicular to the top surface or the bottom surface.Type: GrantFiled: September 27, 2018Date of Patent: September 17, 2019Assignee: EPISTAR CORPORATIONInventors: Chia Chen Tsai, Chen Ou, Chi Ling Lee, Chi Shiang Hsu
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Patent number: 10418514Abstract: Exemplary embodiments of the present invention disclose a light emitting diode including an n-type contact layer doped with silicon, a p-type contact layer, an active region disposed between the n-type contact layer and the p-type contact layer, a superlattice layer disposed between the n-type contact layer and the active region, the superlattice layer including a plurality of layers, an undoped intermediate layer disposed between the superlattice layer and the n-type contact layer, and an electron reinforcing layer disposed between the undoped intermediate layer and the superlattice layer. Only a final layer of the superlattice layer closest to the active region is doped with silicon, and the silicon doping concentration of the final layer is higher than that of the n-type contact layer.Type: GrantFiled: July 6, 2017Date of Patent: September 17, 2019Assignee: SEOUL VIOSYS CO., LTD.Inventors: Kwang Joong Kim, Chang Suk Han, Kyung Hee Ye, Seung Kyu Choi, Ki Bum Nam, Nam Yoon Kim, Kyung Hae Kim, Ju Hyung Yoon
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Patent number: 10418515Abstract: An optoelectronic lighting device includes a black housing including a cavity, wherein the cavity includes a base, a semiconductor component is arranged on the base of the cavity with an underside of a main body facing the base, and the cavity is filled with a reflective material from the base up to a predetermined height, which is smaller than a height of a top side of the main body relative to the base of the cavity such that electromagnetic radiation emerging from the main body through side faces may be reflected by the reflective material back in the direction of the side faces to couple reflected electromagnetic radiation into the main body such that at least part of the electromagnetic radiation coupled in may emerge again from the main body through the top side of the main body.Type: GrantFiled: July 21, 2016Date of Patent: September 17, 2019Assignee: OSRAM Opto Semiconductors GmbHInventors: Markus Wicke, Michael Wittmann
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Patent number: 10418516Abstract: Disclosed herein are multi-layered optically active regions for semiconductor light-emitting devices (LEDs) that incorporate intermediate carrier blocking layers, the intermediate carrier blocking layers having design parameters for compositions and doping levels selected to provide efficient control over the carrier injection distribution across the active regions to achieve desired device injection characteristics. Examples of embodiments discussed herein include, among others: a multiple-quantum-well variable-color LED operating in visible optical range with full coverage of RGB gamut, a multiple-quantum-well variable-color LED operating in visible optical range with an extended color gamut beyond standard RGB gamut, a multiple-quantum-well light-white emitting LED with variable color temperature, and a multiple-quantum-well LED with uniformly populated active layers.Type: GrantFiled: May 25, 2018Date of Patent: September 17, 2019Assignee: Ostendo Technologies, Inc.Inventors: Hussein S. El-Ghoroury, Mikhail V. Kisin, Yea-Chuan Milton Yeh, Chih-Li Chuang, Jyh-Chia Chen
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Patent number: 10418517Abstract: Resonant optical cavity light emitting devices are disclosed, where the device includes a substrate, a first spacer region, a light emitting region, a second spacer region, and a reflector. The light emitting region is configured to emit a target emission deep ultraviolet wavelength, and is positioned at a separation distance from the reflector. The reflector may have a metal composition comprising elemental aluminum or may be a distributed Bragg reflector. The device has an optical cavity comprising the first spacer region, the second spacer region and the light emitting region, where the optical cavity has a total thickness less than or equal to K·?/n. K is a constant ranging from 0.25 to less than 1, ? is the target wavelength, and n is an effective refractive index of the optical cavity at the target wavelength.Type: GrantFiled: August 29, 2018Date of Patent: September 17, 2019Assignee: Silanna UV Technologies Pte LtdInventor: Petar Atanackovic
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Patent number: 10418518Abstract: A fabrication method of a nitride underlayer structure includes, during AlN layer sputtering with PVD, a small amount of non-Al material is doped to form nitride with decomposition temperature lower than that of AlN. A high-temperature annealing is then performed. After annealing, the AlN layer has a rough surface with microscopic ups and downs instead of a flat surface. By continuing AlGaN growth via MOCVD over this surface, the stress can be released via 3D-2D mode conversion, thus improving AlN cracks.Type: GrantFiled: December 30, 2017Date of Patent: September 17, 2019Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Shengchang Chen, Wen-Yu Lin, Jie Zhang, Heqing Deng, Chen-Ke Hsu
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Patent number: 10418519Abstract: LEDs and methods of forming LEDs with various structural configurations to mitigate non-radiative recombination at the LED sidewalls are described. The various configurations described include combinations of LED sidewall surface diffusion with pillar structure, modulated doping profiles to form an n-p superlattice along the LED sidewalls, and selectively etched cladding layers to create entry points for shallow doping or regrowth layers.Type: GrantFiled: December 14, 2016Date of Patent: September 17, 2019Assignee: Apple Inc.Inventors: David P. Bour, Dmitry S. Sizov, Daniel A. Haeger, Xiaobin Xin
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Patent number: 10418520Abstract: A light emitting display device includes: a light emitting element that includes a light emitting layer between a first electrode and a second electrode; a wavelength conversion layer overlapping the light emitting element; and an uneven layer that includes a plurality of furrows between the light emitting element and the wavelength conversion layer, wherein a shortest distance between a bottom surface of the plurality of furrows and the wavelength conversion layer is 0.1 um or greater.Type: GrantFiled: June 29, 2018Date of Patent: September 17, 2019Assignee: LG Display Co., Ltd.Inventors: Soo-Kang Kim, Won-Hoe Koo, Ji-Hyang Jang, So-Young Jo
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Patent number: 10418521Abstract: A method of producing a patterned substrate includes the steps of: providing, on a substrate, a coating film of a resin composition including (A) an alkali-soluble resin selected from the group consisting of polyimides, polyamideimides, polyimide precursors, polyamideimide precursors, polybenzoxazoles, polybenzoxazole precursors, copolymers of at least two of the resins, and copolymers of at least one of the resins and another structural unit, (B) a photoacid generator, and (C) at least one compound selected from the group consisting of epoxy compounds and oxetane compounds; forming a pattern of the coating film; patterning the substrate through etching using the pattern of the coating film as a mask; and removing the coating film of the resin composition.Type: GrantFiled: October 27, 2016Date of Patent: September 17, 2019Assignee: TORAY INDUSTRIES, INC.Inventors: Hideyuki Kobayashi, Tomoyuki Yuba
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Patent number: 10418522Abstract: An optoelectronic device and method of manufacturing an optoelectronic device are disclosed. The optoelectronic device includes a substrate; a semiconductor comprising an n-type layer disposed on the substrate, a p-type layer disposed on the n-type layer, and an active layer disposed between the n-type layer and the p-type layer; a transition layer disposed on the substrate and located between the n-type layer and the substrate, the transition layer including an oxygenated IIIA-transition metal nitride; and a p-contact layer disposed on the p-type layer of the semiconductor.Type: GrantFiled: December 19, 2017Date of Patent: September 17, 2019Assignee: GOFORWARD TECHNOLOGY INC.Inventors: Yangang Xi, Jiguang Li
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Patent number: 10418523Abstract: A light-emitting device in an embodiment includes a substrate, a light-emitting structure which is disposed on the substrate and includes a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, first and second electrodes which are respectively connected to the first and second conductive semiconductor layers, first and second bonding pads respectively connected to the first and second electrodes, and an insulating layer disposed between the first bonding pad and the second electrode, and between the second bonding pad and the first electrode. The first thickness of the first electrode may be ? or less of the second thickness of the insulating layer disposed between the second bonding pad and the first electrode.Type: GrantFiled: March 16, 2016Date of Patent: September 17, 2019Assignee: LG INNOTEK CO., LTD.Inventors: Sang Youl Lee, Hoe Jun Kim, Sung Ho Jung
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Patent number: 10418524Abstract: An optoelectronic device comprises a substrate; a groove on the substrate; a plurality of semiconductor units on the substrate and separated by the groove, wherein each semiconductor unit comprises a first semiconductor layer, a second semiconductor layer, and an active region interposed between the first semiconductor layer and the second semiconductor layer; a connecting part crossing the groove for connecting two of the plurality of semiconductor units, wherein the connecting part comprises one end on the first semiconductor layer and another end on the second semiconductor layer; a first electrode comprising a plurality of first extensions jointly connected to the one end of the connecting part; and a second electrode comprising a plurality of second extensions jointly connected to the another end of the connecting part, wherein an amount of the plurality of first extensions is different from an amount of the plurality of second extensions.Type: GrantFiled: April 12, 2018Date of Patent: September 17, 2019Assignee: EPISTAR CORPORATIONInventors: Chang-Huei Jing, Chien-Fu Shen
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Patent number: 10418525Abstract: Provided is a semiconductor light-emitting element that emits ultraviolet light with a wavelength of not more than 355 nm, the semiconductor light-emitting element including an electrode portion to be electrically connected to electrodes of a component mounting the element, wherein the electrode portion is formed by laminating any one or more of a metal providing passivity against organic acids, a metal having a lower ionization tendency than hydrogen and a conductive oxide film, and does not include a layer formed of a material that does not provide passivity against organic acids, has higher ionization tendency than hydrogen and is not a conductive oxide film.Type: GrantFiled: August 10, 2018Date of Patent: September 17, 2019Assignee: NIKKISO CO., LTD.Inventor: Shuichiro Yamamoto
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Patent number: 10418526Abstract: A light emitting device includes: a resin package including: a plurality of leads that includes: a first lead having an upper surface, and a second lead having an upper surface, and a resin body that includes: a first resin portion, a second resin portion, a third resin portion disposed between the first lead and the second lead, and a resin connection portion, the plurality of leads and the at least one inner lateral wall surface of the first resin portion defining a recess, the second resin portion surrounding an element mounting region, and the resin connection portion connecting the first resin portion and the second resin portion at the bottom of the recess; at least one light emitting element disposed on the element mounting region; and a light-reflective member disposed between the inner lateral wall surface and the second resin portion in the recess.Type: GrantFiled: November 21, 2018Date of Patent: September 17, 2019Assignee: NICHIA CORPORATIONInventor: Ryoji Naka
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Patent number: 10418527Abstract: Fluidic assembly methods are presented for the fabrication of emissive displays. An emissive substrate is provided with a top surface, and a first plurality of wells formed in the top surface. Each well has a bottom surface with a first electrical interface. Also provided is a liquid suspension of emissive elements. The suspension is flowed across the emissive substrate and the emissive elements are captured in the wells. As a result of annealing the emissive substrate, electrical connections are made between each emissive element to the first electrical interface of a corresponding well. A eutectic solder interface metal on either the substrate or the emissive element is desirable as well as the use of a fluxing agent prior to thermal anneal. The emissive element may be a surface mount light emitting diode (SMLED) with two electrical contacts on its top surface (adjacent to the bottom surfaces of the wells).Type: GrantFiled: January 23, 2017Date of Patent: September 17, 2019Assignee: eLux, Inc.Inventors: Kenji Sasaki, Paul J. Schuele, Kurt Ulmer, Jong-Jan Lee
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Patent number: 10418528Abstract: A light-emitting device includes a light-emitting element having an upper surface serving as a light-extracting surface, a first light-transmissive member bonded to the upper surface of the light-emitting element and including an inorganic material as a main component and a wavelength conversion member, and a second light-transmissive member bonded to an upper surface of the first light-transmissive member and including an inorganic material as a main component. A periphery of a lower surface of the first light-transmissive member is located outward of a periphery of the upper surface of the light-emitting element in a plan view. A periphery of an upper surface of the second light-transmissive member is located inward of a periphery of the upper surface of the first light-transmissive member in the plan view.Type: GrantFiled: May 28, 2018Date of Patent: September 17, 2019Assignee: NICHIA CORPORATIONInventor: Takanobu Sogai
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Patent number: 10418529Abstract: A conversion element includes a platelet including an inorganic glass, and first converter particles having a shell and a core, wherein the shell includes an inorganic material and the core includes a nitride or oxynitride luminescent material and the first converter particles are arranged on and/or in the platelet.Type: GrantFiled: December 15, 2014Date of Patent: September 17, 2019Assignees: OSRAM Opto Semiconductors GmbH, OSRAM GmbHInventors: Britta Göötz, Frank Singer, Roland Hüttinger
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Patent number: 10418530Abstract: An optoelectronic semiconductor chip having a semiconductor body (1) that is suitable for emitting electromagnetic radiation in a first wavelength range from a radiation exit face (3) is specified. Furthermore, the semiconductor chip comprises a ceramic or monocrystalline conversion platelet (6) that is suitable for converting electromagnetic radiation in the first wavelength range into electromagnetic radiation in a second wavelength range, which is different from the first wavelength range, and a wavelength-converting joining layer (7) that connects the conversion platelet (6) to the radiation exit face (3), wherein the wavelength-converting joining layer (7) has luminescent material particles (4) that are suitable for converting radiation in the first wavelength range into radiation in a third wavelength range, which is different from the first wavelength range and the second wavelength range. The wavelength-converting joining layer (7) furthermore has a thickness of no more than 30 micrometers.Type: GrantFiled: November 25, 2015Date of Patent: September 17, 2019Assignee: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Reiner Windisch, Joerg Erich Sorg, Ralph Wirth
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Patent number: 10418531Abstract: The present invention provides a light-emitting diode (LED) packaging material, which is formed by compounding the graphene with the silane or the epoxy resin, to improve the defects of manufacturing the LED packaging material of the single silane or the epoxy resin, with the help of the properties of graphene, so as to improve the performance of the LED packaging material. The present invention further provides a manufacturing method of a LED packaging material. The LED packaging material and the manufacturing method of the present invention, which is formed by compounding the graphene with the silane or the epoxy resin, to improve the defects of manufacturing the LED packaging material of the single silane or the epoxy resin, with the help of the properties of graphene, so as to improve the performance of the LED packaging material.Type: GrantFiled: June 9, 2017Date of Patent: September 17, 2019Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.Inventor: Haijun Wang
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Patent number: 10418532Abstract: Provided are a semiconductor light-emitting device capable of easily adjusting the light intensity of output light and a method for producing such a semiconductor light-emitting device. The semiconductor light-emitting device includes: a substrate; a light-emitting element mounted on the substrate; and a seal layer provided on the substrate so as to cover the light-emitting element. The seal layer contains resin and inorganic pigment particles. The inorganic particles have an average particle size of 1 ?m or larger and 50 ?m or smaller in a volumetric basis particle size distribution by a laser diffraction scattering particle size distribution measurement method. The inorganic particles distributed at a concentration becoming thicker in a direction toward said substrate.Type: GrantFiled: August 29, 2018Date of Patent: September 17, 2019Assignee: STANLEY ELECTRIC CO., LTD.Inventor: Tsutomu Okubo
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Patent number: 10418533Abstract: A light-emitting device includes a package, a light-emitting element disposed on the package, and a light-transmissive member over the light-emitting element. An upper surface of the light-transmissive member and an upper surface of the package each have a plurality of projections. The light-transmissive member contains particles of light-transmissive first fillers having refractive indices smaller than the refractive index of a matrix of the light-transmissive member. Part of the particles of the first fillers is exposed to the air from the matrix of the light-transmissive member on the upper surface of the light-transmissive member.Type: GrantFiled: May 31, 2017Date of Patent: September 17, 2019Assignee: NICHIA CORPORATIONInventors: Koji Abe, Yasushi Okamoto
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Patent number: 10418534Abstract: A light-emitting device comprising: a light source; and a light guide that is optically coupled to the light source, the light guide including a plurality of first non-fluorescent light extraction elements and a plurality of second non-fluorescent light extraction elements that are printed on the light guide, each of the first light extraction elements having a reflectance that is higher than a reflectance of any of the second light extraction elements, each of the first light extraction elements having a light transmittance that is lower than a light transmittance of any the second light extraction elements, each of the first light extraction elements having the same shape and size as any other one of the plurality first light extraction elements, and each of the second light extraction elements having the same shape and size as any other one of the plurality of second light extraction elements.Type: GrantFiled: October 16, 2017Date of Patent: September 17, 2019Assignee: Lumileds LLCInventors: Jeroen Den Breejen, Xin Zhang, Frederic Stephane Diana
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Patent number: 10418535Abstract: An optoelectronic component includes a boundary layer is arranged between a semiconductor body and a metallic layer in a lateral direction, adjoins the semiconductor body at least in places, covers an active layer laterally, and has a lower refractive index compared to the semiconductor body, a metallic layer is configured to prevent the electromagnetic radiation generated during operation of the component and passes through the boundary layer from impinging on a mold body, the boundary layer is formed from a radiation-transmitting dielectric material having a refractive index of 1 to 2, and a layer thickness of the boundary layer is at least 400 nm and selected such that an amplitude of an evanescent wave, which is obtained in the event of total internal reflection at an interface between the boundary layer and the semiconductor body, is reduced to less than 37% of its original value within the boundary layer.Type: GrantFiled: July 28, 2016Date of Patent: September 17, 2019Assignee: OSRAM Opto Semiconductors GmbHInventors: Korbinian Perzlmaier, Anna Kasprzak-Zablocka, Christine Rafael, Christian Leirer
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Patent number: 10418536Abstract: The present disclosure provides a LED metal substrate and a LED module. An insulator is provided to cover an electrode or a side surface of a metal layer in the LED metal substrate, or provided on an original creepage path between the electrode and the metal layer in the LED metal substrate to form a new creepage path with increased creepage distance, in order to increase the breakdown voltage between the electrode and the metal layer. It is possible to avoid a phenomenon that an electric arc is generated between the electrode and the metal layer when a relative high voltage applied by the electrode during a breakdown test. So that the breakdown voltage of the LED metal substrate with an insulator reaches higher than that of a LED metal substrate without the insulator in the same dimension, and a technical problem in the art may be solved.Type: GrantFiled: August 30, 2017Date of Patent: September 17, 2019Assignee: KAISTAR LIGHTING (XIAMEN) CO., LTD.Inventors: Jingqiong Zhang, Shanshan Yang, Jinqiang Huang
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Patent number: 10418537Abstract: High-power remote phosphor white LED heat-dissipation package relates to an LED heat-dissipation package, for solving the problem of poor heat dissipation of LED package structures. The substrate of the package structure is provided with a boss and a heat conducting ring, and the phosphor structural layer contains hollow glass microspheres. The white LED heat-dissipation package structure in the present invention improves the spatial chroma uniformity of the white light by using the hollow glass microspheres, thereby reducing the costs. The package structure can improve the heat dissipation efficiency of the chip and the utilization ratio of light emitted from the chip. The present invention is applicable to prepare high-power remote phosphor white LEDs.Type: GrantFiled: April 25, 2019Date of Patent: September 17, 2019Assignee: XUYU OPTOELECTRONICS (SHENZHEN) CO., LTD.Inventors: Jintian Lin, Xiaobing Cao
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Patent number: 10418538Abstract: A thermoelectric material is manufactured by a manufacturing process including annealing at an annealing temperature from 125° C. to 200° C. and for an annealing time from 5 minutes to 12 hours applied to a substance selected from the group consisting of conductive polymer, polystyrene sulfonate (PSS), tosylate (TOS), chloride and perchlorate and a substance as solvent selected from the group consisting of ethylene glycol, ethanol, dimethyl sulfoxide and isopropanol.Type: GrantFiled: February 23, 2017Date of Patent: September 17, 2019Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Masakazu Mukaida, Qingshuo Wei, Takao Ishida, Yasuhisa Naitoh
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Patent number: 10418539Abstract: Superconductive fullerenes, methods for enhancing characteristics of superconductive fullerenes and devices incorporating the fullerenes are disclosed. Enhancements can include increase in the critical transition temperature at a constant magnetic field; the existence of a superconducting hysteresis over a changing magnetic field; a decrease in the stabilizing magnetic field required for the onset of superconductivity; and/or an increase in the stability of superconductivity over a large magnetic field. The enhancements can be brought about by transmitting electromagnetic radiation to the superconductive fullerene such that the electromagnetic radiation impinges on the fullerene with an energy that is greater than the band gap of the fullerene.Type: GrantFiled: May 17, 2017Date of Patent: September 17, 2019Assignee: Savannah River Nuclear Solutions, LLCInventors: Aaron L. Washington, II, Joseph A. Teprovich, Ragaiy Zidan